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2023 China Semiconductor Technology International Conference, CSTIC 2023

作者： Wei, Yanzhao Yao, Jiaxin Xu, renren Zhang, Qingzhu Yin, Huaxiang Chinese Academy of Sciences Integrated Circuit Advanced Process R&d Center Institute of Microelectronics Beijing100029 China Institute of Microelectronics Chinese Academy of Sciences Key Laboratory of Microelectronic Devices and Integrated Technology Beijing100029 China University of Chinese Academy of Sciences School of Integrated Circuits Beijing100049 China

ISBN: (纸本)9798350311006

In this paper, a La2O3/HfO2 bi-layer dipole-first (dF) process is proposed and investigated by ultra-low temperature PVd dielectric laminates to achieve lower gate effective work function (EWF) for monolithic 3d-IC (M3d) application. The impacts of ultra-low temperature La-dipole on EWF modulation and interfacial properties are comprehensively investigated. It is found that the flat-band voltage (VFB) negatively shifts 60 mV with sub-1nm La2O3 thickness, which provides an effective way to meet the require of Si conduction band-edge EWF modulation. Furthermore, the electron trap/detrap densities (Not) and interfacial trap densities (dit) are suppressed by La2O3/HfO2 bi-layer dF process to improve device performance. These results exhibit a promising bi-layer dF process in low thermal integration for advanced IC technology. © 2023 IEEE.

关键词： Timing circuits

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Leakage reduction of GAA Stacked SI Nanosheet CMOS Transistors and 6T-SrAM Cell Via Spacer Bottom Footing Optimization

Leakage Reduction of GAA Stacked SI Nanosheet CMOS Transisto...

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2023 China Semiconductor Technology International Conference, CSTIC 2023

作者： Yao, Jiaxin Zhang, Xuexiang Cao, Lei Li, Junjie Zhou, Na Li, Qingkun Wei, Yanzhao Luo, Yanna Luo, Jun Zhang, Qingzhu Yin, Huaxiang Institute of Microelectronics of Chinese Academy of Sciences Integrated Circuit Advanced Process R&d Center Beijing100029 China Institute of Microelectronics of Chinese Academy of Sciences Key Laboratory of Microelectronics Devices and Integrated Technology Beijing100029 China University of Chinese Academy of Sciences Beijing100049 China

ISBN: (纸本)9798350311006

In this work, the significant leakage reduction approach is proposed and investigated by critical spacer bottom footing (SBF) optimization for gate-all-around (GAA) stacked Si nanosheet (SiNS) transistors. The fabricated GAA stacked SiNS CMOS transistors and standard 6T static random-access memory (SrAM) cell have achieved reduced static-state leakage current by an order of magnitude and improved read static noise margin (rSNM) by +12.67% due to SBF optimization. The performance boosting origins from improving the gate and source/drain overlap doping profile via SBF optimization, and thus suppressing the band to band tunneling leakage current correspondingly. The proposed leakage reduction approach can inspire and broaden the ultralow power performance application for the state-of-the-art GAA nanosheet technology. © 2023 IEEE.

关键词： CMOS integrated circuits

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device-circuit Co-Optimization for Negative Capacitance FinFETs based on SPICE Model

Device-Circuit Co-Optimization for Negative Capacitance FinF...

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advanced Patterning Solutions (IWAPS), International Workshop on

作者： Jiali Huo Weixing Huang Fan Zhang Qiang Huo Weizhuo Gan Haoqing Xu Huilong Zhu Huaxiang Yin Zhenhua Wu Integrated Circuit Advanced Process R&D Center of IMECAS Institute of Microelectronics of the Chinese Academy of Sciences Beijing China

ISBN: (数字)9781728175775

ISBN: (纸本)9781728175782

This article presents a device-circuit co-optimization on Negative Capacitance FinFETs (NC-FinFETs). A physics-based SPICE model that combines industry-standard BSIM-CMG model and Landau Khalatnikov (LK) equation is developed for the NC-FinFETs. different ferroelectric areas (AFE) are selected to analyze the characteristics of the NC-FinFETs. The influences of work function (WF) and capacitance matching on NC-FinFETs are investigated to further optimize the dC performance of inverters. Based on the NC-FinFETs SPICE model, we simulate the transient characteristics of the ring oscillator (rO) and analyze the delay-energy characteristics of the rO in detail. At low supply voltage $(V_{dd})$ the delay of NC-FinFETs-based rO is much smaller than that of conventional FinFETs-based rO. Under the same delay, the energy consumption of NC-FinFETs-based rO is 50.4% lower than that of FinFETs-based rO. This result shows that NC-FinFETs have great advantages in low-power applications.

关键词： ring oscillators SPICE Capacitance FinFETs Inverters delays Mathematical model

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Fano resonance from Air-mode Photonic Crystal Nanobeam Cavity with 248-nm dUV Lithography

Fano Resonance from Air-mode Photonic Crystal Nanobeam Cavit...

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OptoElectronics and Communications Conference, OECC

作者： Fujun Sun Gang Yang Peng Zhang Bo Tang Zhihua Li Bin Li Yan Yang Integrated Circuit Advanced Process R&D Center of IMECAS Institute of Microelectronics Chinese Academy of Sciences Beijing China

Photonic crystal nanobeam cavity (PCNC) is important building block for large-scale photonic integrated circuits (PICs). Nevertheless, most state-of-the-art demonstrations rely on electron beam lithography (EBL). Here, we experimentally present the characteristics of Fano resonance from air-mode PCNC using 248-nm deep ultraviolet (dUV) lithography for the first time. Experimentally high average Q factor of $\sim 1.58 \times 10^integrated$ is achieved.

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Nanosheet Count Optimization Strategy of Complementary FET (CFET) Scaling Beyond 2 nm From device to circuit

Nanosheet Count Optimization Strategy of Complementary FET (...

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advanced Patterning Solutions (IWAPS), International Workshop on

作者： Hao He Shixin Li Yanna Luo Haoqing Xu Huaxiang Yin Zhenhua Wu EDA Center Institute of Microelectronics Beijing China Integrated Circuit Advanced Process R&D Center Institute of Microelectronics Beijing China

Complementary Field-Effect Transistors is one of the most promising structures for replacing GAA (Gate-All-Around) field-effect transistors while continuing the advancement of Moore's Law. Thus, optimizing its structure is a crucial research direction. This study proposes a nano-sheet count design strategy to address the issue of mismatched electron and hole mobilities in standard CFET cell and a nine-stage ring oscillator (rO). The simulation results demonstrate the effective matching of electron and hole mobilities by adjusting the ratio of NMOS (n-type) and PMOS (p-type) nano-sheet counts, thus enabling the optimization of circuit performance and power consumption for specific applications. In the CFET of the rO unit, a frequency increase of 10% and a capacitance reduction of 6% are achieved with only a 3% increase in power consumption, comparing a CFET with four P-doped nano-sheet channels and two N -doped nano-sheet channels to one with three P-doped nano-sheet channels and three N-doped nano-sheet channels.

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A compact Infrared gas sensor based on an asymmetry gas cavity

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Key Engineering Materials 2015年 645卷 1111-1114页

作者： Ming, Anjie ren, Yaohui Zhang, Yu Zhang, Le Zhang, Wenbo Tan, Zhenxin Ou, Wen Tan, Qiulin Mao, Haiyang Xiong, Jijun Chen, dapeng Integrated Circuit Advanced Process Center Key lab of Microelectronics Device and Integration Technology Institute of Microelectronics Chinese Academy of Sciences Beijing100029 China Intelligent Sensors Engineering Center Jiangsu R and D Center for Internet of Things Wuxi214135 China Key Lab of Instrumentation Science and Dynamic Measurement North University of China Taiyuan030051 China

Many gas molecules absorb electromagnetic radiation at characteristic wavelengths in the infrared region. This absorption can be used to identify defined substances like CO2, ammoniac, and so far. This study presents a comparative analysis of parameters of infrared radiation source and detector hardware that are most important for the creation of portable optical nondispersive infrared (NdIr) gas sensors. One of the central issues in the design of this kind of sensors is the geometry of the sensor cell. In this paper we investigate an asymmetry sensor cavity and predict the performance using Tracepro software. Then, the CO2 sensor is made and tested. © 2015 Trans Tech Publications, Switzerland.

关键词： Gases

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Improve the Breakdown Voltage of Silicon Pixel Sensor With Optimized Multi-Guard rings

Improve the Breakdown Voltage of Silicon Pixel Sensor With O...

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China Semiconductor Technology International Conference (CSTIC)

作者： Peng Sun Gaobo Xu Jianyu Fu Mingzheng ding Yinan Yan Luoyun Zhang Huaxiang Yin Integrated Circuit Advanced Process R&D Center Institute of Microelectronics Chinese Academy of Sciences Beijing China University of Chinese Academy of Sciences Beijing China

The silicon pixel sensor (SPS) for X-ray free electron laser detection requires ultra-high operating voltage. In this paper, for an optimized multi-guard rings, a SPS with ultra-high breakdown voltage and low leakage is obtained. The effect of the arrangement of the multi-guard rings on the SPS breakdown is investigated by TCAd simulation. It is found that SPS with a gradually increasing gap from inner ring to outer ring has a higher breakdown voltage. Guided by this, the multi-guard ring structure of SPS is optimized and applied into the manufacture of devices. Finally, the optimized SPS exhibits an ultra-high breakdown voltage of exceeding 1,800 V; and the dark current of per pixel is approximately 2.0 pA at a bias voltage of 1,000 V.

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Performance Enhancement and Mechanism Analysis of IGZO Thin-Film Transistors Utilizing Interdigital Structure

Performance Enhancement and Mechanism Analysis of IGZO Thin-...

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17th Symposium on Thin Film Transistors, TFT 2024, held at the PriME 2024 Meeting

作者： Lu, Yupeng Yan, Gangping Yang, Yanyu Sun, Peng Luo, Jie Bao, Yunjiao Niu, Chuqiao Wang, Peng Xu, Gaobo Wang, Guilei Chao, Zhao Yin, Huaxiang Luo, Jun School of Integrated Circuits University of Chinese Academy of Sciences Beijing100049 China State Key Lab of Fabrication Technologies for Integrated Circuits Institute of Microelectronics Chinese Academy of Sciences Beijing100029 China Integrated Circuit Advanced Process R&D Center Institute of Microelectronics Chinese Academy of Sciences Beijing100029 China Beijing Superstring Academy of Memory Technology China

ISBN: (纸本)9781623326630

—This study investigates the issue of leakage current reduction in oxide semiconductor thin-film transistors (TFTs) with interdigital structures. Electrical measurements clearly demonstrate that the leakage current of interdigitated IGZO devices decreases as the on/off ratio increases. To explore the reasons behind the reduction in leakage current, we conducted two-dimensional device simulations. The results confirm that the use of interdigital structures can influence the electric field distribution within the device channel, introducing shielding electric fields. As the number of interlayer structures between the source and drain increases, the shielding electric fields proportionally increase. Additionally, interdigitated IGZO devices exhibit a large on/off ratio exceeding 2.7×1010, an ultra-low leakage current of less than 3×10-16 A/μm, and a high saturation mobility of 9.4 cm2/Vs. These findings provide valuable insights for designing low-power, high-performance devices based on IGZO. ©The Electrochemical Society.

关键词： Thin film transistors

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robustly stable intermediate memory states in HfO_(2)-based ferroelectric field-effect transistors

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Journal of Materiomics 2022年第3期8卷 685-692页

作者： Chen Liu Binjian Zeng Siwei dai Shuaizhi Zheng Qiangxiang Peng Jinjuan Xiang Jianfeng Gao Jie Zhao Jincheng Zhang Min Liao Yichun Zhou Key Laboratory of Low Dimensional Materials and Application Technology of Ministry of Education School of Materials Science and EngineeringXiangtan UniversityXiangtan411105China College of Civil Engineering and Mechanics Xiangtan UniversityXiangtan411105China School of Advanced Materials and Nanotechnology Xidian UniversityXi'an710071China Integrated Circuit Advanced Process R&D Center and Institute of Microelectronics of Chinese Academy of Sciences Beijing100029China State Key Discipline Laboratory of Wide Band Gap Semiconductor Technology School of MicroelectronicsXidian UniversityXi'an710071China

Multilevel ferroelectric field-effect transistors(FeFETs)integrated with HfO_(2)-based ferroelectric thin films demonstrate tremendous potential in high-speed massive data storage and neuromorphic computing ***,few works have focused on the stability of the multiple memory states in the HfO_(2)-based *** we firstly report the write/read disturb effects on the multiple memory states in the Hf_(0.5)Zr_(0.5)O_(2)(HZO)-based *** multiple memory states in HZO-based FeFETs do not show obvious degradation with the write and read disturb ***,the retention characteristics of the intermediate memory states in HZO-based FeFETs with unsaturated ferroelectric polarizations are better than that of the memory state with saturated ferroelectric *** the deep analysis of the operation principle of in HZO-based FeFETs,we speculate that the better retention properties of intermediate memory states are determined by the less ferroelectric polarization degradation and the weaker ferroelectric polarization *** experimental and theoretical evidences confirm that the long-term stability of the intermediate memory states in HZO-based FeFETs are as robust as that of the saturated memory state,laying a solid foundation for their practical applications.

关键词： Ferroelectric fieldeffect transistors(FeFETs) Hf_(0.5)Zr_(0.5)O_(2)(HZO) Multiple memory states Write/read disturb retention

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Hybrid simulation method of quantum characteristics for advanced Si MOSFETs under extreme conditions by incorporating simplified master equation with TCAd

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results in Physics 2024年 63卷

作者： Zhu, Xiaohui Yin, Huaxiang Integrated Circuit Advanced Process R&D Center and State Key Lab of Fabrication Technologies for Integrated Circuits Institute of Microelectronics of the Chinese Academy of Sciences University of Chinese Academy of Sciences

Silicon (Si)-based quantum-dot (Qd) device by advanced CMOS process is one of important technologies for quantum computing application and currently, it needs a fast and accurate quantum characteristics simulation for designing and optimizing the devices. In this paper, for the first time, a fast hybrid simulation method is proposed by incorporating simplified quantum master equation model with the traditional TCAd tool. Additionally, a SPICE MOdEL is incorporated for transient current correction to achieve results closer to real observations. The Qd devices forming on advanced stacked Si nanowire (NW) and stacked Si nanosheet (NS) are constructed and simulated by this method, yielding Coulomb diamond plot and charge energies for different structures at 1 K. Notably, a Coulomb blockade region of approximately 82 mV and a first Coulomb step width approximately 1.6 times wider than the blockade region are observed, consistent with theoretical expectations and confirming the method's efficacy. Simulation characteristics of advanced diamond-like channel devices are obtained within 1277 s, demonstrating over 85% matching with experimental data. Meanwhile, the influence of quantum characteristics varying with the transistor's structure and process parameters is also analyzed, which in turn provide a guidance for the design and the optimization of the Qd device by advanced Si CMOS process. © 2024

关键词： Hybrid simulation Master equation Quantum dots TCAd

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