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Phase Change Material Compact Model: Validation and Sensitivity as Thermal Interface Material

Phase Change Material Compact Model: Validation and Sensitiv...

引用

Electrical Design of Advanced Packaging and Systems Symposium, EDAPS

作者： Javed Shaikh Je-Young Chang Weihua Tang Assembly and Test Technology Development Intel Corporation Bangalore India

ISBN: (纸本)9781538665930;9781538665923

The Phase Change Material (PCM) is explored as potential passive thermal solution in package thermal design due to the burst power requirements in the mobile applications. In this paper, a compact model based on the apparent heat capacity method is proposed and implemented in Icepak ® . The model is validated with the experimental results, also the compact model results are verified with the detailed computational fluid dynamics (CFD) simulations using Fluent ® solver. The compact model is used to perform the sensitivity study using different commercial PCMs as thermal interface material (TIM) in the bare die package under JEDEC boundary conditions. The effect of conductivity and capacitance is discussed with respect to different PCMs as TIM.

关键词： Phase change materials Heating systems Numerical models Liquids Computational modeling Temperature Electronic packaging thermal management

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Understanding Underfill Degradation in Reliability testing Conditions for ADAS Package development

Understanding Underfill Degradation in Reliability Testing C...

引用

Electronic Components and technology Conference (ECTC)

作者： Ziyin Lin Vijay Subramanian Pramod Malatkar Nisha Ananthakrishnan Assembly &Test Technology Development Intel Corporation Chandler AZ USA

Harsh advanced driver assistance systems (ADAS) user conditions lead to stringent reliability requirements for electronic packages. In order to develop packages that meet ADAS reliability target, it is necessary to not only have highly reliable packaging materials but also create quick turn monitor (QTM) materials screening processes to facilitate the development cycle. In this paper, we used underfill as an example to demonstrate that material degradation in reliability testing conditions is an important modulator for underfill performance. It was found that one of underfill materials in our study experienced significant fracture toughness degradation after temperature cycling or high temperature bake; and the toughness degradation explained the poor package level reliability performance. The root cause of fracture toughness degradation is found to be the thermal degradation of polymer resin in reliability conditions. Further fundamental study revealed that fracture toughness/thermal degradation could be attributed to the thermal stability of the raw material structures. It is demonstrated that the characterization of the properties of packaging materials post temperature cycling/high temperature bake can be used as a QTM for material screening. The QTM offers more than three times improvement in data turns and allows for faster materials screening without the need for extensive package level experiments.

关键词： Degradation Materials reliability Thermal stability Stress Thermal degradation Temperature measurement

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Method to Model Input Voltage Ripple in Multi-Domain Fully Integrated Voltage Regulators

Method to Model Input Voltage Ripple in Multi-Domain Fully I...

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Electrical Design of Advanced Packaging and Systems Symposium, EDAPS

作者： Srinivasan Govindan Dipanjan Gope Krishna Bharath Srikrishnan Venkataraman Department of Electrical Communication Engineering Indian Institute of Science Bangalore India Assembly Test and Technology Development Intel Corporation Chandler Arizona Scalable Performance CPU Development Group Intel Technology India Pvt. Ltd Bangalore India

ISBN: (纸本)9781538665930;9781538665923

The on-chip power domains of the latest generation of high performance server microprocessors are generated using integrated switched mode dc-dc converters also known as Fully Integrated Voltage regulators (FIVR). The multi-domain FIVRs in the chip share a common input power supply and the input voltage ripple can be quite high when all of them switch together. The modeling of the input voltage ripple in multi-domain FIVRs using circuit simulation tools such as SPICE is a tedious task. This paper proposes a simple method to accurately model the steady state input voltage ripple using the Harmonic Domain (HD) method.

关键词： Harmonic analysis Switches Voltage control Integrated circuit modeling Inductors Mathematical model Matrices

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Robust temperature and humidity dependent electrical package material characterization

Robust temperature and humidity dependent electrical package...

引用

IEEE Conference on Electrical Performance of Electronic Packaging and Systems

作者： Yidnekachew S. Mekonnen Michael J. Hill Leigh Wojewoda Kemal Aygun Assembly and Test Technology Development Intel Corporation Chandler AZ

Increasing high speed data rates for digital signaling and emerging technologies such as 5G have expanded the frequency range of interest for package dielectric materials characterization and generated interest in characterization over use conditions such as temperature and humidity. In this paper, a robust dielectric material characterization metrology with high repeatability under different temperature and humidity conditions is presented. Temperature and humidity dependent interpolation of material properties based on measured data is also presented and shown to provide good estimates for environmental conditions not in the original data set.

关键词： Temperature measurement Humidity Temperature Temperature dependence Dielectric loss measurement Semiconductor device measurement

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Design of Low-loss Transmission Lines with Common Mode Suppression for Packages

Design of Low-loss Transmission Lines with Common Mode Suppr...

引用

IEEE Conference on Electrical Performance of Electronic Packaging and Systems

作者： Ahmet C. Durgun Kemal Aygun Assembly and Test Technology Development Intel Corporation Chandler AZ USA

Increasing data rates of high speed serial interfaces forces the insertion loss and common mode (CM) noise requirements to be tighter. This paper addresses both of these challenges by introducing a new low-loss transmission line design with simultaneous common mode filtering property. The line is composed of periodical repetitions of narrow and wide sections, which generates a CM impedance contrast to filter out the CM noise, while differential impedance is kept constant by locally voiding the planes below and above the wide trace sections. As a result of the wider sections, the loss is also smaller.

关键词： Low-loss transmission line Common mode filter High-speed interfaces Periodic structures

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Temperature Impact on Surface Roughness Modeling for On-Package High Speed Interconnects

Temperature Impact on Surface Roughness Modeling for On-Pack...

引用

IEEE Conference on Electrical Performance of Electronic Packaging and Systems

作者： Cemil S. Geyik Zhichao Zhang Sean R. Christ Leigh E. Wojewoda Kemal Aygun Assembly Test Technology Development Intel Corporation Chandler Arizona USA

The introduction of new dielectrics and adhesion promotion techniques for future interconnect technology generations is one of the key enablers for lower loss and higher bandwidth. However, temperature increase due to active die or environmental factors can cause variations in material properties and loss, which is required to be included in modeling assumptions to be able to set realistic specifications. High temperature can account for significant increase in dielectric loss and decrease in bulk conductivity. The former becomes less critical considering today's on-package high speed interconnect loss is largely dominated by conductors due to thinner substrate. The latter has a loss impact only at low frequencies due to skin effect, and high frequency conductor loss is considerably influenced by surface roughness. This paper presents a systematic methodology to show temperature impact on surface roughness modeling for on-package high speed interconnects. Correlation to high fidelity insertion loss measurements at different temperatures indicates the roughness correction factor extracted at one temperature does not fit all, necessitating an explicit temperature dependence for surface roughness models.

关键词： Temperature Relative humidity Surface roughness Dielectric loss Conductor loss Effective conductivity Skin effect Transmission line measurements

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Method to Model Vccin Feedthrough Noise in Multi-Domain Fully Integrated Voltage Regulators

Method to Model Vccin Feedthrough Noise in Multi-Domain Full...

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IEEE Conference on Electrical Performance of Electronic Packaging and Systems

作者： Srinivasan Govindan Krishna Bharath Dipanjan Gope Srikrishnan Venkataraman Department of Electrical Communication Engineering Indian Institute of Science Bangalore India Assembly Test and Technology Development Intel Corporation Chandler Arizona Scalable Performance CPU Development Group Intel Technology India Pvt. Ltd Bangalore India

The on-chip power supply domains of high performance server microprocessors are generated using built-in switching voltage regulators (also know as Fully Integrated Voltage regulators-FIVRs). The advantages of integrated voltage generation are improved performance and reduced platform cost. However, the FIVRs share a common input power plane in the package and the coupling of noise between FIVRs is of significant concern. This noise is also known as the Vccin feedthrough noise. The modeling of the vccin feedthrough noise using circuit simulation tools such as SPICE is a laborious and time consuming task. This paper proposes a simple method to accurately predict the vccin feedthrough noise based on the state-space averaged small signal method. This method simplifies the modeling of vccin feedthrough noise and saves lot of time and effort.

关键词： Power integrity and power distribution networks Electromagnetic (EM) and EM interference modeling Simulation algorithms Tools Flows Electronic packages and microsystems

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Fiber weave impact on crosstalk of high speed communication channels in glass epoxy packages

Fiber weave impact on crosstalk of high speed communication ...

引用

IEEE International Symposium on Electromagnetic Compatibility (EMC)

作者： Ahmet C. Durgun Kemal Aygün Assembly and Test Technology Development Intel Corporation Chandler AZ USA

ISBN: (纸本)9781509014439

Some packaging technologies utilize glass epoxy substrates that are composed of glass fiber bundles and epoxy resin. Because of the different electrical properties of glass and resin, the signal traces can have some variability, depending on their position with respect to the weaves. One of the parameters that are affected by the inhomogeneity of the substrate is the far end crosstalk. Crosstalk may significantly increase, hindering the link budget of high speed communication channels, especially in the dense routing areas. This paper addresses the crosstalk variations, in the frequency and time domains, due to the fiber weave effect (FWE). Analytical and numerical results are presented to provide a physical insight into the phenomenon, followed by a mitigation technique to minimize the impact.

关键词： Manganese

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Embedded Multi-die Interconnect Bridge (EMIB) -- A High Density, High Bandwidth Packaging Interconnect

Embedded Multi-die Interconnect Bridge (EMIB) -- A High Dens...

引用

Electronic Components and technology Conference (ECTC)

作者： Ravi Mahajan Robert Sankman Neha Patel Dae-Woo Kim Kemal Aygun Zhiguo Qian Yidnekachew Mekonnen Islam Salama Sujit Sharan Deepti Iyengar Debendra Mallik Assembly Test Technology Development Intel Corporation Chandler Arizona USA

The EMIB dense MCP technology is a new packaging paradigm that provides localized high density interconnects between two or more die on an organic package substrate, opening up new opportunities for heterogeneous on-package integration. This paper provides an overview of EMIB architecture and package capabilities. First, EMIB is compared with other approaches for high density interconnects. Some of the inherent advantages of the technology, such as the ability to cost effectively implement high density interconnects without requiring TSVs, and the ability to support the integration of many large die in an area much greater than the typical reticle size limit are highlighted. Next, the overall EMIB architecture envelope is discussed along with its constituent building blocks, the package construction with the embedded bridge, die to package interconnect features. Next, the EMIB assembly process is described at a high level. Finally, high bandwidth signaling between the die is discussed and the link bandwidth envelope is quantified.

关键词： Bandwidth Silicon Integrated circuit interconnections Bridge circuits Packaging Substrates Through-silicon vias

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Power Delivery Design and Analysis of 14nm Multicore Server CPUs with Integrated Voltage Regulators

Power Delivery Design and Analysis of 14nm Multicore Server ...

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Electronic Components and technology Conference (ECTC)

作者： Krishna Bharath Srikrishnan Venkataraman Assembly and Test Technology Development Intel Corporation Chandler USA Intel Corp Santa Clara CA US

intel® introduced a novel power delivery scheme utilizing Fully Integrated Voltage Regulators (FIVRs) in the Xeon® line of microprocessors fabricated using the 22nm process technology. In this paper, some of the implications of integrating FIVR in the context of Moore's law scaling are addressed. As the Xeon® line is scaled from a 22nm process to a 14nm process, circuit blocks on-die (such as the Core) shrink and the passives required for FIVR are scaled in tandem and optimized. This allows FIVR to continue delivering a compelling power performance benefit to support the scaling of the die. In this paper, an optimized 14nm FIVR power delivery design is presented. The performance metrics of FIVR such as efficiency and transient response were measured and correlated to pre-and post-silicon simulations.

关键词： Inductors Voltage control Electrical resistance measurement Correlation Resistance Current measurement Solenoids

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