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检索条件"机构=Intel Collaborative Research Institutes on Mobile Networking and Computing"

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Segmented CRC-Aided SC List Polar Decoding

Segmented CRC-Aided SC List Polar Decoding

引用

IEEE Vehicular Technology Conference

作者： Huayi Zhou Chuan Zhang Wenqing Song Shugong Xu Xiaohu You National Mobile Communications Research Laboratory Southeast University Intel Collaborative Research Institutes on Mobile Networking and Computing Intel Labs

ISBN: (纸本)9781509016990

Because of the existence of channel noise, channel coding serves as an indispensable part of mobile communication system and the essential guarantee for the reliable, accurate, and effective transmission of information. As one of the most competitive channel code candidates for the 5th generation (5G) mobile communication, polar codes are the first codes which can provably achieve the symmetric capacity of binary-input discrete memoryless channels (B-DMCs). In this paper, the segmented CRC-aided successive cancellation list (SCA-SCL) polar decoding scheme is proposed for better tradeoff of performance and complexity. Numerical results on binary-input additive white Gaussian noise channel (BI-AWGNC) have shown that, at S-NR of 0.5 dB, this approach successfully provides as high as 41.65% complexity reduction and similar decoding performance compared to state-of-the-art ones.

关键词： Polar codes Segmented CRC Successive cancellation (SC) decoding List decoding

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Successive Cancellation Heap Polar Decoding

Successive Cancellation Heap Polar Decoding

引用

IEEE Global Communications Conference

作者： Huayi Zhou Xiao Liang Chuan Zhang Shunqing Zhang Xiaohu You National Mobile Communications Research Laboratory Southeast University Intel Collaborative Research Institutes on Mobile Networking and Computing Intel Labs

ISBN: (纸本)9781509013296

In this paper, the successive cancellation (SC) heap polar decoding scheme is firstly proposed to reduce the complexity. Unlike SC list decoder which keeps L same length paths, SC heap decoding stores different length paths in a heap and always decodes the global optimal path in the root. It has been strictly proved that SC heap decoding is superior to SC stack decoding because the time complexity of inserting new paths is only related to the height of the heap. Proposed SC heap decoding is a dynamic decoding scheme with robustness in various scenarios. Numerical results with binary-input additive white Gaussian noise channel (BI-AWGNC) show that SC heap decoding reduces 63.53% decoding complexity compared with SC list decoding on the same performance at SNR of 2.5 dB. A low-complexity hardware architecture for proposed SC heap decoder is also designed.

关键词： Polar codes Successive cancellation Heap decoding Dynamic scheme Low-complexity architecture

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Hardware-efﬁcient folded SC polar decoder based on k-segment decomposition

Hardware-efﬁcient folded SC polar decoder based on k-segmen...

引用

IEEE Asia-Pacific Conference on Circuits and Systems

作者： Xiao Liang Chuan Zhang Shunqing Zhang Xiaohu You Southeast University Nanjing Jiangsu CN Intel Collaborative Research Institutes on Mobile Networking and Computing Intel Labs Shanghai China

In this paper, a hardware-efficient folded SC polar decoder based on k-segment decomposition is first proposed. The proposed k-segment scheme employs (k - 1) N 1/k -bit decoders to implement the original N-bit decoder, and reduces the number of mixed-nodes from (N - 1) to (k ă 1)( N 1/k - 1) with slightly increased latency. In addition, pipelining technique, partial parallel processing, and pre-computation are employed to refine the timing issue resulting from folding scheme. Meanwhile, the hardware utilization ratio (HUR) of processing elements (PEs) is drastically increased. Both SC decoders with (N = 8,k = 3) and (N = 1024,k = 2) are implemented with Altera Stratix V FPGA. The former one requires only 13.46% ALMs and 10.66% register compared to the k = 1 scheme at the cost of slightly increased latency. The latter one consumes only 55.86% ALMs compared to the k = 1 scheme. Thus, the proposed k-segment decoder is suitable for scenarios requiring high-HUR.

关键词： Decoding Encoding Complexity theory Hardware Computer architecture Pipeline processing Field programmable gate arrays

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Efficient hardware architecture of deterministic MPA decoder for SCMA

Efficient hardware architecture of deterministic MPA decoder...

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IEEE Asia-Pacific Conference on Circuits and Systems

作者： Chao Yang Chuan Zhang Shunqing Zhang Xiaohu You National Mobile Communications Research Laboratory Southeast University Nanjing China Intel Collaborative Research Institutes on Mobile Networking and Computing Intel Labs Shanghai China

ISBN: (纸本)9781509015719

Sparse code multiple access (SCMA) is a new kind of multiple access (MA) technology which ranks one of the most promising candidates for 5G wireless because of its outstanding performance. SCMA enjoys stronger overloading tolerance compared with traditional MA technologies. It also takes the advantage of sparse property to achieve lower complexity when using message passing algorithm (MPA). In this paper, a deterministic MPA (DMAP) is proposed for SCMA. Numerical result shows that DMPA achieves good performance in term of bit error rate (BER) and is capable to transmit more information with the same amount of physical resources. Furthermore, hardware architecture of DMPA is also put forward in this paper. For original DMPA, the data is updated in single but bulky step, which slows down the operation frequency. Apart from this, the DMPA decoder has 4 basic units, in need of large amount of hardware. Therefore, a stage-level folded structure for DMPA is first proposed with consideration of both the speed and efficiency, which is the main contribution. For better demonstration of the advantages, a loop bound analysis of it has also been made in this paper.

关键词： Hardware Computer architecture Processor scheduling Decoding Probability Optimization Registers

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Efficient SOR-based detection and architecture for large-scale MIMO uplink

Efficient SOR-based detection and architecture for large-sca...

引用

IEEE Asia-Pacific Conference on Circuits and Systems

作者： Anlan Yu Chuan Zhang Shunqing Zhang Xiaohu You National Mobile Communications Research Laboratory Southeast University Nanjing China Intel Collaborative Research Institutes on Mobile Networking and Computing Intel Labs Shanghai China

ISBN: (纸本)9781509015719

Affected by relaxation factor ω, for large-scale MIMO uplink, successive over relaxation (SOR) detection involves low-complexity matrix inversion but unstable performance as ω changes. In this paper, a more stable and efficient SOR-based detection, which is nearly unaffected by ω, is proposed. First, the convergence of the proposed method is proved. Both analytic and numerical results have shown that, with lower computational complexity, its performance 1) stays almost the same when ω varies, and 2) is very close to that of linear minimum mean square error (MMSE) algorithm. Finally, the corresponding VLSI architecture is proposed in detail.

关键词： MIMO Computer architecture Uplink Hardware Convergence Computational complexity

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Efficient stochastic detector for large-scale MIMO

Efficient stochastic detector for large-scale MIMO

引用

International Conference on Acoustics, Speech, and Signal Processing (ICASSP)

作者： Junmei Yang Chuan Zhang Shugong Xu Xiaohu You National Mobile Communications Research Laboratory Southeast University Nanjing China Intel Collaborative Research Institutes on Mobile Networking and Computing Intel Labs Shanghai China

ISBN: (纸本)9781479999897

In this paper, a low-complexity stochastic belief propagation (BP) detector for large-scale MIMO is first proposed. Its efficient hardware architecture, with parallel pipeline, is presented in detail. Thanks to the stochastic approach, all arithmetic operations of the detector are implemented with simple logic structures. Several approaches which can potentially improve the detection performance are exploited. Simulation results have demonstrated that the stochastic BP detector can achieve similar detection performance compared with deterministic one for 32 × 32 MIMO system with 4-quadrature amplitude modulation (4-QAM). With the increase of antenna number, the detection performance improves at the linear expense of complexity and latency. Therefore, the proposed stochastic BP detector is suitable for large-scale MIMO system applications with good balance of detection performance and implementation complexity.

关键词： Detectors MIMO Stochastic processes Computer architecture Hardware Complexity theory Logic gates

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Polar code-based error correction code scheme for NAND flash memory applications

Polar code-based error correction code scheme for NAND flash...

引用

International Conference on Wireless Communications and Signal Processing (WCSP)

作者： Haochuan Song Chuan Zhang Shunqing Zhang Xiaohu You National Mobile Communications Research Laboratory Southeast University Nanjing China Intel Collaborative Research Institutes on Mobile Networking and Computing Intel Labs Shanghai China

ISBN: (纸本)9781509028610

With the development of flash technology, multilevel per cell (MLC) NAND flash memory has mastered the key market because of its storage capacity superiority. However, excessive density increment leads to decay of reliability of MLC NAND flash memory, thus an appropriate error correction code (ECC) is required to address this issue. This paper presents an efficient multi-strategy ECC scheme called pre-check scheme which consists of hard, quantized-soft, and pure-soft decoders geared to MLC NAND flash memory based on polar code proposed by E. Arikan to overcome the aforementioned drawbacks with better performance and lower complexity. The hard decoder is designed to correct the majority of erroneous codewords in the initial phase of the flash memory, while the soft decoders aim to correct codewords which contain larger amount of errors. In addition, we clarify that the mapping scheme using Gray code can achieve best performance compared to other alternatives.

关键词： Decoding Error correction codes Computer architecture Microprocessors Standards Sensors Reflective binary codes

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Steepest Descent Method Based Soft-Output Detection for Massive MIMO Uplink

Steepest Descent Method Based Soft-Output Detection for Mass...

引用

IEEE Workshop on Signal Processing Systems (SIPS)

作者： Ye Xue Chuan Zhang Shunqing Zhang Zhizhen Wu Xiaohu You National Mobile Communications Research Laboratory Southeast University Nanjing China Intel Collaborative Research Institutes on Mobile Networking and Computing Intel Labs Shanghai China

ISBN: (纸本)9781509033621

For linear minimum mean square error (MMSE) detection massive multiple-input multiple-output (MIMO) system uplink, the convergence rate of some iterative methods such as conjugate gradient (CG) slows down with more complicated antenna configurations. And the conventional Cholesky method relies on a higher computational complexity to achieve a better performance. In this paper, we introduce the steepest descent (SD)-based soft-output method to solve the reduction of convergence rate with a low complexity by introducing an effective preconditioner. Further more, an efficient approximated method with much lower complexity to calculate the log-likelihood ratios (LLRs) is proposed. The analytical as well as the numerical results have indicated the proposed SD-based method outperforms the recent proposed classical Conjugate Gradient (CG) method with around 1 dB performance improvement at the BER of 10 -3 , and also achieves 75% complexity reduction from conventional Cholesky approach.

关键词： MIMO Convergence Antennas Matrix decomposition Uplink Computational complexity

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Efficient architecture for soft-output massive MIMO detection with Gauss-Seidel method

Efficient architecture for soft-output massive MIMO detectio...

引用

International Symposium on Circuits and Systems

作者： Zhizhen Wu Chuan Zhang Ye Xue Shugong Xu Xiaohu You National Mobile Communications Research Laboratory Southeast University Nanjing China Intel Collaborative Research Institutes on Mobile Networking and Computing Intel Labs Shanghai China

ISBN: (纸本)9781479953424

In massive multiple-input multiple-output (MIMO) uplink, the minimum mean square error (MMSE) algorithm is near-optimal and linear, but still suffers from high-complexity of matrix inversion. Based on Gauss-Seidel (GS) method, an efficient architecture for massive MIMO soft-output detection is proposed in this paper. To further accelerate the convergence rate of the conventional GS method with acceptable overhead complexity, a truncated Neumann series of the first 2 terms, is employed for initialization. The architecture can meet various application requirements by flexibly adjusting the number of iterations. FPGA implementation for a 128 × 8 MIMO demonstrates its advantages in both hardware efficiency and flexibility.

关键词： VLSI Massive MIMO Gauss-Seidel method soft-output MMSE Neumann series

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Low-complexity adaptive successive cancellation list polar decoder based on relaxed sorting

Low-complexity adaptive successive cancellation list polar d...

引用

International Conference on Wireless Communications and Signal Processing (WCSP)

ISBN: (纸本)9781467376884

Due to its advantage of performance over other algorithms, successive cancellation list (SCL) decoding has become one of the most favorable algorithms for polar codes. However, it still suffers a lot from the linear increasing complexity with list size l. In this paper, an adaptive SCL polar decoder based relaxed sorting (RS) approach is proposed, which successfully reduces the sorting complexity by simplifying the list size with proposed metrics. First, we partition the candidate list simply by the mean of metrics, which certainly results in performance degradation compared to the conventional SCL decoder. Then a scaling factor is introduced to narrow the performance gap. The scaling factor is determined on the proposed Trade-off Metric between Performance and Complexity (TMPC) via numerical simulations. Comparison results have shown that the proposed adaptive SCL decoder can achieve similar decoding performance as the conventional SCL decoder with at least 10% reduction on the average list size and overall computational complexity.

关键词： Decoding Measurement Sorting Computational complexity Bit error rate Degradation

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