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IEEE International Conference on Acoustics, Speech and Signal Processing

作者： Javier S. Turek Theodore L. Willke Po-Hsuan Chen Peter J. Ramadge Parallel Computing Lab Intel Labs Hillsboro Oregon USA Department of Electrical Engineering Princeton University New Jersey USA

ISBN: (纸本)9781509041183

Practical limitations on the duration of individual fMRI scans have led neuroscientist to consider the aggregation of data from multiple subjects. Differences in anatomical structures and functional topographies of brains require aligning data across subjects. Existing functional alignment methods serve as a preprocessing step that allows subsequent statistical methods to learn from the aggregated multi-subject data. Despite their success, current alignment methods do not leverage the labeled data used in the subsequent methods. In this work we propose a semi-supervised scheme that simultaneously learns the alignment and performs the analysis. We derive a specific instance of the scheme using the Shared Response Model for alignment and Multinomial Logistic Regression for classification. In our experiments this method improves the average classification accuracy from 65.5% to 68.5%, and from 5.3% to 6.1% over the independently-trained methods. Furthermore, our method achieves similar prediction with almost half the samples used for alignment.

关键词： fMRI functional alignment shared response model semi-supervised method

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Blackout: Speeding up recurrent neural network language models with very large vocabularies 4

Blackout: Speeding up recurrent neural network language mode...

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4th International Conference on Learning Representations, ICLR 2016

作者： Ji, Shihao Vishwanathan, S.V.N. Satish, Nadathur Anderson, Michael J. Dubey, Pradeep Parallel Computing Lab. Intel India Univ. of California Santa Cruz United States

We propose BlackOut, an approximation algorithm to efficiently train massive recurrent neural network language models (RNNLMs) with million word vocabularies. BlackOut is motivated by using a discriminative loss, and we describe a weighted sampling strategy which significantly reduces computation while improving stability, sample efficiency, and rate of convergence. One way to understand BlackOut is to view it as an extension of the DropOut strategy to the output layer, wherein we use a discriminative training loss and a weighted sampling scheme. We also establish close connections between BlackOut, importance sampling, and noise contrastive estimation (NCE). Our experiments, on the recently released one billion word language modeling benchmark, demonstrate scalability and accuracy of BlackOut;we outperform the state-of-the art, and achieve the lowest perplexity scores on this dataset. Moreover, unlike other established methods which typically require GPUs or CPU clusters, we show that a carefully implemented version of BlackOut requires only 1-10 days on a single machine to train a RNNLM with a million word vocabulary and billions of parameters on one billion words. Although we describe BlackOut in the context of RNNLM training, it can be used to any networks with large softmax output layers. © ICLR 2016: San Juan, Puerto Rico. All Rights Reserved.

关键词： Approximation algorithms

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Translation validation of loop and arithmetic transformations in the presence of recurrences 2016

Translation validation of loop and arithmetic transformation...

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17th ACM SIGPLAN/SIGBED Conference on Languages, Compilers, Tools and Theory for Embedded Systems, LCTES 2016

作者： Banerjee, Kunal Mandal, Chittaranjan Sarkar, Dipankar Department of Computer Science and Engineering Indian Institute of Technology Kharagpur India Intel Parallel Computing Lab Bangalore India

ISBN: (纸本)9781450343169

Compiler optimization of array-intensive programs involves extensive application of loop transformations and arithmetic transformations. Hence, translation validation of array-intensive programs requires manipulation of intervals of integers (representing domains of array indices) and relations over such intervals to account for loop transformations and simplification of arithmetic expressions to handle arithmetic transformations. A major obstacle for verification of such programs is posed by the presence of recurrences, whereby an element of an array gets defined in a statement S inside a loop in terms of some other element(s) of the same array which have been previously defined through the same statement S. Recurrences lead to cycles in the data-dependence graph of a program which make dependence analyses and simplifications (through closed-form representations) of the data transformations difficult. Another technique which works better for recurrences does not handle arithmetic transformations. In this work, array data-dependence graphs (ADDGs) are used to represent both the original and the optimized versions of the program and a validation scheme is proposed where the cycles due to recurrences in the ADDGs are suitably abstracted as acyclic subgraphs. Thus, this work provides a unified equivalence checking framework to handle loop and arithmetic transformations along with most of the recurrences - this combination of features had not been achieved by a single verification technique earlier. ©2016 ACM.

关键词： Application programs

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Wordrank: Learning word embeddings via robust ranking

Wordrank: Learning word embeddings via robust ranking

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2016 Conference on Empirical Methods in Natural Language Processing, EMNLP 2016

作者： Ji, Shihao Yun, Hyokun Yanardag, Pinar Matsushima, Shin Vishwanathan, S.V.N. Parallel Computing Lab Intel Amazon Purdue University United States University of Tokyo Japan Univ. of California Santa Cruz United States

ISBN: (纸本)9781945626258

Embedding words in a vector space has gained a lot of attention in recent years. While state-of-the-art methods provide efficient computation of word similarities via a low-dimensional matrix embedding, their motivation is often left unclear. In this paper, we argue that word embedding can be naturally viewed as a ranking problem due to the ranking nature of the evaluation metrics. Then, based on this insight, we propose a novel framework WordRank that efficiently estimates word representations via robust ranking, in which the attention mechanism and robustness to noise are readily achieved via the DCG-like ranking losses. The performance of WordRank is measured in word similarity and word analogy benchmarks, and the results are compared to the state-of-the-art word embedding techniques. Our algorithm is very competitive to the state-of-the- arts on large corpora, while outperforms them by a significant margin when the training set is limited (i.e., sparse and noisy). With 17 million tokens, WordRank performs almost as well as existing methods using 7.2 billion tokens on a popular word similarity benchmark. Our multi-node distributed implementation of WordRank is publicly available for general usage. © 2016 Association for Computational Linguistics

关键词： Vector spaces

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Data-race detection: The missing piece for an end-to-end semantic equivalence checker for parallelizing transformations of array-intensive programs 3

Data-race detection: The missing piece for an end-to-end sem...

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3rd ACM SIGPLAN International Workshop on Libraries, Languages, and Compilers for Array Programming, ARRAY 2016

作者： Banerjee, Kunal Banerjee, Soumyadip Sarkar, Santonu Dept of Computer Sc and Engg IIT Kharagpur India Dept of CSIS BITS Pilani-Goa India Intel Parallel Computing Lab. Bangalore India

ISBN: (纸本)9781450343848

The parallelizing transformation (hand-crafted or compiler-assisted) is error prone as it is often performed without verifying any semantic equivalence with the sequential counterpart. Even when the parallel program can be proved to be semantically equivalent with its corresponding sequential program, detecting data-race conditions in the parallel program remains a challenge. In this paper, we propose a formal verification approach that can detect data-race conditions while verifying the computational semantic equivalence of parallelizing loop transformations. We propose a coloured array data dependence graph (C-ADDG) based modeling of a program for verification of program equivalence as well as data-race condition detection across parallel loops. We have tested our tool on a set of Rodinia and PLuTo+ benchmarks and shown that our method is sound, whereby the method does not produce any false-positive program equivalence or data-race condition. © 2016 ACM.

关键词： Software testing

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Quantum Neuron: An elementary building block for machine learning on quantum computers

arXiv

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arXiv 2017年

作者： Cao, Yudong Guerreschi, Gian Giacomo Aspuru-Guzik, Alán Department of Chemistry and Chemical Biology Harvard University CambridgeMA02138 United States Parallel Computing Lab Intel Corporation Santa ClaraCA95054 Canadian Institute for Advanced Research TorontoONM5G 1Z8 Canada

Even the most sophisticated artificial neural networks are built by aggregating substantially identical units called neurons. A neuron receives multiple signals, internally combines them, and applies a non-linear function to the resulting weighted sum. Several attempts to generalize neurons to the quantum regime have been proposed, but all proposals collided with the difficulty of implementing non-linear activation functions, which is essential for classical neurons, due to the linear nature of quantum mechanics. Here we propose a solution to this roadblock in the form of a small quantum circuit that naturally simulates neurons with threshold activation. Our quantum circuit defines a building block, the "quantum neuron", that can reproduce a variety of classical neural network constructions while maintaining the ability to process superpositions of inputs and preserve quantum coherence and entanglement. In the construction of feedforward networks of quantum neurons, we provide numerical evidence that the network not only can learn a function when trained with superposition of inputs and the corresponding output, but that this training suffices to learn the function on all individual inputs separately. When arranged to mimic Hopfield networks, quantum neural networks exhibit properties of associative memory. Patterns are encoded using the simple Hebbian rule for the weights and we demonstrate attractor dynamics from corrupted inputs. Finally, the fact that our quantum model closely captures (traditional) neural network dynamics implies that the vast body of literature and results on neural networks becomes directly relevant in the context of quantum machine learning. Copyright © 2017, The Authors. All rights reserved.

关键词： Neurons

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Graphicionado: A high-performance and energy-efficient accelerator for graph analytics 49

Graphicionado: A high-performance and energy-efficient accel...

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IEEE/ACM International Symposium on Microarchitecture (MICRO)

作者： Tae Jun Ham Lisa Wu Narayanan Sundaram Nadathur Satish Margaret Martonosi Princeton University University of California Berkeley Parallel Computing Lab Intel Corporation

ISBN: (纸本)9781509035090

Graphs are one of the key data structures for many real-world computing applications and the importance of graph analytics is ever-growing. While existing software graph processing frameworks improve programmability of graph analytics, underlying general purpose processors still limit the performance and energy efficiency of graph analytics. We architect a domain-specific accelerator, Graphicionado, for high-performance, energy-efficient processing of graph analytics workloads. For efficient graph analytics processing, Graphicionado exploits not only data structure-centric datapath specialization, but also memory subsystem specialization, all the while taking advantage of the parallelism inherent in this domain. Graphicionado augments the vertex programming paradigm, allowing different graph analytics applications to be mapped to the same accelerator framework, while maintaining flexibility through a small set of reconfigurable blocks. This paper describes Graphicionado pipeline design choices in detail and gives insights on how Graphicionado combats application execution inefficiencies on general-purpose CPUs. Our results show that Graphicionado achieves a 1.76-6.54x speedup while consuming 50-100x less energy compared to a state-of-the-art software graph analytics processing framework executing 32 threads on a 16-core Haswell Xeon processor.

关键词： Software Programming Software algorithms Machine learning algorithms System-on-chip Pipelines Memory management

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High Performance parallel Stochastic Gradient Descent in Shared Memory

High Performance Parallel Stochastic Gradient Descent in Sha...

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International Symposium on parallel and Distributed Processing (IPDPS)

作者： Scott Sallinen Nadathur Satish Mikhail Smelyanskiy Samantika S. Sury Christopher Ré University of British Columbia Parallel Computing Lab Intel Corporation Stanford University

ISBN: (纸本)9781509021413

Stochastic Gradient Descent (SGD) is a popular optimization method used to train a variety of machine learning models. Most of SGD work to-date has concentrated on improving its statistical efficiency, in terms of rate of convergence to the optimal solution. At the same time, as parallelism of modern CPUs continues to increase through progressively higher core counts, it is imperative to understand the parallel hardware efficiency of SGD, which often comes at odds with its statistical efficiency. In this paper, we explore several modern parallelization methods of SGD on a shared memory system, in the context of sparse and convex optimization problems. Specifically, we develop optimized parallel implementations of several SGD algorithms, and show that their parallel efficiency is severely limited by inter-core communication. We propose a new, scalable, communication-avoiding, many-core friendly implementation of SGD, called HogBatch, which exposes parallelism on several levels, minimizes the impact on statistical efficiency, and, as a result significantly outperforms the other methods. On a variety of datasets, HogBatch demonstrates near linear scalability on a system with 14 cores, as well as delivers up to a 20X speedup over previous methods.

关键词： Computational modeling Instruction sets Indexes Data models parallel processing Hardware Stochastic processes

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High Performance Emulation of Quantum Circuits 16

High Performance Emulation of Quantum Circuits

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Supercomputing Conference

作者： Thomas Häner Damian S. Steiger Mikhail Smelyanskiy Matthias Troyer ETH Zurich Institute for Theoretical Physics Zurich Switzerland Parallel Computing Lab Intel Corporation

ISBN: (纸本)9781467388153

As quantum computers of non-trivial size become available in the near future, it is imperative to develop tools to emulate small quantum computers. This allows for validation and debugging of algorithms as well as exploring hardware-software co-design to guide the development of quantum hardware and architectures. The simulation of quantum computers entails multiplications of sparse matrices with very large dense vectors of dimension 2n, where n denotes the number of qubits, making this a memory-bound and network bandwidth-limited application. We introduce the concept of a quantum computer emulator as a component of a software framework for quantum computing, enabling a significant performance advantage over simulators by emulating quantum algorithms at a high level rather than simulating individual gate operations. We describe various optimization approaches and present benchmarking results, establishing the superiority of quantum computer emulators in terms of performance.

关键词： Quantum computing Logic gates Computers Computational modeling Emulation Sparse matrices Optimization

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Design and Implementation of a parallel Research Kernel for Assessing Dynamic Load-Balancing Capabilities

Design and Implementation of a Parallel Research Kernel for ...

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International Symposium on parallel and Distributed Processing (IPDPS)

作者： Evangelos Georganas Rob F. Van Der Wijngaart Timothy G. Mattson University of California at Berkeley Berkeley CA USA Parallel Comput. Lab. Intel Corp Santa Clara CA US Parallel Computing Lab Intel Corp. USA

ISBN: (纸本)9781509021413

The parallel Research Kernels (PRK) are a tool to study parallel architectures and runtime systems from an application perspective. It provides paper and pencil specifications and reference implementations of elementary operations covering a broad range of parallel application patterns. The current PRK are trivially statically load-balanced. Future large-scale systems will require dynamic load balancing for unsteady workloads and for handling system/network fluctuations and non-uniformities. We present a new PRK that requires dynamic load balancing, and provides knobs for controlling workload behavior. It is inspired by Particle-In-Cell (PIC) applications and captures one of the computational patterns in such codes. We give a detailed specification of the new PRK, highlighting the challenges and corresponding design choices that make it compact, arbitrarily scalable and self-verifying. We also present implementations of the PIC PRK in MPI, with and without application-specific load balancing, and show an implementation with runtime-assisted load balancing provided by Adaptive MPI features. Our experimental results provide an illustrative example of how PIC can be used to assess the load-balancing capabilities of modern parallel runtimes.

关键词： Load management Kernel Runtime Force Electrostatics Mathematical model Load modeling

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