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Learning representations that are closed-form Monge mapping optimal with application to domain adaptation

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arXiv 2023年

作者： Struckmeier, Oliver Redko, Ievgen Mallasto, Anton Arndt, Karol Heinonen, Markus Kyrki, Ville Aalto University Finland Intelligent Robotics Group Finland Noah's Ark Lab Huawei Technologies Hong Kong Department of Computer Science Finland

Optimal transport (OT) is a powerful geometric tool used to compare and align probability measures following the least effort principle. Despite its widespread use in machine learning (ML), OT problem still bears its computational burden, while at the same time suffering from the curse of dimensionality for measures supported on general high-dimensional spaces. In this paper, we propose to tackle these challenges using representation learning. In particular, we seek to learn an embedding space such that the samples of the two input measures become alignable in it with a simple affine mapping that can be calculated efficiently in closed-form. We then show that such approach leads to results that are comparable to solving the original OT problem when applied to the transfer learning task on which many OT baselines where previously evaluated in both homogeneous and heterogeneous DA settings. The code for our contribution is available at https://***/Oleffa/LaOT. Copyright © 2023, The Authors. All rights reserved.

关键词： Mapping

Local Gaussian Modifiers (LGMs): UAV Dynamic Trajectory Generation for Onboard Computation

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Local Gaussian Modifiers (LGMs): UAV Dynamic Trajectory Gene...

International Conference on Unmanned Aircraft Systems (ICUAS)

作者： Miguel Fernandez-Cortizas David Perez-Saura Rafael Perez-Segui Javier Rodriguez-Vazquez Juan S. Cely Pascual Campoy Computer Vision and Aerial Robotics group (CVAR) Centre for Automation and Robotics (CAR) Universidad Politécnica de Madrid (UPM) Madrid Spain Department of Artificial Intelligence Universidad Politécnica de Madrid Madrid Spain Intelligent Robotics Lab Rey Juan Carlos University Madrid Spain

ISBN: (数字)9798350357882

ISBN: (纸本)9798350357899

Agile autonomous drones are becoming increasingly popular in research due to the challenges they represent in fields like control, state estimation, or perception at high speeds. When all algorithms are computed onboard the UAV, computational limitations make the task of agile flight even more difficult. One of the most computationally expensive tasks in agile flight is the generation of optimal trajectories. When these trajectories must be updated online due to changes in the environment or uncertainties, this high computational cost may result in insufficient time to reach the desired waypoints, which could cause a drone crash in cluttered environments. In this paper, we present Local Gaussian Modifiers (LGMs), a fast and lightweight way of modifying computationally heavy trajectories when recalculating them in time is not possible due to computational limitations. Moreover, we propose a strategy for deciding when is convenient to use these modifiers or recalculate the whole trajectory based on an estimation of the computational time of this trajectory generation. A trajectory blending procedure is also proposed to ensure smoothness in UAV control when a new trajectory is computed. Our approach was validated in simulation, being able to pass through a race circuit with moving gates, achieving speeds up to 16.0 m/s. Real flight validation was also performed achieving speeds up to 4.0 m/s in a fully autonomous pipeline using onboard computing.

关键词： Uncertainty Pipelines Logic gates Autonomous aerial vehicles Robustness Motion capture Trajectory

Hardware-in-the-loop simulation of a UAV autonomous landing algorithm implemented in SoC FPGA

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arXiv 2022年

作者： Szolc, Hubert Kryjak, Tomasz Embedded Vision Systems Group Computer Vision Laboratory Department of Automatic Control and Robotics AGH University of Science and Technology Krakow Poland

This paper presents a system for hardware-in-the-loop (HiL) simulation of unmanned aerial vehicle (UAV) control algorithms implemented on a heterogeneous SoC FPGA computing platforms. The AirSim simulator running on a PC and an Arty Z7 development board with a Zynq SoC chip from AMD Xilinx were used. Communication was carried out via a serial USB link. An application for autonomous landing on a specially marked landing strip was selected as a case study. A landing site detection algorithm was implemented on the Zynq SoC platform. This allowed processing a 1280 × 720 @ 60 fps video stream in real time. Performed tests showed that the system works correctly and there are no delays that could negatively affect the stability of the control. The proposed concept is characterised by relative simplicity and low implementation cost. At the same time, it can be applied to test various types of high-level perception and control algorithms for UAV implemented on embedded platforms. We provide the code developed on GitHub, which includes both Python scripts running on the PC and C code running on Arty Z7. © 2022, CC BY.

关键词： System-on-chip

Energy Efficient Hardware Acceleration of Neural Networks with Power-of-Two Quantisation

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TechRxiv

TechRxiv 2022年

作者： Przewlocka-Rus, Dominika Kryjak, Tomasz Embedded Vision Systems Group Computer Vision Laboratory Department of Automatic Control and Robotics AGH University of Science and Technology Krakow Poland

Deep neural networks virtually dominate the domain of most modern vision systems, providing high performance at a cost of increased computational complexity. Since for those systems it is often required to operate both in real-time and with minimal energy consumption (e.g., for wearable devices or autonomous vehicles, edge Internet of Things (IoT), sensor networks), various network optimisation techniques are used, e.g., quantisation, pruning, or dedicated lightweight architectures. Due to the logarithmic distribution of weights in neural network layers, a method providing high performance with significant reduction in computational precision (for 4-bit weights and less) is the Power-of-Two (PoT) quantisation (and therefore also with a logarithmic distribution). This method introduces additional possibilities of replacing the typical for neural networks Multiply and ACcumulate (MAC – performing, e.g., convolution operations) units, with more energy-efficient Bitshift and ACcumulate (BAC). In this paper, we show that a hardware neural network accelerator with PoT weights implemented on the Zynq UltraScale + MPSoC ZCU104 SoC FPGA can be at least 1.4x more energy efficient than the uniform quantisation version. To further reduce the actual power requirement by omitting part of the computation for zero weights, we also propose a new pruning method adapted to logarithmic quantisation. © 2022, CC BY.

关键词： System-on-chip

Towards real-time and energy efficient Siamese tracking - a hardware-software approach

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TechRxiv

TechRxiv 2022年

Siamese trackers have been among the state-of-the-art solutions in each Visual Object Tracking (VOT) challenge over the past few years. However, with great accuracy comes great computational complexity: to achieve real-time processing, these trackers have to be massively parallelised and are usually run on high-end GPUs. Easy to implement, this approach is energy consuming, and thus cannot be used in many low-power applications. To overcome this, one can use energy-efficient embedded devices, such as heterogeneous platforms joining the ARM processor system with programmable logic (FPGA). In this work, we propose a hardware-software implementation of the well-known fully connected Siamese tracker (SiamFC). We have developed a quantised Siamese network for the FINN accelerator, using algorithm-accelerator co-design, and performed design space exploration to achieve the best efficiency-to-energy ratio (determined by FPS and used resources). For our network, running in the programmable logic part of the Zynq UltraScale+ MPSoC ZCU104, we achieved the processing of almost 50 frames-per-second with tracker accuracy on par with its floating point counterpart, as well as the original SiamFC network. The complete tracking system, implemented in ARM with the network accelerated on FPGA, achieves up to 17 fps. These results bring us towards bridging the gap between the highly accurate but energy-demanding algorithms and energy-efficient solutions ready to be used in low-power, edge systems. © 2022, CC BY.

关键词： Field programmable gate arrays (FPGA)

Playing cards and bidding calls detection for automatic registration of a duplicate bridge game

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TechRxiv

TechRxiv 2022年

作者： Wzorek, Piotr Kryjak, Tomasz Embedded Vision Systems Group Computer Vision Laboratory Department of Automatic Control and Robotics AGH University of Science and Technology Krakow Poland

In this work, the implementation of a playing cards and bidding calls detection system for the automatic registration of a duplicate bridge game is presented. For this purpose, two YOLOv4 deep convolutional neural networks were used. During the training process, which was carried out using an automatically generated dataset, we obtained a detector characterised by more than 99.9% accuracy on the test set. The prepared system has been evaluated on videos collected during bridge competitions and is characterised by high accuracy. The application has been implemented and evaluated on a CPU and an embedded GPU. © 2022, CC BY.

关键词： Deep neural networks

Energy Efficient Hardware Acceleration of Neural Networks with Power-of-Two Quantisation

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arXiv 2022年

关键词： System-on-chip

Towards real-time and energy efficient Siamese tracking - a hardware-software approach

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arXiv 2022年

关键词： Energy efficiency

Traffic Sign Classification Using Deep and Quantum Neural Networks

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arXiv 2022年

作者： Kuros, Sylwia Kryjak, Tomasz Embedded Vision Systems Group Computer Vision Laboratory Department of Automatic Control and Robotics AGH University of Science and Technology Kraków Poland

Quantum Neural Networks (QNNs) are an emerging technology that can be used in many applications including computer vision. In this paper, we presented a traffic sign classification system implemented using a hybrid quantum-classical convolutional neural network. Experiments on the German Traffic Sign Recognition Benchmark dataset indicate that currently QNN do not outperform classical DCNN (Deep Convolutuional Neural Networks), yet still provide an accuracy of over 90% and are a definitely promising solution for advanced computer vision. © 2022, CC BY.

关键词： Traffic signs