Chiral multifold fermions in solids exhibit unique band structures and topological properties, making them ideal for exploring fundamental physical phenomena related to nontrivial topology, chirality, and symmetry bre...
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Chiral multifold fermions in solids exhibit unique band structures and topological properties, making them ideal for exploring fundamental physical phenomena related to nontrivial topology, chirality, and symmetry breaking. However, the challenge of obtaining clean, flat surfaces through cleavage has hindered the investigation of their unique electronic states. In this study, we utilize high-resolution angle-resolved photoemission spectroscopy and density functional theory calculations to investigate the low-energy electronic structure of the cleavable single-crystal PdSbSe. Our combined experimental and theoretical analysis reveals the presence of multifold-degenerate fermions within this chiral crystal. We also observe multiple chiral Fermi arc surface states and spin-splitting behavior in the associated bulk bands. These findings provide unique insights into chiral, multifold fermionic states in easily cleavable crystals and offer a robust platform for further research into their unique electronic properties and potential applications in novel electronic devices.
The quantization noise leakage of the first stage in a MASH21 sigma-delta modulator is analyzed. The results show that the finite DC gain of the opamp is the main reason for noise leakage, and finite GBW and SR only g...
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The quantization noise leakage of the first stage in a MASH21 sigma-delta modulator is analyzed. The results show that the finite DC gain of the opamp is the main reason for noise leakage, and finite GBW and SR only generate harmonic distortion. The relationship between DC gain and leakage is modeled and conclusions on design criteria are reached. As an example, a MASH21 modulator for a digital audio application is realized. This modulator, fabricated in an 0.18 μm mixed signal process, achieves an SNDR of 91 dB with 1.8 V supply, which verifies the analysis and design criteria.
This paper introduces a new method for SC sigma-delta modulator *** studies the integrator's different equivalent circuits in the integrating and sampling *** model uses the OP-AMP input pair's tail current(I_0) a...
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This paper introduces a new method for SC sigma-delta modulator *** studies the integrator's different equivalent circuits in the integrating and sampling *** model uses the OP-AMP input pair's tail current(I_0) and overdrive voltage(v_(on)) as *** modulator's static and dynamic errors are analyzed.A group of optimized I0 and von for maximum SNR and power x area ratio can be obtained through this *** examples, a MASH21 modulator for digital audio and a second order modulator for RFID baseband are implemented and tested, and they can achieve 91 dB and 72 dB respectively,which verifies the modeling and design criteria.
This paper proposes a novel technique of dynamic context management scheme for coarse-grained reconfigurable array DSP architecture, which effectively reduces the power consumption and speedup reconfigurable process. ...
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ISBN:
(纸本)9781424438686
This paper proposes a novel technique of dynamic context management scheme for coarse-grained reconfigurable array DSP architecture, which effectively reduces the power consumption and speedup reconfigurable process. The technique permits background loading of configuration data without interrupting the regular execution, overlapping computation with reconfiguration. And stored configurations can be switched dramatically reducing reconfiguration overhead if the next configuration is present in one of the alternate contexts. The proposed technique has been verified in ReMAP (Reconfigurable Multi-media Array Processors) with the Discrete Cosine Transform (DCT) of H.264 and its performance exceed other DSP and multimedia extension architectures by 1.2x to 6.2x. ReMAP was fabricated with SMIC's 0.18um CMOS process mainly for multi-media applications(1).
Performance of content-based image retrieval technology used in clothing image retrieval cannot meet user's requirement due to the 'semantic gap' between low-level visual features and the richness of human...
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This paper proposes a novel programmable power monitor chip. With only three program pins and without any off-chip devices, the chip has 36-program states by taking different connections for the 3-program pins. The ch...
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ISBN:
(纸本)9781424467372
This paper proposes a novel programmable power monitor chip. With only three program pins and without any off-chip devices, the chip has 36-program states by taking different connections for the 3-program pins. The chip can monitor the voltage from 1.5v to 5.0v with 0.1v step. Special SH circuit and current limited digital blocks are employed to achieve ultra low quiescent power. The implementation is based on 2M1P 0.5um mixed signal process, the die area is 0.24mm2, and the quiescent current is only 3uA.
In OFDM system, because of sensitivity to carrier frequency offset, frequency offset must be compensated before DFT in the receiver. In this paper, we present a maximum likelihood estimation for carrier frequency offs...
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ISBN:
(纸本)9957486004
In OFDM system, because of sensitivity to carrier frequency offset, frequency offset must be compensated before DFT in the receiver. In this paper, we present a maximum likelihood estimation for carrier frequency offset, based on OFDM symbol has no virtual sub-carriers. The estimation are compose of two parts, blind estimation makes use of cyclic prefix for every symbol and data-aid estimation makes use of two consequent OFDM symbols which are similar or relative to each other. Data-aid estimation performs well and simulation result converges upon Cramer-Rao lower bound. Blind estimation performs inferior, but it can be used in tracking mode.
Currently the ASIC applications such as multimedia processing require shorter time-to-market and higher performance. Furthermore, with the IC manufacturing technology developing continually, from transistor level to l...
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Non-recurring-engineering(NRE)and time-to-market play an increasingly important role in the field of IC ***,with the continuous development of IC manufacturing technology,it is necessary to propose a novel design meth...
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Non-recurring-engineering(NRE)and time-to-market play an increasingly important role in the field of IC ***,with the continuous development of IC manufacturing technology,it is necessary to propose a novel design methodology to shorten design cycle and enhance design *** this paper,operator design methodology(ODM)is presented and an H.264 encoder is implemented as a *** to the flow of ODM,the register transfer level(RTL)design of H.264 encoder has been accomplished with 15 man-months,which is lower than the average 19 man-months in the field of traditional application specific integrated circuit(ASIC)***,with the advantage of operator design library,the design has a comparable performance with other ASIC *** obtained design can support a real-time video encoding of 720p at 60 frames per second or 1080p at 30 frames per second,working at 167 MHz with SMIC 0.13 μm CMOS *** results provide good evidence for the practicability and efficiency of ODM.
Verification of processors with high performance is becoming more and more time-consuming and even gradually turning into the bottleneck of the processor design. The Verification of Reconfiguralbe Multimedia Array Pro...
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