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International Symposium on High Density Packaging and Microsystem Integration 2007, HDP'07

作者： Xu, Mei-Hua Cheng, Yu-Lan Ran, Feng Chen, Zhang-Jin Key Laboratory of Advanced Displays and System Application Ministry of Education Shanghai University 149 Yanchang Rd. Shanghai 200072 China School of Mechatronical Engineering and Automation Shanghai University 149 Yanchang Rd. Shanghai 200072 China Microelectronic Research and Development Center Shanghai University Shanghai Shanghai 200072 China

ISBN: (纸本)1424412536

Based on the research of CABAC arithmetic and the decoding flow, the paper indicates the bottleneck in CABAC decoding process and presents a novel architecture of CABAC decoder which takes optimization design for main function modules. Detail design for its architecture and function modules is described in the paper. Simulation and FPGA verification are implemented, and the results show that the decoder can increase the decoding speed efficiently and meet the demand of real-time high level video communication. © 2007 IEEE.

关键词： Field programmable gate arrays (FPGA)

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The instruction fetch unit design of embedded ultra-micro processor

The instruction fetch unit design of embedded ultra-micro pr...

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International Symposium on High Density Packaging and Microsystem Integration 2007, HDP'07

作者： Chen, Zhang-Jin Jin, Zhe-Ming Xu, Mei-Hua Ran, Feng Computer Center Shanghai University 149 Yanchang Rd. Shanghai 200072 China Microelectronic Research and Development Center Shanghai University 149 Yanchang Rd. Shanghai 200072 China Key Laboratory of Advanced Displays and System Application Ministry of Education Shanghai University 149 Yanchang Rd. Shanghai 200072 China

ISBN: (纸本)1424412536

Based on the logic design of the ultra-micro processor core, an instruction fetch unit for the processor is proposed to enhance the performance of the processor when access to the memory is considered. The techniques of instruction prefetch and pipelining are adopted in design of the instruction fetch unit with emphasis on simple hardware implementation. © 2007 IEEE.

关键词： Microprocessor chips

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IC design of 2Ms/s 10-bit SAR ADC with low power

IC design of 2Ms/s 10-bit SAR ADC with low power

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International Symposium on High Density Packaging and Microsystem Integration 2007, HDP'07

作者： Cai, Jun Ran, Feng Xu, Mei-Hua Microelectronic Research and Development Center Shanghai University 149 Yanchang Rd. Shanghai 200072 China Key Laboratory of Advanced Displays and System Application Ministry of Education Shanghai University 149 Yanchang Rd. Shanghai 200072 China School of Mechatronical Engineering and Automation Shanghai University 149 Yanchang Rd. Shanghai 200072 China

This paper presents the development of a 2Ms/s 10-bit very low-power CMOS SAR ADC which is realized in a 0.35 u m CMOS process. The design combines a capacitor array DAC, a dual-cross coupled pair comparator, and SAR ... 详细信息

ISBN: (纸本)1424412536

关键词： Analog to digital conversion

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Effects of surface-modified gate dielectrics on electrical characteristics of organic thin-film transistors

Pan Tao Ti Hsueh Pao/Chinese Journal of Semiconductors

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Pan Tao Ti Hsueh Pao/Chinese Journal of Semiconductors 2007年第10期28卷 1589-1593页

作者： Chen, Ling Zhu, Wenqing Bai, Yu Liu, Xiang Jiang, Xueyin Zhang, Zhilin Key Laboratory of Advanced Display and System Application Shanghai University Shanghai 200072 China School of Material Science and Engineering Shanghai University Shanghai 201800 China

Organic thin film transistors (OTFTs) with a modified gate insulator are demonstrated. The modified gate insulator layers consist of SiO2 as the gate insulator and OTS (octadecyltrichlorosilane) or PMMA (poly methyl methacylate) as the modified layer. The devices with the modified layer have a field-effect mobility larger than 10-3 cm2/(V·s) and an on/off current ratio greater than 104, while their leakage current is decreased to 10-10 A. The results demonstrate that using modified gate insulators is an effective method to fabricate OTFTs with improved electric characteristics.

关键词： Thin film transistors

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Second order multi-scale micropolar model for microsystem interconnections

Second order multi-scale micropolar model for microsystem in...

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第五届国际非线性力学会议

作者： Johan Liu Ragnar Larsson Key Laboratory of Advanced Display and System Applications Shanghai University SMIT Center & Department of Microtechnology and Nanoscience Chalmers University of Technology Department of Applied Mechanics Chalmers University of Technology

Anisotropic conductive adhesives(ACAs)are widely used in microsystem packaging due to their superior *** ACA joints are usually much smaller in scale than the neighboring adherends,and there are even finer internal structures included in the thin interconnection *** great difference in scale among these constituents is a high challenge to both experimental technology and conventional numerical methods.A second order model based on micropolar theory is developed to take the mechanical responses of a typical internal structure in the ACA flip chip interconnection into *** addition,by considering the typical structure under unit deformation,this model could also provide the supplementary information with regard to the stiffness coefficients for a previously developed homogenization interface *** the simulation result obtained from the combination of two interface models agrees well with experimental observation.

关键词： ACA Second order multi-scale micropolar model for microsystem interconnections

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Arbitrary view generation based on DIBR

Arbitrary view generation based on DIBR

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IEEE International Symposium on Intelligent Signal Processing and Communication systems (ISPACS)

作者： Zhan-wei Liu Ping An Su-xing Liu Zhao-yang Zhang School of Communication and Information Engineering Shanghai University Shanghai P.R. China Ministry of Education Key Laboratory of Advanced Displays and System Application Shanghai P.R. China

An efficient depth image based rendering (DIBR) for generating arbitrary novel views is proposed. The proposed method fills the holes by preprocessing depth images and merging two desired images. In order to solve the visibility problem, the pixels in reference image are processed in an occlusion-compatible order. Furthermore, the reference images are corrected before 3D image warping so as to reduce the edge artifacts. Experimental results have show that the proposed method can provide a satisfactory image quality.

关键词： Rendering (computer graphics) Layout Pixel Cameras Signal generators Merging Image quality Filters Signal processing Laboratories

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Interactive arbitrary-view rendering system using fast IBR and depth correction

Interactive arbitrary-view rendering system using fast IBR a...

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IEEE International Symposium on Intelligent Signal Processing and Communication systems (ISPACS)

作者： Suxing Liu Zhaoyang Zhang Zhanwei Liu Ping An School of Communication and Information Engineering Shanghai University Shanghai P.R.China Key Laboratory of Advanced Displays and System Application Ministry of Education Shanghai P.R.China

Generating accurate geometric model of a real world environment and improving the rendering quality remained as the bottleneck problems in the field of arbitrary-view rendering. Inspired by the geometrical limitations between input images, we applied a fast image-based rendering (IBR) method for interactively synthesizing arbitrary-view. Although images form different views are needed, only "Region of Interest" (ROI) is used for the synthesis. Besides, a depth correction scheme based on plane-sweep algorithm was used to diminish visual artifact caused by insufficient geometric information. The good performance of our prototyped system has demonstrated the validity and potential of the proposed method.

关键词： Rendering (computer graphics) Layout Solid modeling Cameras Signal processing Geometry Pixel Hardware displays systems engineering education

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Reducing the Power Consumption of the AES S-Box by SSC

Reducing the Power Consumption of the AES S-Box by SSC

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第三届IEEE无线通讯、网络技术暨移动计算国际会议

作者： Jinyi Zhang Qinghua Zuo Tianbao Zhang Key Laboratory of Advanced Display and System Applications (Shanghai University) Ministry of Education Microelectronic Research & Development Center Shanghai University No.149 Yanchang Road Shanghai 200072 P.R.China

The advanced Encryption Standard (AES) algorithm has been accepted as the default choice in present security services. The S-Box as the key part in AES plays an important role for low-power design in the hardware implementation of the algorithm. About 75％ power consumption of an AES core is caused by the S-Box, so reducing the power of the S-Box is very efficient for the low-power design of the AES core. In this paper, the bus coding technique called Sequence-Switch Coding (SSC) is applied in the S-Box design. Input data are encoded in a certain sequence to reduce the transitions of the S-Box circuits. As a result, the power consumption in the combinational logic is brought down. The verification results show that about 10％ power has been reduced averagely in the experimental S-Box.

关键词： S-Box sequence-switch coding (SSC) AES

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Investigation of Dielectric Strength of Electrospun Nanofiber Based Thermal Interface Material

Investigation of Dielectric Strength of Electrospun Nanofibe...

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International Symposium on High Density Packaging and Microsystem Integration (HDP)

作者： Xu Wang Wenxuan Wang Xin Li Bjorn Carlberg Xiuzhen Lu Zhaonian Cheng Johan Liu Dongkai Shangguan Key Laboratory of Advanced Display and System Applications (Shanghai University) Ministry of Education & SMIT Centre Shanghai University Shanghai China SMIT Center & Department of Microtechnology and Nanoscience Chalmers University of Technology Goteborg Sweden

Electrospinning is a historical technology which has existed for over seventy years. Recently, it has been introduced to make a novel electrospun nanofiber based thermal interface material (nano-TIM). Until now, there are few articles on the dielectric properties of nanofiber. Since the electrical insulation property is an important parameter for thermal interface materials, we investigated the dielectric strength of electrospun nano-TIM in this paper. The experiment data have shown that the nano-TIM materials have dielectric strength of 5.82 kV/mm, which is believed to be adequate for microelectronics applications. Further analysis and FEM simulation further revealed the breakdown mechanism. Reasons for the low dielectric strength as compared with that of bulk polymer were also discussed in this paper.

关键词： Dielectric breakdown Dielectric materials Polymers Electronic packaging thermal management Nanostructured materials Conducting materials Voltage Surface morphology Heat transfer Surface resistance

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An aging study of intermetallic compounds formation in Sn-0.4Co-0.7Cu

An aging study of intermetallic compounds formation in Sn-0....

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International Symposium on High Density Packaging and Microsystem Integration (HDP)

作者： Lili Zhang Si Chen Peng Sun Zhaonian Cheng Johan Liu Key Laboratory of Advanced Display and System Applications (Shanghai University) Ministry of Education & SMIT Center Shanghai University Shanghai China SMIT Center & Department of Microsystem and Nanotechnology Chalmers University of Technology Gothenburg Sweden

Interfacial reactions between Sn-0.4Co-0.7Cu eutectic alloy and immersion Ni/Cu substrate have been investigated after reflow and high temperature storage. The reflow peak temperature at 265degC and a total duration time of 6 minutes were used. The duration time at the peak temperature of the reflow process was approximately 2 min. The aging temperature was 150degC and the duration time was 100 h, 200 h, 550 h and 1000 h, respectively. In the solder matrix of the Sn-0.4Co-0.7Cu alloy, the intermetallic compounds (IMC) CoSn 2 were found. At the interface between the solder alloy and the electroless nickel substrate, a ternary (Cu, Ni) 6 Sn 5 intermetallic compound was detected. The intermetallic compound layer became thicker as a function of thermal aging time. The IMCs were continuous and their morphology was faceted at the interface. No voids and gaps were observed at the interface between the nickel layer and the Sn-0.4Co-0.7Cu eutectic alloy after thermal aging.

关键词： Aging Intermetallic Temperature Environmentally friendly manufacturing techniques Lead Soldering Copper alloys Nickel alloys Testing Bonding

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