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A fine acquisition algorithm based on fast three-time FRFT for dynamic and weak GNSS signals

Journal of systems Engineering and Electronics 2023年第2期34卷 259-269页

作者： PAN YI ZHANG Sheng WANG Xiao LIU Manhao LUO Yiran Key Laboratory of Advanced Sensor and Integrated System Shenzhen International Graduate SchoolTsinghua UniversityShenzhen 518055China Department of Aeronautical and Aviation Engineering Hong Kong Polytechnic UniversityHong Kong 999077China

As high-dynamics and weak-signal are of two primary concerns of navigation using Global Navigation Satellite system(GNSS)signals,an acquisition algorithm based on threetime fractional Fourier transform(FRFT)is presented to simplify the calculation ***,the correlation results similar to linear frequency modulated(LFM)signals are derived on the basis of the high dynamic GNSS signal ***,the principle of obtaining the optimum rotation angle is analyzed,which is measured by FRFT projection lengths with two selected rotation ***,Doppler shift,Doppler rate,and code phase are accurately estimated in a real-time and low signal to noise ratio(SNR)wireless communication *** theoretical analysis and simulation results show that the fast FRFT algorithm can accurately estimate the high dynamic parameters by converting the traditional two-dimensional search process to only three times *** the acquisition performance is basically the same,the computational complexity and running time are greatly reduced,which is more conductive to practical application.

关键词： Global Navigation Satellite system(GNSS)signal fractional Fourier transform(FRFT) acquisition high-dynamics weak-signal

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A 32GHz Two-stage Frequency Synthesizer with 100MHz Reference using Injection Locked Technology 5

A 32GHz Two-stage Frequency Synthesizer with 100MHz Referenc...

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5th International Conference on Electronics and Communication, Network and Computer Technology, ECNCT 2023

作者： Li, Zhenhua Zhang, Sheng Tsinghua Shenzhen International Graduate School Key Laboratory of Advanced Sensor and Integrated System Shenzhen China

ISBN: (纸本)9798350328660

The article presents the design of a high-speed clock signal generation circuit which is capable of delivering high-speed clock signals at 8GHz and 32GHz. A two-stage architecture is used in the design to suppress in-band phase noise and improve the integral power efficiency respectively. In the first stage, a sub-sampling phase locked loop(SSPLL) with a dead-zone controlled frequency tracking loop is adopted to realize better frequency establishment and in-band phase noise performance. The second stage utilizes the intermediate signal and injection-locked voltage-controlled-oscillator(ILVCO) to achieve frequency multiplication in millimeter-wave frequency band. To guarantee the frequency selection characteristics of the LC tank and ease the ratio between the frequency of injected signals and the conduction time of differential injected transistors, two injection-locked frequency doublers with push-push topology are cascaded and four times frequency multiplication is presented. The frequency synthesizer is designed by TSMC 28nm CMOS process and achieves 70-fs jitter in the time domain with 42.6-mW power consumption at 32GHz and a figure of merit of-246.8dB. © 2023 IEEE.

关键词： Frequency synthesizers

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A Wavelength-Multiplexed Photonic Tensor Processor based on Mach-Zehnder Modulator 3

A Wavelength-Multiplexed Photonic Tensor Processor based on ...

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3rd International Conference on Laser, Optics, and Optoelectronic Technology, LOPET 2023

作者： Li, Hongfei Lin, Zeyu Zhang, Sheng Key Laboratory of Advanced Sensor and Integrated System Tsinghua Shenzhen International Graduate School Shenzhen518055 China

ISBN: (纸本)9781510667624

Photonic processors have shown great potential to replace electronic processors due to the high parallelism, low latency, and low power consumption of light. The current direction of integrated optical computing research is focused on realizing vector matrix multiplication in light, which is also called photonic tensor processor. There are two main implementation schemes of photonic tensor processors: coherent and wavelength division multiplexing, and the latter is represented by the micro-ring resonator (MRR) weight bank. However, the MRR is highly sensitive to the manufacturing error, and it takes a long time to calibrate before used for calculation, which makes the realization of a large-scale MRR weight bank a challenge. We propose a novel architecture of wavelength-multiplexed photonic tensor processor based on Mach-Zehnder modulators (MZMs), which can reduce the time and power cost of device calibration We implement a 4×4 optical convolution operator based on the above architecture, which is used to solve the MNIST handwritten digit recognition problem. Prediction accuracy of 91.72% is achieved compared with the accuracy 97.58% achieved by a computer. © 2023 SPIE.

关键词： Tensors

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MPICC: Multiple-Precision Inter-Combined MAC Unit with Stochastic Rounding for Ultra-Low-Precision Training 25

MPICC: Multiple-Precision Inter-Combined MAC Unit with Stoch...

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30th Asia and South Pacific Design Automation Conference, ASP-DAC 2025

作者： Huang, Leran Liu, Yongpan Lin, Xinyuan Wei, Chenhan Sun, Wenyu Wang, Zengwei Cao, Boran Zhang, Chi Fu, Xiaoxia Zhao, Wentao Zhang, Sheng Tsinghua Shenzhen International Graduate School Key Laboratory of Advanced Sensor and Integrated System Shenzhen China Tsinghua University Department of Electronic Engineering Beijing China

ISBN: (纸本)9798400706356

Recent studies have proved the feasibility of ultra-low-precision (≤ 8-bit) training. However, most of the existing operational circuits support only a few higher precisions (FP16, FP32, etc.) for multiplication, and the bit width for accumulation cannot be reduced, which results in low area and power efficiencies. In this paper, we propose MPICC, a multiple-precision Multiply-Accumulate (MAC) unit designed for ultra-low-precision training. It supports inter-combined computations across 18 different precision combinations, including LOG4 (radix-4 FP4), FP4, FP6, FP8, and INT4. It also reduces the accumulation precision from FP16 to FP12 through an optimized Stochastic Rounding (SR) strategy to further save logic resources. Moreover, a low-cost emulating controller, which time-division multiplexed the low-precision MAC unit, is also designed to accomplish high-precision computations for critical DNN layers. Compared with the existing multiple-precision computing units, the area/energy efficiencies of this design are improved by 1.17×/1.19× at FP8, and 4.69×/3.64× at FP4, respectively. The SR strategy further reduces the area/power consumption by 15.6%/14.9% of the floating-point accumulator. © 2025 Institute of Electrical and Electronics Engineers Inc.. All rights reserved.

关键词： Stochastic systems

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Design and Analysis of Surge Protection Circuit in the Memory Architecture of FeRAM 8

Design and Analysis of Surge Protection Circuit in the Memor...

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8th International Conference on Electronic Technology and Information Science, ICETIS 2023

作者： Yang, Dongsen Zhang, Sheng Key Laboratory of Advanced Sensor and Integrated System Shenzhen Tsinghua Shenzhen International Graduate School Shenzhen518055 China

ISBN: (纸本)9781510666535

The frequent occurrences of surge current[1] of memory architecture in FeRAM, and the lack of necessary formula derivation in related researches of FeRAM are main aspects of what this work focuses. Therefore, the surge protection circuit is designed and simulated by this work with solid memory architecture of FeRAM to decrease the surge current and average power consumption creatively. The surge protection circuit is composed of a MOSFET and an RC delay circuit, which forces the generation of the surge current to be slowed down by mandatory precharge of the capacitor. On the other hand, necessary circuit analysis and formula derivation are concluded to predict the DC operating point of sensitive amplifier and build a clearly defined limits of operating voltage and the ratio of the maximum ferroelectric capacitance and bitline capacitance in the read/write operation of FeRAM. © 2023 SPIE.

关键词： Capacitance

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Cross-Layer Exploration and Chip Demonstration of In-sensor Computing for Large-Area Applications with Differential-Frame ROM-Based Compute-In-Memory 24

Cross-Layer Exploration and Chip Demonstration of In-Sensor ...

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61st ACM/IEEE Design Automation Conference, DAC 2024

作者： Liu, Jialong Tang, Wenjun Chen, Deyun Jiang, Chen Yang, Huazhong Li, Xueqing Department of Electronic Engineering BNRist Tsinghua University Beijing China Key Laboratory of Advanced Sensor and Integrated System Tsinghua Shenzhen International Graduate School China

ISBN: (纸本)9798400706011

In-sensor computing has emerged as a promising approach to mitigating huge data transmission costs between sensors and processing units. Recently, the emerging application scenarios have raised more demands of sensory technology for large-area and flexible integration. However, with thin-film technologies that are capable of providing flexible and large-area integration support, the implementation of in-sensor computing can be strongly restricted due to the low device performance, large-area integration variation, and costly interface between sensors and CMOS processors. To address this challenge, we propose an in-sensor computing architecture to facilitate high-parallelism NN pre-processing and effective data compression. The boundaries of computing parallelism are expanded by adopting compact ROM-based compute-in-memory scheme next to sensing array. Differential-frame computing provides not only excellent robustness, but also high data sparsity. A bio-inspired data compression method with residual recovery caches and zero-skip circuits further enhances output sparsity without accumulated error. Based on the proposed cross-layer design optimization, an LTPS TFT-based ROM CiM chip has been fabricated and experimentally measured. The system-level evaluation demonstrates 3.85× speedup and 5.10× energy efficiency improvement compared with traditional architecture with separated sensors and processors, outperforming existing in-sensor computing works in large-area thin-film technology scenarios. © 2024 Copyright held by the owner/author(s).

关键词： Thin film transistors

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An Energy-Efficient Quantized Inference Framework For Electro-Photonic Computing system

An Energy-Efficient Quantized Inference Framework For Electr...

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2022 International Conference on Optical and Photonic Engineering, icOPEN 2022

作者： Lin, Zeyu Li, Hongfei Lei, Yaxiong Li, Sen Zhang, Sheng Key Laboratory of Advanced Sensor and Integrated System Shenzhen International Graduate school Tsinghua University Shenzhen518055 China Beijing SiPhonC Co. Ltd Beijing100083 China

ISBN: (纸本)9781510661905

Deep Learning is developing rapidly and has made breakthroughs in various fields. As a result, the number of parameters in deep neural networks(DNNs) is scaling about 5× rate of Moore's Law. To meet the computing power needs of DNNs, new computing architectures have been proposed, and the electro-photonic computing system is one of them. With the physical characteristics of photons, the electro-photonic computing system has demonstrated great potential in improving the efficiency of convolution calculation. However, there are still much spcace for improvement in the energy efficiency of the electro-photonic computing system. And the high energy consumption led by the high-precision analog-to-digital converters(ADCs) is an important factor hindering the energy efficiency. ADCs dominate about 50% energy consumption of the entire system, and they will increase exponentially with the precision. But if the low-precision ADCs are used directly, they will destroy the computing accuracy in the convolution calculation and reduce the inference performance of DNNs. In this paper, we propose an energy-efficient quantized inference framework for electro-photonic computing system to balance the energy consumption of ADCs and the DNNs inference performance, which includes a multi-scale quantization scheme based on per-slice granularity and width variable optical matrix. The proposed framework can reduce the energy consumption of the system by using low-precision ADCs, and ensure the inference performance of the DNNs at the same time. The experiments are carried out in MobileNet-v2, ResNet50 and Vgg16 respectively. The experimental results show that the proposed quantized inference framework can reduce the precision of ADCs by 7 bits and compared with using the low-precision ADCs directly, it improves the model accuracy of 40.5%, 70.2% and 65.4% respectively, which is close to the full precision model. © 2022 SPIE.

关键词： Deep neural networks

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Brightness and Lifetime Improved Light-Emitting Diodes from Sr-Doped Quasi-Two-Dimensional Perovskite Layers

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Tsinghua Science and Technology 2023年第1期28卷 131-140页

作者： Dan Chen Taoran Liu Yuhua Zuo Chuanbo Li Jun Zheng Zhi Liu Baoyu Liu Buwen Cheng State Key Laboratory on Integrated Optoelectronics Institute of SemiconductorChinese Academy of SciencesBeijing 100083China Center of Materials Science and Optoelectronics Engineering University of Chinese Academy of SciencesBeijing 100049China School of Science Minzu University of ChinaBeijing 100081China Beijing Advanced Innovation Center for Materials Genome Engineering Beijing Key Laboratory for SensorMOE Key Laboratory for Modern Measurement and Control Technologyand Beijing Information Science and Technology UniversityBeijing 100101China

Green Perovskite Light-Emitting Diodes(PeLEDs)have attracted wide attention for full spectrum ***,the inferior film morphology and luminescence property of quasi-two-dimensional(quasi-2D)perovskite layers limit the photoelectric property of the *** this paper,the effect of strontium(Sr)doped in quasi-2D perovskite layers is investigated to obtain a high-quality active *** morphologies and optical properties of Sr-doped quasi-2D perovskite films with different concentrations are *** the addition of strontium,more low-dimensional-layer perovskite phases(n D 2 and n D 3)appear in quasi-2D perovskite films,providing efficient intraband carrier funneling pathway and facilitating radiative *** photoluminescence(PL)peak intensity of optimized Sr-doped quasi-2D perovskite layers increases 50%compared with the non-strontium ***,green PeLEDs based on a Sr-doped quasi-2D perovskite layer reach a maximum luminance(Lmax)of 2943.77 cd/m^(2),which is three times of the control *** electroluminescence(EL)peaks of Maximum External Quantum Efficiency(MEQE)and Lmax of Sr-doped PeLEDs exhibite a slight shift,indicating the excellent stability and performance of Sr-doped *** optimized device can continuously operate for 360 s at MEQE driving voltage,resulting in a half-lifetime of60 s,which is 3-fold greater than that of the control PeLEDs.

关键词： Perovskite Light-Emitting Diodes(PeLED) Sr-doped brightness improved lifetime increased

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NO_(2) gas sensor with high selectivity and fast response based on Pt-loaded nanoporous GaN

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International Journal of Minerals,Metallurgy and Materials 2025年第4期32卷 964-972页

作者： Dan Han Xiaoru Liu Donghui Li Jiexu Shi Yu Wang Yuxuan Wang Hongtao Wang Shengbo Sang Shanxi Key Laboratory of Micro/Nano Sensors&Artificial Intelligence Perception College of Integrated CircuitsTaiyuan University of TechnologyTaiyuan030024China Key Lab of Advanced Transducers and Intelligent Control System of the Ministry of Education Taiyuan University of TechnologyTaiyuan 030024China Shanxi Research Institute of 6D Artificial Intelligence Biomedical Science Taiyuan 030032China

In this work,we realized a room-temperature nitrogen dioxide(NO_(2))gas sensor based on a platinum(Pt)-loaded nanoporous gallium nitride(NP-GaN)sensing material using the thermal reduction method and coreduction with the catalysis of *** gas sensor gained excellent sensitivity to NO_(2) at a concentration range of 200 ppm to 100 ppb,benefiting from the loading of Pt nanoparticles,and exhibited a short response time(22 s)and recovery time(170 s)to 100 ppm of NO_(2) at room temperature with excellent selectivity to NO_(2) compared with other *** phenomenon was attributed to the spillover effect and the synergic electronic interaction with semiconductor materials of Pt,which not only provided more electrons for the adsorption of NO_(2) molecules but also occupied effective sites,causing poor sites for other *** low detection limit of Pt/NP-GaN was 100 ppb,and the gas sensor still had a fast response 70 d after ***,the gas-sensing mechanism of the gas sensor was further elaborated to determine the reason leading to its improved *** significant spillover impact and oxygen dissociation of Pt provided advantages to its synergic electronic interaction with semiconductor materials,leading to the improvement of the gas properties of gas sensors.

关键词： nanoporous gallium nitride platinum nitrogen dioxide gas sensor

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Flexible Active-matrix Micro-LED Display Utilizing InSnO TFTs with High Mobility of 39.1 cm2V-1s-1 and Mass-production Compatible Process

Flexible Active-matrix Micro-LED Display Utilizing InSnO TFT...

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2024 IEEE International Electron Devices Meeting, IEDM 2024

作者： Yu, Zuoxu Sang, Yimeng Zhang, Yuzhen Zhang, Yiyang Shi, Runxiao Liu, Siyang Tao, Tao Li, Xifeng Peng, Cong Zhang, Rong Wu, Wangran Zhuang, Zhe Liu, Bin Sun, Weifeng School of Integrated Circuits National ASIC System Engineering Research Center Southeast University Nanjing China Jiangsu Provincial Key Laboratory of Advanced Photonic and Electronic Materials School of Electronic Science and Engineering Nanjing University Nanjing China School of Integrated Circuits Nanjing University Suzhou China Key Laboratory of Advanced Display and System Applications of the Ministry of Education Shanghai University Shanghai China

ISBN: (纸本)9798350365429

The increasing pursuit of ultrahigh resolution displays has driven the demand for thin film transistors (TFTs) with higher mobility, especially on flexible substrates. In this work, we developed InSnO (ITO) TFTs on flexible substrates and achieved a remarkable average mobility of 39.1 cm2V-1s-1, via mass-production compatible processes utilizing SiO2 gate dielectric. Benefiting from the ultra-flat surface and extremely low coefficient of thermal expansion (CTE) of our PI substrate, the ITO TFTs exhibit excellent wafer-scale uniformity, reliable mechanical flexibility, and robust bending durability. Based on the ITO TFTs, we fabricated flexible 2T1C pixel circuits that can operate in both PAM and PWM schemes. The flip-chip micro-LEDs (μ-LEDs) were transferred to a flexible PI holder nondestructively with the assistance of UV tape and present superior robustness and endurance under cyclic bending. Moreover, we bonded μ-LEDs to the 2T1C pixel circuits and demonstrated a flexible active-matrix μ-LED display. The feasibility of flexible illumination and image control has been verified, providing great potential for high-resolution flexible displays in the future. © 2024 IEEE.

关键词： Thin film transistors

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