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Dependability evaluation system based on microprocessor function model

Jisuanji Xuebao/Chinese Journal of computers 2008年第3期31卷 391-399页

作者： Zhang, Shi-Jian Xu, Tong Zhang, Long-Bing Hu, Wei-Wu Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing 100080 China Graduate University Chinese Academy of Sciences Beijing 100039 China

With the widespread adoption of embedded microprocessor-based systems in safety critical applications, such as aircrafts, spaceships and nuclear power plants, how to rapidly and conveniently evaluate these fault-tolerant mechanisms with low cost is an important problem. The traditional method requires a detailed hardware protocol to do evaluation, which lengthens evaluation period and increases the cost. A new dependability evaluation technique based on microprocessor function model is proposed, which can evaluate fault-tolerant mechanisms more rapidly, more conveniently and more economically than the conventional systems. As a case for study, the new system evaluates three fault-tolerant techniques;the software redundancy technique, the assertion validation technique and the instruction re-fetching and re-execution technique. The results show that the evaluation is reasonable.

关键词： Fault tolerance

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A Novel Fuzzy Likelihood Measure Algorithm

A Novel Fuzzy Likelihood Measure Algorithm

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International Conference on computer Science and Software Engineering

作者： Shifei Ding Fengxiang Jin School of Computer Science and Technology China China University of Mining and Technology Xuzhou China Key Laboratory of Intelligent Information Processing Institute of Computing Technology Chinese Academy and Sciences Beijing China College of Geoinformation Science and Engineering Shandong University of Science and Technology Qingdao China

ISBN: (纸本)9781424439027

Similarity measure (PSM) is a kind of measurement that measure the size of similarity between two patterns, it plays a key role in the analysis and research of pattern recognition, machine learning, clustering analysis. This article will firstly study the current PSM theory, point out its application range; secondly, discuss the axiomatic theory of fuzzy likelihood measure, give the frequently-used algorithms of fuzzy likelihood measure that based on axiomatic theory; finally, advance a new kind of fuzzy likelihood function, then establish the fuzzy likelihood measure(FLM) between two fuzzy sets, so as to describe the similar degree between two fuzzy sets. FLM theory not only enriches and improves the PLS theory, and also provides new research methods for the theory research such as pattern recognition, machine learning, clustering analysis and so on.

关键词： Fuzzy sets Pattern recognition Fuzzy set theory Pattern analysis Size measurement Software measurement Fuzzy systems Current measurement computer science Information processing

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Design sparse features for age estimation using hierarchical face model

Design sparse features for age estimation using hierarchical...

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International Conference on Automatic Face and Gesture Recognition

作者： Jinli Suo Tianfu Wu Songchun Zhu Shiguang Shan Xilin Chen Wen Gao Chinese Academy and Sciences China Lotus Hill Institute of Computer Vision and Information Science China Key Laboratory of Intelligent Information Processing of CAS Institute of Computing Technology Chinese Academy of Sciences Beijing China Institute of Digital Media Peking University China

A key point in automatic age estimation is to design feature set essential to age perception. To achieve this goal, this paper builds up a hierarchical graphical face model for faces appearing at low, middle and high resolution respectively. Along the hierarchy, a face image is decomposed into detailed parts from coarse to fine. Then four types of features are extracted from this graph representation guided by the priors of aging process embedded in the graphical model: topology, geometry, photometry and configuration. On age estimation, this paper follows the popular regression formulation for mapping feature vectors to its age label. The effectiveness of the presented feature set is justified by testing results on two datasets using different kinds of regression methods. The experimental results in this paper show that designing feature set for age estimation under the guidance of hierarchical face model is a promising method and a flexible framework as well.

关键词： Aging Feature extraction Active appearance model Face detection Spatial databases Skin Hair Content addressable storage computer vision Humans

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Hierarchical background subtraction using local pixel clustering

Hierarchical background subtraction using local pixel cluste...

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International Conference on Pattern Recognition

作者： Bineng Zhong Hongxun Yao Shiguang Shan Xilin Chen Wen Gao Department of Computer Science and Engineering Harbin Institute of Technology Digital Media Research Center Institute of Computing Technology Chinese Academy of Sciences Beijing China Key Laboratory of Intelligent Information Processing Chinese Academy and Sciences Beijing China Digital Media Institute Peking University Beijing China

ISBN: (纸本)9781424421749

We propose a robust hierarchical background subtraction technique which takes the spatial relations of neighboring pixels in a local region into account to detect objects in difficult conditions. Our algorithm combines a per-pixel with a per-region background model in a hierarchical manner, which accentuates the advantages of each. This is a natural combination because the two models have complementary strengths. The per-pixel background model is achieved by mixture of Gaussians models (GMM) with RGB feature. Although precisely describing background change in high resolution, it suffers from the sensitivity to quick variations in dynamic environment. To tolerate these quick variations, we further develop a novel GMM based per-region background model, which is updated by the cluster centers obtained from a k-means clustering of the pixelspsila RGB feature in the region. Numerical and qualitative experimental results on challenging videos demonstrate the robustness of the proposed method.

关键词： Autoregressive processes Robustness Object detection Videos Layout Smart pixels Content addressable storage Gaussian processes Lighting Cameras

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Instruction level test for parallel multipliers

Instruction level test for parallel multipliers

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IEEE International Conference on Electronics, Circuits and Systems (ICECS)

作者： Ma Lin Gao Yan Chinese Academy of Sciences Beijing China Key Laboratory of Computer System and Architecturen+î Institute of Computing Technology Chinese Academy and Sciences Beijing China College of Electronics and Information Engineering University of Tongji Shanghai China

Multiplication operations are the normal operations in operating systems or scientific calculations. Multipliers embedded in processors, DSP or SoC are well optimized for best performance, and they are sensitive to test overhead. Instruction level test is a popular functional test approach for microprocessors test, and it can get satisfactory test results. But for the multipliers, one important part of microprocessors, there is no detail on how to testing them. This paper presents an instruction level test approach for the multiplier test. The proposed approach does not modify the multipliers and does not need any extra logic just using instructions of the processors to test processorspsila multipliers. Sequentially it does not have any test cost on area or timing. Moreover the instruction-level test is suited for at-speed test in nature. Experimental results on the real processorpsilas circuits show that the instruction level test approach has good effect on parallel multipliers.

关键词： Circuit testing Built-in self-test System testing Circuit faults Sequential analysis Microprocessors Automatic testing Costs Very large scale integration Integrated circuit testing

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Multiple Coupling Effects Oriented Path Delay Test Generation

Multiple Coupling Effects Oriented Path Delay Test Generatio...

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26th IEEE VLSI Test Symposium (VTS 2008)

作者： Minjin Zhang Huawei Li Xiaowei Li Graduate School of Chinese Academy of Sciences Beijing China Key Laboratory of Computer System and Architecture Chinese Academy of Sciences Beijing China Academy of Sciences Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy and Sciences Beijing China

We propose a two-phase test generation method to generate patterns targeting maximal path delay caused by multiple crosstalk effects. A timing analysis method based on transition map is proposed to manage the timing information of aggressor lines and victim lines in the first phase, followed by an ordinary ATPG engine with a few alterations in the second phase. This two-phase method avoids complex timing processing in ATPG algorithm. Using transition map instead of timing window in timing analysis, our method can more efficiently calculate the accumulative crosstalk-induced delay and find the sub-paths which cause maximal coupling effects. We can trade off accuracy and efficiency by controlling the size of timescale used in transition map, which makes this approach highly scalable.

关键词： Delay effects Testing Timing Test pattern generators Crosstalk Automatic test pattern generation Information analysis Information management Engines Cause effect analysis

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Deterministic Circular Self Test Path

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Tsinghua Science and technology 2007年第S1期12卷 20-25页

作者：文科胡瑜李晓维 Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy of Sciences

Circular self test path (CSTP) is an attractive technique for testing digital integrated circuits(IC) in the nanometer era, because it can easily provide at-speed test with small test data volume and short test application time. However, CSTP cannot reliably attain high fault coverage because of difficulty of testing random-pattern-resistant faults. This paper presents a deterministic CSTP (DCSTP) structure that consists of a DCSTP chain and jumping logic, to attain high fault coverage with low area overhead. Experimental re- sults on ISCAS’89 benchmarks show that 100% fault coverage can be obtained with low area overhead and CPU time, especially for large circuits.

关键词： very large scale integration (VLSI) test built-in-self-test (BIST) circular self test path deterministic

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Codeword Selection for Crosstalk Avoidance and Error Correction on Interconnects

Codeword Selection for Crosstalk Avoidance and Error Correct...

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26th IEEE VLSI Test Symposium (VTS 2008)

作者： Ying Zhang Huawei Li Xiaowei Li Yu Hu Graduate School of Chinese Academy of Sciences Beijing China Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy and Sciences Beijing China

Crosstalk effects and soft errors on interconnects have been increasingly serious, which affects normal communication among cores. Therefore, it is desirable to design a reliable bus system without causing unacceptable performance reduction. In this paper, a new bus encoding method based on codeword selection is presented for enduring crosstalk-induced effects, which can avoid crosstalk and provide error correction as well. This method finds a subset from crosstalk avoidance code (CAC) to provide error correction. It can avoid crosstalk induced by late signal transition on checking bits in the previous methods. Extra wires for checking bus are never required in the proposed method. Experiment shows that the method reduces 6% wire overhead compared to the former methods. And it can also improve bus performance and reduce power dissipation.

关键词： Crosstalk Error correction codes Wires Delay Encoding Very large scale integration Power system interconnection Digital audio players Error correction Capacitance

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Leakage Current Optimization Techniques During Test Based on Don't Care Bits Assignment

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Journal of computer Science & technology 2007年第5期22卷 673-680页

作者：王伟胡瑜韩银和李晓维张佑生 School of Computer and Information Hefei University of Technology Hefei 230009China Key Laboratory of Computer System and ArchitectureInstitute of Computing TechnologyChinese Academy of Sciences Beijing 100080China Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing 100080China School of Computer and Information Hefei University of Technology Hefei 230009China

It is a well-known fact that test power consumption may exceed that during functional operation. Leakage power dissipation caused by leakage current in Complementary Metal-Oxide-Semiconductor （CMOS） circuits during test has become a significant part of the total power dissipation. Hence, it is important to reduce leakage power to prolong battery life in portable systems which employ periodic self-test, to increase test reliability and to reduce test cost. This paper analyzes leakage current and presents a kind of leakage current simulator based on the transistor stacking effect. Using it, we propose techniques based on don＇t care bits （denoted by Xs） in test vectors to optimize leakage current in integrated circuit （IC） test by genetic algorithm. The techniques identify a set of don＇t care inputs in given test vectors and reassign specified logic values to the X inputs by the genetic algorithm to get minimum leakage vector （MLV）. Experimental results indicate that the techniques can effectually optimize leakage current of combinational circuits and sequential circuits during test while maintaining high fault coverage,

关键词： leakage current don＇t care bits minimum leakage vector leakage power

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Online Distributed Fault Detection of Sensor Measurements

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Tsinghua Science and technology 2007年第S1期12卷 192-196页

作者：高建良徐勇军李晓维 Key Laboratory of Computer System and Architecture Institute of Computing TechnologyChinese Academy of Sciences

In wireless sensor networks (WSNs), a faulty sensor may produce incorrect data and transmit them to the other sensors. This would consume the limited energy and bandwidth of WSNs. Furthermore, the base station may make inappropriate decisions when it receives the incorrect data sent by the faulty sensors. To solve these problems, this paper develops an online distributed algorithm to detect such faults by exploring the weighted majority vote scheme. Considering the spatial correlations in WSNs, a faulty sensor can diagnose itself through utilizing the spatial and time information provided by its neighbor sensors. Simulation results show that even when as many as 30% of the sensors are faulty, over 95% of faults can be correctly detected with our algorithm. These results indicate that the proposed algorithm has excellent performance in detecting fault of sensor measurements in WSNs.

关键词： wireless sensor networks fault diagnosis fault detection fault tolerance spatial correlation

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