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Joint User Association,Resource Allocation and Trajectory Design for Multi-UAV-Aided NOMA Wireless Communication systems

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China Communications 2025年第3期22卷 217-233页

作者： Yin Sixing Qu Zhaowei Yu Peng Beijing Key Laboratory of Network System Architecture and Convergence Beijing University of Posts and TelecommunicationsBeijing 100876China School of Computer Science Beijing University of Posts and TelecommunicationsBeijing 100876China

In this paper,we investigate a multi-UAV aided NOMA communication system,where multiple UAV-mounted aerial base stations are employed to serve ground users in the downlink NOMA communication,and each UAV serves its associated users on its own *** aim at maximizing the overall common throughput in a finite time *** a problem is a typical mixed integer nonlinear problem,which involves both continuous-variable and combinatorial *** efficiently solve this problem,we propose a two-layer algorithm,which separately tackles continuous-variable and combinatorial ***,in the inner layer given one user association scheme,subproblems of bandwidth allocation,power allocation and trajectory design are solved based on alternating *** the outer layer,a small number of candidate user association schemes are generated from an initial scheme and the best solution can be determined by comparing all the candidate *** particular,a clustering algorithm based on K-means is applied to produce all candidate user association schemes,the successive convex optimization technique is adopted in the power allocation subproblem and a logistic function approximation approach is employed in the trajectory design *** results show that the proposed NOMA scheme outperforms three baseline schemes in downlink common throughput,including one solution proposed in an existing literature.

关键词： NOMA resource allocation trajectory design UAV communications user association

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Towards Expanding Precise Timing for Collaborative Its with Deterministic Communications in 6G

Towards Expanding Precise Timing for Collaborative Its with ...

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IEEE Conference on Wireless Communications and Networking

作者： Hongxing Li Haotian Li Qianhan Gao Guochu Shou Yaqiong Liu Zhigang Guo Yihong Hu State Key Laboratory of Networking and Switching Technology School of Computer Science (National Pilot Software Engineering School) Beijing Key Laboratory of Network System Architecture and Convergence School of Information and Communication Engineering Beijing University of Posts and Telecommunications Beijing China

ISBN: (数字)9798350368369

ISBN: (纸本)9798350368376

The demand for precise timing continues to grow with the rapid development of smart cities, where intelligent transportation emerges as a critical application heavily dependent on accurate time distribution. Deterministic communication is anticipated to be a defining feature of nextgeneration mobile networks (6G), enabling end-to-end timecritical applications, and unlocking new possibilities for achieving end-to-end precise time synchronization as well. To cope with the challenge of delivering precise time synchronization across broader areas at a lower cost, this paper proposes a method to achieve end-to-end precise time synchronization by leveraging the deterministic characteristics of communication networks. Specially, the proposed approach adopts the Software-Defined Networking (SDN) paradigm to implement deterministic networking for the seamless integration of Time-Sensitive Networking (TSN) and cellular networks. Furthermore, to mitigate the impact of wireless channel uncertainties on synchronization accuracy, we propose a network delay measurement mechanism based on the principle of time redundancy, designed to reduce end-to-end network delay variation. Experimental results validate the effectiveness of the proposed method, demonstrating its capability to constrain the end-to-end relative time error of wired and wireless converged networks to the microsecond scale, without necessitating modifications to the existing network infrastructure.

关键词： 6G mobile communication Wireless communication Cellular networks Uncertainty Accuracy Measurement uncertainty Transportation Delays Synchronization Software defined networking

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Continual Reinforcement Learning for Digital Twin Synchronization Optimization

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IEEE Transactions on Mobile Computing 2025年

作者： Tong, Haonan Chen, Mingzhe Zhao, Jun Hu, Ye Yang, Zhaohui Liu, Yuchen Yin, Changchuan Beijing University of Posts and Telecommunications Beijing Key Laboratory of Network System Architecture and Convergence Beijing Advanced Information Network Laboratory Beijing China College of Computing and Data Science Singapore University of Miami Department of Electrical and Computer Engineering Frost Institute for Data Science and Computing Coral Gables33146 United States University of Miami Department of Industrial and Systems Engineering Coral Gables33146 United States Zhejiang University College of Information Science and Electronic Engineering Hangzhou310027 China North Carolina State University Department of Computer Science RaleighNC27695 United States Beijing Key Laboratory of Network System Architecture and Convergence China Beijing University of Posts and Telecommunications Beijing Advanced Information Network Laboratory Beijing100876 China

This article investigates the adaptive resource allocation scheme for digital twin (DT) synchronization optimization over dynamic wireless networks. In our considered model, a base station (BS) continuously collects factory physical object state data from wireless devices to build a real-time virtual DT system for factory event analysis. Due to continuous data transmission, maintaining DT synchronization must use extensive wireless resources. To address this issue, a subset of devices is selected to transmit their sensing data, and resource block (RB) allocation is optimized. This problem is formulated as a constrained Markov process (CMDP) problem that minimizes the long-term mismatch between the physical and virtual systems. To solve this CMDP, we first transform the problem into a dual problem that refines RB constraint impacts on device scheduling strategies. We then propose a continual reinforcement learning (CRL) algorithm to solve the dual problem. The CRL algorithm learns a stable policy across historical experiences for quick adaptation to dynamics in physical states and network capacity. Simulation results show that the CRL can adapt quickly to network capacity changes and reduce normalized root mean square error (NRMSE) between physical and virtual states by up to 55.2%, using the same RB number as traditional methods. © 2025 IEEE. All rights reserved.

关键词： Markov processes

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Continual Reinforcement Learning for Digital Twin Synchronization Optimization

arXiv

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arXiv 2025年

作者： Tong, Haonan Chen, Mingzhe Zhao, Jun Hu, Ye Yang, Zhaohui Liu, Yuchen Yin, Changchuan The Beijing Key Laboratory of Network System Architecture and Convergence The Beijing Advanced Information Network Laboratory Beijing University of Posts and Telecommunications Beijing China Singapore The Department of Electrical and Computer Engineering Frost Institute for Data Science and Computing University of Miami Coral GablesFL33146 United States The Department of Industrial and Systems Engineering University of Miami Coral GablesFL33146 United States The College of Information Science and Electronic Engineering Zhejiang University Zhejiang Hangzhou310027 China The Department of Computer Science North Carolina State University RaleighNC27695 United States The Beijing Key Laboratory of Network System Architecture and Convergence China The Beijing Advanced Information Network Laboratory Beijing University of Posts and Telecommunications Beijing100876 China

关键词： Markov processes

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SimK:A Large-Scale Parallel Simulation Engine

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Journal of computer Science & Technology 2009年第6期24卷 1048-1060页

作者：许建卫陈明宇郑规曹政吕慧伟孙凝晖 Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy of Sciences Graduate University of Chinese Academy of Sciences Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing 100190 China

Simulation is an important method to evaluate future computer systems. Currently microprocessor architecture has switched to parallel, but almost all simulators remained at sequential stage, and the advantages brought by multi-core or many-core processors cannot be utilized. This paper presents a parallel simulator engine （SimK） towards the prevalent SMP/CMP platform, aiming at large-scale fine-grained computer system simulation. In this paper, highly efficient synchronization, communication and buffer management policies used in SimK are introduced, and a novel lock-free scheduling mechanism that avoids using any atomic instructions is presented. To deal with the load fluctuation at light load case, a cooperated dynamic task migration scheme is proposed. Based on SimK, we have developed large-scale parallel simulators HppSim and HppNetSim, which simulate a full supercomputer system and its interconnection network respectively. Results show that HppSim and HppNetSim both gain sound speedup with multiple processors, and the best normalized speedup reaches 14.95X on a two-way quad-core server.

关键词： large scale system simulation fine-grained synchronization simulation framework lock-free synchronization

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On-Chip Generating FPGA Test Configuration Bitstreams to Reduce Manufacturing Test Time

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Chinese Journal of Electronics 2016年第1期25卷 64-70页

作者： WANG Fei WANG Da YANG Haigang XIE Xianghui FAN Dongrui System on Programmable Chip Research Department IE CAS State Key Laboratory of Computer Architecture ICT CAS

Statistics shows that over 95% of FPGA manufacturing test time is spent on loading test configuration bitstreams. Reducing the test time that spent on loading test configuration bitstreams could significantly reduce FPGA test time. A new approach which can significantly reduce the FPGA test time is presented. Experimental results show that the proposed technique can at least reduce the configuration loading time by 96%, while getting 100%test coverage with less than 1.2% hardware overhead.

关键词： FPGA test Test configuration bitstream Design-for-testability

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Trainbow: a new trusted virtual machine based platform

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中国高等学校学术文摘·计算机科学 2010年第1期4卷 47-64页

作者： Yuzhong SUN Yongbing HUANG Yunwei GAO Haifeng FANG Ying SONG Lei DU Kai ZHANG Hongyong ZANG Yaqiong LI Yajun YANG Ran AO Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy of SciencesBeijing 100190China Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy of SciencesBeijing 100190China Graduate University of Chinese Academy of Sciences Beijing 100190China Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy of SciencesBeijing 100190China Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy of SciencesBeijing 100190China Graduate University of Chinese Academy of Sciences Beijing 100190China Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy of SciencesBeijing 100190China Department of Computer Science and Technology Xi'an Jiaotong University Xi'an 710049China Key Laboratory of Computer System and Architecture Institute of Computing TechnologyChinese Academy of Sciences Beijing 100190China Graduate University of Chinese Academy of Sciences Beijing 100190China

Currently, with the evolution of virtualization technology, cloud computing mode has become more and more popular. However, people still concern the issues of the runtime integrity and data security of cloud computing platform, as well as the service efficiency on such computing platform. At the same time, according to our knowledge, the design theory of the trusted virtual computing environment and its core system software for such network-based computing platform is at the exploratory stage. In this paper, we believe that efficiency and isolation are the two key proprieties of the trusted virtual computing environment. To guarantee these two proprieties, based on the design principle of splitting, customizing, reconstructing, and isolation-based enhancing to the platform, we introduce TRainbow, a novel trusted virtual computing platform developing by our research *** the two creative mechanisms, that is, capacity flowing amongst VMs and VM-based kernel reconstructing, TRainbow provides great improvements (up to 42%) in service performance and isolated reliable computing environment for Internet-oriented, large-scale, concurrent services.

关键词： Computing platform virtual machine capacity service computing trust chain isolation

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New Methodologies for Parallel architecture

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Journal of computer Science & Technology 2011年第4期26卷 578-587页

作者：范东睿李晓维李国杰 Key Laboratory of Computer System and Architecture Institute of Computing TechnologyChinese Academy of Sciences

Moore＇s law continues to grant computer architects ever more transistors in the foreseeable future, and parallelism is the key to continued performance scaling in modern microprocessors. In this paper, the achievements in our research project, which is supported by the National Basic Research 973 Program of China, on parallel architecture, are systematically presented. The innovative approaches and techniques to solve the significant problems in parallel architecture design are smnmarized, including architecture level optimization, compiler and language-supported technologies, reliability, power-performance efficient design, test and verification challenges, and platform building. Two prototype chips, a multi-heavy-core Godson-3 and a many-light-core Godson-T, are described to demonstrate the highly scalable and reconfigurable parallel architecture designs. We also present some of our achievements appearing in ISCA, MICRO, ISSCC, HPCA, PLDI, PACT, IJCAI, Hot Chips, DATE, IEEE Trans. VLSI, IEEE Micro, IEEE Trans. computers, etc.

关键词： architecture multi-core many-core parallelism

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Deterministic Circular Self Test Path

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Tsinghua Science and Technology 2007年第S1期12卷 20-25页

作者：文科胡瑜李晓维 Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy of Sciences

Circular self test path (CSTP) is an attractive technique for testing digital integrated circuits(IC) in the nanometer era, because it can easily provide at-speed test with small test data volume and short test application time. However, CSTP cannot reliably attain high fault coverage because of difficulty of testing random-pattern-resistant faults. This paper presents a deterministic CSTP (DCSTP) structure that consists of a DCSTP chain and jumping logic, to attain high fault coverage with low area overhead. Experimental re- sults on ISCAS’89 benchmarks show that 100% fault coverage can be obtained with low area overhead and CPU time, especially for large circuits.

关键词： very large scale integration (VLSI) test built-in-self-test (BIST) circular self test path deterministic

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Revisiting Multiple Pattern Matching Algorithms for Multi-Core architecture

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Journal of computer Science & Technology 2011年第5期26卷 866-874页

作者：谭光明刘萍卜东波刘燕兵 Key Laboratory of Computer System and Architecture Institute of Computing TechnologyChinese Academy of Sciences Key Laboratory of Network Technology Institute of Computing TechnologyChinese Academy of Sciences

Due to the huge size of patterns to be searched,multiple pattern searching remains a challenge to several newly-arising applications like network intrusion *** this paper,we present an attempt to design efficient multiple pattern searching algorithms on multi-core *** observe an important feature which indicates that the multiple pattern matching time mainly depends on the number and minimal length of *** multi-core algorithm proposed in this paper leverages this feature to decompose pattern set so that the parallel execution time is *** formulate the problem as an optimal decomposition and scheduling of a pattern set,then propose a heuristic algorithm,which takes advantage of dynamic programming and greedy algorithmic techniques,to solve the optimization *** results suggest that our decomposition approach can increase the searching speed by more than 200% on a 4-core AMD Barcelona system.

关键词： parallel algorithm multi-core multiple pattern matching

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