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检索条件"机构=Key Laboratory of Computer System and Architecture "
402 条 记 录,以下是141-150 订阅
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A Case Study: Low Power Design-for-Testability Features of a Multi-core Processor Godson-T
A Case Study: Low Power Design-for-Testability Features of a...
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2011 2nd International Conference on Advanced Measurement and Test (AMT 2011)
作者: Da Wang Dongrui Fan Yu Hu Key Laboratory of Computer System and Architecture Institute of Computing TechnologyChinese Academy of Sciences
This paper describes the low power test challenges and features of a multi-core processor, Godson-T, which contains 16 identical coresSince the silicon design technology scales to ultra deep submicron and even nanomet... 详细信息
来源: 评论
A New Post-Silicon Debug Approach Based on Suspect Window
A New Post-Silicon Debug Approach Based on Suspect Window
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IEEE VLSI Test Symposium (VTS)
作者: Jianliang Gao Yinhe Han Xiaowei Li Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy of Sciences
Bugs are tending to be unavoidable in the design of complex integrated circuits. It is imperative to identify the bugs as soon as possible by post-silicon debug. The main challenge for post-silicon debug is the observ... 详细信息
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Protein structure superposition by curve moment invariants and iterative closest point
Protein structure superposition by curve moment invariants a...
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2007 1st International Conference on Bioinformatics and Biomedical Engineering, ICBBE
作者: Xu, Dong Li, Hua Gu, Tongjun Key Laboratory of Intelligent Information Processing Key Laboratory of Computer System and Architecture National Research Center for Intelligent Computing Systems Institute of Computing Technology Chinese Academy of Sciences Center for Systems Biology Institute of Biophysics Chinese Academy of Sciences Graduate University Chinese Academy of Sciences
Superimpose one protein tertiary structure to another can help to find similarity between them and further identify functional and evolutionary relationships. We first extract invariant features under rigid body trans... 详细信息
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Building a personal high performance computer with heterogeneous processors
Building a personal high performance computer with heterogen...
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International Conference on Grid and Cloud Computing
作者: Li, Qiang Huo, Zhigang Sun, Ninghui National Research Center for Intelligent Computing Systems Beijing 100190 China Key Laboratory of Computer System and Architecture Chinese Academy of Sciences Beijing China Graduate University of Chinese Academy of Sciences Beijing 100190 China
Personal high performance computer (PHPC) requires lower cost and high performance. The Teraflops PHPC systems with special accelerator units like GPGPU have been presented, but they have difficulties in programming, ... 详细信息
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A testability-aware low power architecture
A testability-aware low power architecture
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25th IEEE International system-on-Chip Conference, SOCC 2012
作者: Wang, Gang Wang, Jian Qi, Zi-Chu Key Laboratory of Computer System and Architecture Chinese Academy of Sciences Beijing 100190 China Institute of Computing Technology Chinese Academy of Sciences Beijing 100190 China Loongson Technology Corporation Limited Beijing 100190 China
Test power consumption is becoming a major concern in low power integrated circuits(ICs). This paper presents a revised low power compression architecture for scan test. In this paper, the variance in power consumptio... 详细信息
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A processor-DMA-based memory copy hardware accelerator
A processor-DMA-based memory copy hardware accelerator
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IEEE International Conference on Networking, architecture and Storage
作者: Su, Wen Wang, Ling Su, Menghao Liu, Su Key Laboratory of Computer System and Architecture Chinese Academy of Sciences China Institute of Computing Technology Chinese Academy of Sciences China Graduate University of Chinese Academy of Sciences China Loongson Technology Corporation Limited China
For many Operating systems and device drivers, memory copy is the most time-consuming operation which has always been paid special attention. In this paper, we propose a processor DMA based memory copy hardware accele... 详细信息
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Cache locking for network processing acceleration
Cache locking for network processing acceleration
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2012 10th IEEE International Symposium on Parallel and Distributed Processing with Applications, ISPA 2012
作者: Su, Wen Gao, Xiang Wang, Jing You, Ruibang Key Laboratory of Computer System and Architecture Chinese Academy of Sciences China Institute of Computing Technology Chinese Academy of Sciences China Graduate University Chinese Academy of Sciences China Loongson Technology Corporation Limited China
With the dramatic increase in network speed during the past ten years, network processing efficiency has been significantly decreased. In this paper, we propose a network accelerating scheme, which employs cache locki... 详细信息
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Simplified Multi-Ported Cache in High Performance Processor
Simplified Multi-Ported Cache in High Performance Processor
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International Conference on Networking, architecture, and Storage (NAS)
作者: Hao Zhang Dongrui Fan Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy and Sciences China
The memory bandwidth demands of modern microprocessors require the use of a multi-ported cache to achieve peak performance. However, multi- ported caches are costly to implement. In this paper we propose technique for... 详细信息
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Efficient Optimization Methodology in Early-Stage Design of Mesh-structured On-Chip Power/Ground(P/G) Networks
Efficient Optimization Methodology in Early-Stage Design of ...
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2006 8th International Conference on Solid-State and Integrated Circuit Technology
作者: Zu-ying Luo Department of Electronics Beijing Normal University Key Laboratory of Computer System and Architecture ICTCAS
Due to decreasing supply voltages and increasing power consumption of today’s VLSI chips,IR drops on on-chip power/ground(P/G) grids have to be explicitly considered during floor-planning stage in the today’s physic... 详细信息
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Optimizing Parallel Kinetic Monte Carlo Simulation by Communication Aggregation and Scheduling
Optimizing Parallel Kinetic Monte Carlo Simulation by Commun...
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2015大数据技术及应用论坛
作者: Baodong Wu Shigang Li Yunquan Zhang State Key Laboratory of Computer System and Architecture Institute of Computing TechnologyChinese Academy of Sciences
Kinetic Monte Carlo(KMC) algorithm has been widely applied for simulation of radiation damage, grain growth and chemical reactions. To simulate at a large temporal and spatial scale, domain decomposition is commonly u... 详细信息
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