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26th Annual Computational Neuroscience Meeting (CNS*2017): Part 3 Antwerp, Belgium. 15-20 July 2017 Abstracts

BMC NEUROSCIENCE 2017年第SUPPL 1期18卷 95-176页

作者： [Anonymous] Department of Neuroscience Yale University New Haven CT 06520 USA Department Physiology & Pharmacology SUNY Downstate Brooklyn NY 11203 USA NYU School of Engineering 6 MetroTech Center Brooklyn NY 11201 USA Departament de Matemàtica Aplicada Universitat Politècnica de Catalunya Barcelona 08028 Spain Institut de Neurobiologie de la Méditerrannée (INMED) INSERM UMR901 Aix-Marseille Univ Marseille France Center of Neural Science New York University New York NY USA Aix-Marseille Univ INSERM INS Inst Neurosci Syst Marseille France Laboratoire de Physique Théorique et Modélisation CNRS UMR 8089 Université de Cergy-Pontoise 95300 Cergy-Pontoise Cedex France Department of Mathematics and Computer Science ENSAT Abdelmalek Essaadi’s University Tangier Morocco Laboratory of Natural Computation Department of Information and Electrical Engineering and Applied Mathematics University of Salerno 84084 Fisciano SA Italy Department of Medicine University of Salerno 84083 Lancusi SA Italy Dipartimento di Fisica Università degli Studi Aldo Moro Bari and INFN Sezione Di Bari Italy Data Analysis Department Ghent University Ghent Belgium Coma Science Group University of Liège Liège Belgium Cruces Hospital and Ikerbasque Research Center Bilbao Spain BIOtech Department of Industrial Engineering University of Trento and IRCS-PAT FBK 38010 Trento Italy Department of Data Analysis Ghent University Ghent 9000 Belgium The Wellcome Trust Centre for Neuroimaging University College London London WC1N 3BG UK Department of Electronic Engineering NED University of Engineering and Technology Karachi Pakistan Blue Brain Project École Polytechnique Fédérale de Lausanne Lausanne Switzerland Departement of Mathematics Swansea University Swansea Wales UK Laboratory for Topology and Neuroscience at the Brain Mind Institute École polytechnique fédérale de Lausanne Lausanne Switzerland Institute of Mathematics University of Aberdeen Aberdeen Scotland UK Department of Integrativ

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Dynamic I/O-Aware Scheduling for Batch-Mode Applications on Chip Multiprocessor systems of Cluster Platforms

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Journal of computer Science & technology 2014年第1期29卷 21-37页

作者：吕方崔慧敏王蕾刘磊武成岗冯晓兵游本中 State Key Laboratory of Computer Architecture Institute of Computing Technology Chinese Academy of Sciences University of Chinese Academy of Sciences CCF ACM IEEE Department of Computer Science and Engineering University of Minnesota at Twin Cities Institute of Information Science Academia Sinica

Efficiency of batch processing is becoming increasingly important for many modern commercial service centers, e.g., clusters and cloud computing datacenters. However, periodical resource contentions have become the major performance obstacles for concurrently running applications on mainstream CMP servers. I/O contention is such a kind of obstacle, which may impede both the co-running performance of batch jobs and the system throughput seriously. In this paper, a dynamic I/O-aware scheduling algorithm is proposed to lower the impacts of I/O contention and to enhance the co-running performance in batch processing. We set up our environment on an 8-socket, 64-core server in Dawning Linux Cluster. Fifteen workloads ranging from 8 jobs to 256 jobs are evaluated. Our experimental results show significant improvements on the throughputs of the workloads, which range from 7% to 431%. Meanwhile, noticeable improvements on the slowdown of workloads and the average runtime for each job can be achieved. These results show that a well-tuned dynamic I/O-aware scheduler is beneficial for batch-mode services. It can also enhance the resource utilization via throughput improvement on modern service platforms.

关键词： chip multiprocessor batch processing co-running I/0 contention scheduling

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Big data analysis and data velocity

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Jisuanji Yanjiu yu Fazhan/computer Research and Development 2015年第2期52卷 333-342页

作者： Chen, Shimin State Key Laboratory of Computer Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing100190 China

Big data poses three main challenges to the underlying data management systems: volume (a huge amount of data), velocity (high speed of data generation, data acquisition, and data updates), and variety (a large number of data types and data formats). In this paper, we focus on understanding the significance of velocity and discussing how to face the challenge of velocity in the context of big data analysis systems. We compare the requirements of velocity in transaction processing, data stream, and data analysis systems. Then we describe two of our recent research studies with an emphasis on the role of data velocity in big data analysis systems: 1) MaSM, supporting online data updates in data warehouse systems;2) LogKV, supporting high-throughput data ingestion and efficient time-window based joins in an event log processing system. Comparing the two studies, we find that storing incoming data updates is only the minimum requirement. We should consider velocity as an integral part of the data acquisition and analysis life cycle. It is important to analyze the characteristics of the desired big data analysis operations, and then to optimize data organization and data distribution schemes for incoming data updates so as to maintain or even improve the efficiency of big data analysis. ©, 2015, Science Press. All right reserved.

关键词： Data warehouses

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Transmission mode selection for downlink transmission in LTE-A networks

Transmission mode selection for downlink transmission in LTE...

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IEEE International Symposium on Personal, Indoor and Mobile Radio Communications (PIMRC)

作者： Jian Yu Geoffrey Ye Li Changchuan Yin Xiaolong Zhu Yusun Fu Beijing Key Laboratory of Network System Architecture and Convergence Beijing University of Posts and Telecommunications Beijing China School of Electrical and Computer Engineering Georgia Institute of Technology Atlanta Georgia USA Huawei Shanghai Research Institute Shanghai China

In this paper, we investigate mode selection for coordinated multi-point (CoMP) transmission in downlink LTE-A networks, where inter-cluster interference exists. The proposed scheme selects the single-cell (SC) or coordinated beamforming (CB) transmission mode according to interference level to maximize the weighted sum rate with fairness consideration. To formulate the optimization problem, an approximated closed-form expression for the achievable rate is derived by modeling the probability distributions of signal and interference powers as Gamma distributions. Since the original optimization problem is a combinatorial and non-convex one with high complexity, a low-complexity and sub-optimal algorithm is proposed, which first performs coordinated cell selection and then transmission mode selection. Simulation results show that the closed-form approximation of the achievable rate is very tight and the proposed mode selection scheme can improve the average system throughput by 13% and the 10th percentile user throughput by 10% compared with the existing scheme.

关键词： Interference Optimization Approximation methods Closed-form solutions Downlink Signal to noise ratio Land mobile radio

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A scan chain optimization method for diagnosis

A scan chain optimization method for diagnosis

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IEEE International Conference on computer Design: VLSI in computers and Processors, (ICCD)

作者： Huajun Chen Zichu Qi Lin Wang Chao Xu ICT State Key Laboratory of Computer Architecture Beijing China University-of Chinese Academy of Sciences Beijing China Institute of Computing Technoloay Chinese Academy of Sciences Beijing China Loongson Technology Corporation Limited Beijing China

Scan chain structure consumes 10%~30% of die area, and most yield loss is caused by scan chain faults. This makes scan chain diagnosis be the key important method to ensure the high-quality products. The conventional scan chain diagnosis techniques usually conduct to a large range of suspect faulty flip flops. The failure analysis of those suspect faulty flip flops is time-consuming and costly. In this paper, we present a new scan chain construction method to reduce the range of suspect faulty flip flops. By constructing scan chains based on circuit logical structure, the proposed method can effectively improve the diagnosability of scan chains without any additional circuits. Moreover, by taking into consideration the physical location, the proposed method can decrease the negative effects of scan chains on the performance of designs. The proposed scan chain construction method can effectively handle a single scan chain fault as well as multiple scan chain faults. The experimental results show that the range of suspect faulty flip flops is reduced by 40%~90% on the most of ITC'99 benchmark circuits.

关键词： Circuit faults Logic gates Hardware Load modeling Controllability Software Integrated circuit modeling

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Chameleon: A data organization transformation scheme for big data systems 14

Chameleon: A data organization transformation scheme for big...

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11th ACM International Conference on computing Frontiers, CF 2014

作者： Pan, Fengfeng Yue, Yinliang Xiong, Jin State Key Laboratory of Computer Architecture Institute of Computing Technology CAS China University of Chinese Academy of Sciences Beijing China

ISBN: (纸本)9781450328708

Big data system requires multiple types of data organi-zations to effciently support various operations. It is well known that in-place update index, unordered log structured index and ordered log structured index are three typical data organizations which are designed to meet different workload requirements respectively. Differentiated workload requirements in different phase of the data life-cycle lead to data organization transformation. However, typical sequential data organization transformation not only incurs extremely long time, but also signicant energy consumption. In this paper, we propose Chameleon, a novel data organization transformation scheme for replication based big data system. The goal of Chameleon is to signi-cantly shorten the data organization transformation process and improve the write performance and the subsequent read performance through data organization transformation, meanwhile eliminate the additional hardware and energy costs by reusing the mirrored disks. For each put request, Chameleon keeps two copies of the key-value pair. One in its normal place and organized in ordered log structured index, and the other in relatively high performance log disk and organized in unordered log structured index. By spreading destaging I/O activities among short idle time slots, key-value pairs are transformed from write-optimized index to read-optimized index. Extensive experimental evaluation based on our prototype shows that Chameleon can shorten the time of data organization transformation and enhance energy effciency and performance. © is held by the owner/authors.

关键词： Big data

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HMTT: A hybrid hardware/software tracing system for bridging the DRAM access trace's semantic gap

HMTT: A hybrid hardware/software tracing system for bridging...

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作者： Huang, Yongbing Chen, Licheng Cui, Zehan Ruan, Yuan Bao, Yungang Chen, Mingyu Sun, Ninghui State Key Laboratory of Computer Architecture Institute of Computing Technology Chinese Academy of Sciences China University of Chinese Academy of Sciences China

DRAM access traces (i.e., off-chip memory references) can be extremely valuable for the design of memory subsystems and performance tuning of software. Hardware snooping on the off-chip memory interface is an effective and nonintrusive approach to monitoring and collecting real-life DRAM accesses. However, compared with software-based approaches, hardware snooping approaches typically lack semantic information, such as process/function/object identifiers, virtual addresses, and lock contexts, that is essential to the complete understanding of the systems and software under investigation. In this article, we propose a hybrid hardware/software mechanism that is able to collect off-chip memory reference traces with semantic information. We have designed and implemented a prototype system called HMTT (Hybrid Memory Trace Tool), which uses a custom-made DIMM connector to collect off-chip memory references and a high-level event-encoding scheme to correlate semantic information with memory references. In addition to providing complete, undistorted DRAM access traces, the proposed system is also able to perform various types of low-overhead profiling, such as object-relative accesses and multithread lock accesses. © 2014 ACM.

关键词： Dynamic random access storage

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Online updates on data warehouses via judicious use of solid-state storage

Online updates on data warehouses via judicious use of solid...

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作者： Athanassoulis, Manos Chen, Shimin Ailamaki, Anastasia Gibbons, Philip B. Stoica, Radu School of Engineering and Applied Sciences Harvard University CambridgeMA02138 United States State Key Laboratory of Computer Architecture Institute of Computing Technology Chinese Academy of Sciences no. 6 Kexueyuan South Road Zhongguancun Haidian District Beijing China Intel Labs Carnegie Mellon University 5000 Forbes Avenue PittsburghPA15213 United States École Polytechnique Fédérale de Lausanne Lausanne Switzerland IBM Research Zurich Saumerstrasse 4 8803 Ruschlikon Switzerland

Data warehouses have been traditionally optimized for read-only query performance, allowing only offline updates at night, essentially trading off data freshness for performance. The need for 24x7 operations in global markets and the rise of online and other quickly reacting businesses make concurrent online updates increasingly desirable. Unfortunately, state-of-the-art approaches fall short of supporting fast analysis queries over fresh data. The conventional approach of performing updates in place can dramatically slow down query performance, while prior proposals using differential updates either require large in-memory buffers or may incur significant update migration cost. This article presents a novel approach for supporting online updates in data warehouses that overcomes the limitations of prior approaches by making judicious use of available SSDs to cache incoming updates. We model the problem of query processing with differential updates as a type of outer join between the data residing on disks and the updates residing on *** present MaSM algorithms for performing such joins and periodicmigrations, with smallmemory footprints, low query overhead, low SSD writes, efficient in-place migration of updates, and correct ACID support. We present detailed modeling of the proposed approach, and provide proofs regarding the fundamental properties of the MaSM algorithms. Our experimentation shows that MaSM incurs only up to 7% overhead both on synthetic range scans (varying range size from 4KB to 100GB) and in a TPC-H query replay study, while also increasing the update throughput by orders of magnitude. © 2015 ACM.

关键词： Data warehouses

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New reachability trees for unbounded Petri nets

New reachability trees for unbounded Petri nets

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IEEE International Conference on Robotics and Automation (ICRA)

作者： ShouGuang Wang MengChu Zhou MengDi Gan Dan You Yue Li School of Information & Electronic Engineering Zhejiang Gongshang University Hangzhou China State Key Laboratory for Manufacturing Systems Engineering Xi'an Jiaotong University Xi'an China MoE Key Laboratory of Embedded System and Service Computing Tongji University Shanghai China Department of Electrical and Computer Engineering New Jersey Institute of Technology Newark NJ USA

ISBN: (纸本)9781479969241

Reachability is an important dynamic property of Petri nets. Its determination given an unbounded net and initial marking has remained an open problem since 1960s. Due to its extreme difficulty, a great deal of research has been focused on some subclasses of unbounded nets. For arbitrary ones, this work intends to propose a new reachability tree (NRT), which consists of only but all reachable markings from its initial marking. Furthermore, an NRT-based method to decide deadlocks of unbounded nets is presented. An example is provided to show the new results.

关键词： system recovery Petri nets Manufacturing systems Solids Gallium nitride Embedded systems

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Incorporation of Ordinal Optimization into Learning Automata for High Learning Efficiency

Incorporation of Ordinal Optimization into Learning Automata...

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IEEE International Conference on Automation Science and Engineering

作者： JunQi Zhang Cheng Wang Di Zang MengChu Zhou Department of Computer Science and Technology the Key Laboratory of Embedded System and Service Computing Ministry of Education Tongji University Department of Electrical and Computer Engineering New Jersey Institute of Technology

ISBN: (纸本)9781467381840

Learning automata (LA) represent important leaning mechanisms with applications in automated system design, biological system modeling, computer vision, and transportation. They play the critical roles in modeling a process as well as generating the appropriate signal to control it. They update their action probabilities in accordance with the inputs received from the environment and can improve their own performance during operations. The action probability vector in LA takes charge of two functions: 1) The cost of convergence, i.e., the size of sampling budget;2) The allocation of sampling budget among actions to identify the optimal one. These two intertwined functions lead to a problem: The sampling budget mostly goes to the currently estimated optimal action due to its high action probability regardless whether it can help identify the real optimal action or not. This work proposes a new class of LA that separates the allocation of sampling budget from the action probability vector. It uses the action probability vector to determine the size of sampling budget and then uses Optimal computing Budget Allocation (OCBA) to accomplish the allocation of sampling budget in a way that maximizes the probability of identifying the true optimal action. Simulation results verify its significant speedup ranging from 10.93% to 65.94% over the best existing LA algorithms.

关键词： Convergence Optimization Resource management Learning automata Computational modeling Pursuit algorithms Accuracy

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