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International Conference on High Performance computing

作者： Rui Wang Erlin Yao Mingyu Chen Guangming Tan Pavan Balaji Darius Buntinas State Key Laboratory of Computer Architecture Institute of Computing Technology Chinese Academy of Sciences China Mathematics and Computer Science Argonne National Laboratory USA

With the growing scale of high-performance computing (HPC) systems, today and more so tomorrow, faults are a norm rather than an exception. HPC applications typically tolerate fail-stop failures under the stop-and-wait scheme, where even if only one processor fails, the whole system has to stop and wait for the recovery of the corrupted data. It is now a more-or-less accepted fact that the stop-and-wait scheme will not scale to the next generation of HPC systems. Inspired by the previous stop-and-wait algorithm-based fault tolerance (ABFT) recovery technique, we propose in this paper a nonstop fault tolerance scheme at the application level and describe its implementation. When failure occurs during the execution of applications, we do not stop to wait for the recovery of the corrupted node; instead, we replace it with the corresponding redundant node and continue the execution. At the end of execution, the correct solution can be recovered algorithmically at a very low cost. In order to implement the scheme, some new fault-tolerant features of the Message Passing Interface (MPI) have been investigated and utilized in the MPICH implementation of MPI. We also describe a case study using High Performance Linpack (HPL) with these new features and evaluate the performance of both our new scheme and ABFT recovery. Experimental results show the advantage of our new scheme over ABFT recovery even in a small scale.

关键词： Fault tolerant systems Encoding Redundancy Checkpointing Matrix decomposition Libraries

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Cooperative communication based connectivity recovery for UAV networks 19

Cooperative communication based connectivity recovery for UA...

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2019 ACM Turing Celebration Conference - China, ACM TURC 2019

作者： Tian, Wen Jiao, Zhenzhen Liu, Min Zhang, Meng Li, Dong State Key Laboratory of Computer Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing100190 China University of Chinese Academy of Sciences Beijing100049 China RDA FOA ART-CN1 Corporate Technology Siemens Ltd. Beijing100102 China

ISBN: (纸本)9781450371582

UAV networks often partition into separated clusters due to the high node and link dynamic. As a result, network connectivity recovery is an important issue in this area. Existing solutions always need excessive movement of nodes and thus lead to low recovery efficiency in terms of the time and energy consumption. In this paper, we for the first time study the issue of how to utilize cooperative communication technology to improve the connectivity recovery efficiency in UAV networks. We propose a Cooperative Communication based Connectivity Recovery algorithm for UAV Networks, named C3RUN. The key novelty in C3RUN is nodes can proactively find better locations to establish more efficient cooperative communication links, than the ones from passively leveraging on existing opportunities. We conduct extensive simulations to evaluate the performance of C3RUN. The simulation results reveal that C3RUN can not only achieve connectivity recovery with less nodes and shorter distance to move, but also always finish recovery with less time, when comparing with existing work. Furthermore, C3RUN can achieve 100% success ratio for connectivity recovery. © 2019 Association for computing Machinery.

关键词： Cooperative communication

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Understanding the GPU Microarchitecture to Achieve Bare-Metal Performance Tuning

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ACM SIGPLAN Notices 2017年第8期52卷 31-43页

作者： Zhang, Xiuxia Tan, Guangming Xue, Shuangbai Li, Jiajia Zhou, Keren Chen, Mingyu State Key Laboratory of Computer Architecture Institute of Computing Technology Chinese Academy of Sciences China University of Chinese Academy of Sciences China Georgia Institute of Technology United States

In this paper, we present a methodology to understand GPU microarchitectural features and improve performance for compute-intensive kernels. The methodology relies on a reverse engineering approach to crack the GPU ISA encodings in order to build a GPU assembler. An assembly microbenchmark suite correlates microarchitectural features with their performance factors to uncover instruction-level and memory hierarchy preferences. We use SGEMM as a running example to show the ways to achieve bare-metal performance tuning. The performance boost is achieved by tuning FFMA throughput by activating dual-issue, eliminating register bank conflicts, adding non-FFMA instructions with little penalty, and choosing proper width of global/shared load instructions. On NVIDIA Kepler K20m, we develop a faster SGEMM with 3.1Tflop/s performance and 88% efficiency;the performance is 15% higher than cuBLAS7.0. Applying these optimizations to convolution, the implementation gains 39%-62% performance improvement compared with cuDNN4.0. The toolchain is an attempt to automatically crack different GPU ISA encodings and build an assembler adaptively for the purpose of performance enhancements to applications on GPUs. © 2017 ACM.

关键词： Reverse engineering

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Non-aligned double JPEG compression detection based on refined Markov features in QDCT domain

Non-aligned double JPEG compression detection based on refin...

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作者： Wang, Jinwei Huang, Wei Luo, Xiangyang Shi, Yun-Qing Jha, Sunil Kr. School of Computer and Software Nanjing University of Information Science and Technology NanjingJiangsu China Nanjing University of Information Science and Technology Nanjing China Shanxi Key Laboratory of Network and System Security Xidian University Shanxi China State Key Laboratory of Mathematical Engineering and Advanced Computing ZhengzhouHenan China New Jersey Institute of Technology NewarkNJ United States

Due to the widespread use of the JPEG format, non-aligned double JPEG (NA-DJPEG) compression is very common in image tampering. Therefore, non-aligned double JPEG compression detection has attracted significant attention in digital forensics in recent years. In most of the previous detection algorithms, grayscale images are used directly, or color images are first converted into grayscale images and then processed. However, it is worth noting that most tampered images are color images. To make full use of the color information in images, a detection algorithm, which uses color images directly, is put forward in this paper. The algorithm based on refined Markov in quaternion discrete cosine transform (QDCT) domain is proposed for NA-DJPEG compression detection. Firstly, color information of a given JPEG image is extracted from blocked images to construct quaternion, and then block image QDCT coefficient matrices, including amplitude and three angles (ψ, , and θ) can be obtained. Secondly, the refined Markov features are generated from the transition probability matrix in the corresponding refinement process. Our proposed refinement method not only reduces redundant features but also makes the acquired features more efficient in detection. Therefore, the refined Markov features can not only capture the intra-block correlation between block QDCT coefficients but also improve computing efficiency in real-time. Finally, support vector machine (SVM) method is employed for NA-DJPEG compression detection. The experiment results demonstrate that the proposed algorithm not only make use of color information of images, but also can achieve better detection performance with small size images (i.e., 64 × 64) outperforming state-of-the-art detection methods tested on the same dataset. © 2019, Springer-Verlag GmbH Germany, part of Springer Nature.

关键词： Discrete cosine transforms

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Tetris: Re-architecting convolutional neural network computation for machine learning accelerators

arXiv

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arXiv 2018年

作者： Lu, Hang Wei, Xin Lin, Ning Yan, Guihai Li, Xiaowei State Key Laboratory of Computer Architecture Institute of Computing Technology Chinese Academy of Sciences University of Chinese Academy of Sciences

Inference efficiency is the predominant consideration in designing deep learning accelerators. Previous work mainly focuses on skipping zero values to deal with remarkable ineffectual computation, while zero bits in non-zero values, as another major source of ineffectual computation, is often ignored. The reason lies on the difficulty of extracting essential bits during operating multiply-and-accumulate (MAC) in the processing element. Based on the fact that zero bits occupy as high as 68.9% fraction in the overall weights of modern deep convolutional neural network models, this paper firstly proposes a weight kneading technique that could eliminate ineffectual computation caused by either zero value weights or zero bits in non-zero weights, simultaneously. Besides, a split-and-accumulate (SAC) computing pattern in replacement of conventional MAC, as well as the corresponding hardware accelerator design called Tetris are proposed to support weight kneading at the hardware level. Experimental results prove that Tetris could speed up inference up to 1.50x, and improve power efficiency up to 5.33x compared with the state-of-the-art baselines. Copyright © 2018, The Authors. All rights reserved.

关键词： Deep neural networks

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A Highly Efficient Inter-domain Communication Channel

A Highly Efficient Inter-domain Communication Channel

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International Conference on computer and Information technology (CIT)

作者： Hongyong Zang Kuiyan Gu Yaqiong Li Yuzhong Sun Dan Meng Chinese Academy of Sciences Beijing China Institute of Computing Technology Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy and Sciences Beijing China Dongxin Geology Research Institute of Shengli Oilfield Dongying Shandong China

With virtual machine technology, distributed services deployed in multiple cooperative virtual machines, such as multi-tier Web services, may reside on one physical machine. This situation requires an efficient inter-domain communication channel, and meanwhile transparency and security should be guaranteed, for diverse existing distributed applications are serving on plenty of machines. In this paper, we have implemented a highly efficient inter-domain communication channel, called SChannel, with full transparency to both user applications and network protocol stack, and security between guest domains on Xen platform. Between two co-resident domains, SChannel establishes a two-way shared memory channel with elastic size, which is set up using static shared memory mechanism, instead of high-cost dynamic shared memory. Furthermore, SChannel avoids one additional copy from the shared data channel on the receiver domain side. In our evaluation using a number of standard benchmarks, SChannel increases the throughput 5 times than standard inter-domain mechanism offered by the hypervisor. Compared with other typical transparent inter-domain communication mechanism, SChannel achieves approximately 44.5% improvement of throughput, and reduces more than 3500 CPU cycles per packet.

关键词： Communication channels Virtual machine monitors Virtual machining Protocols Throughput Hardware Data security Costs Distributed computing Physics computing

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Adaptive rate-distortion prediction for multiple reference selection and inter-mode decision

Adaptive rate-distortion prediction for multiple reference s...

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13th Pacific-Rim Conference on Multimedia, PCM 2012

作者： Zhao, Tiesong Zhang, Yun Kwong, Sam Wang, Hanli Chen, Qian Shenzhen Institute of Advanced Technology Chinese Academy of Sciences Shenzhen China Department of Computer Science City University of Hong Kong Hong Kong Hong Kong Key Laboratory of Embedded System and Service Computing Ministry of Education Tongji University Shanghai China

ISBN: (纸本)9783642347771

To minimize Rate-Distortion (RD) cost in video coding, RD Optimization (RDO) technique is adopted, which also brings increasingly computational complexity in Motion Estimation (ME), multiple reference selection and mode decision. In this paper, a Gaussian model based adaptive RD cost prediction method is developed to jointly speed up multiple reference selection and inter-mode decision. Besides the ability of achieving good coding efficiency with much reduced computational power, our method is also with two major advantages. First, it can achieve robust performance, including computational complexity reduction and almost intact video quality, with a wide range of video sequences resolutions and even for various scene changes;second, it could be either individually used or combined with the other efficient mode decision algorithms, and in both cases, our method could achieve remarkable performance, which is revealed by exhaustive experimental results. © 2012 Springer-Verlag.

关键词： Image coding

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See and think: disentangling semantic scene completion 18

See and think: disentangling semantic scene completion

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Proceedings of the 32nd International Conference on Neural Information Processing systems

作者： Shice Liu Yu Hu Yiming Zeng Qiankun Tang Beibei Jin Yinhe Han Xiaowei Li State Key Laboratory of Computer Architecture Institute of Computing Technology Chinese Academy of Sciences and University of Chinese Academy of Sciences

Semantic scene completion predicts volumetric occupancy and object category of a 3D scene, which helps intelligent agents to understand and interact with the surroundings. In this work, we propose a disentangled framework, sequentially carrying out 2D semantic segmentation, 2D-3D reprojection and 3D semantic scene completion. This three-stage framework has three advantages: (1) explicit semantic segmentation significantly boosts performance; (2) flexible fusion ways of sensor data bring good extensibility; (3) progress in any subtask will promote the holistic performance. Experimental results show that regardless of inputing a single depth or RGB-D, our framework can generate high-quality semantic scene completion, and outperforms state-of-the-art approaches on both synthetic and real datasets.

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ACR: Enabling computation reuse for approximate computing

ACR: Enabling computation reuse for approximate computing

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Asia and South Pacific Design Automation Conference

作者： Xin He Guihai Yan Yinhe Han Xiaowei Li University of Chinese Academy of Sciences State Key Laboratory of Computer Architecture Institute of Computing Technology Chinese Academy of Sciences

ISBN: (纸本)9781467395700

Approximate computing, which trades off computation quality (e.g, accuracy) and computation efforts, has becoming a promising technique to improve performance for many mission-non-critical and error-tolerant applications. The computations in such applications usually exhibit superior value locality, i.e, computations performed by a function or code region are very likely to reproduce “similar” results. Reusing the similar results can bypass redundant computations, as long as “exact” results are not mandatory. However, conventional computation reuse techniques are less effective in approximate computing paradigm. The input values of two computation instances have to be identical to reuse one for another, hence “exact” in *** propose ACR, an approximate computation reuse framework, to enable computation reuse for approximate computing. ACR relaxes the exact matching requirement in inputs to some extent regulated by “similarity” quantification, thereby shifting the exact computation reuse paradigm to its approximate counterpart. We furthermore propose an input significance-aware similarity quantification scheme through statistical approaches. Experimental result shows ACR could effectively exploit the potential of computation reuse for approximate computing and reduce 47.6% computations on average for a set of approximate applications.

关键词： Impedance matching Linear regression Predictive models Runtime

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Efficient graph computation for Node2Vec

arXiv

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arXiv 2018年

作者： Zhou, Dongyan Niu, Songjie Chen, Shimin State Key Laboratory of Computer Architecture Institute of Computing Technology Chinese Academy of Sciences University of Chinese Academy of Sciences

Node2Vec is a state-of-the-art general-purpose feature learning method for network analysis. However, current solutions cannot run Node2Vec on large-scale graphs with billions of vertices and edges, which are common in real-world applications. The existing distributed Node2Vec on Spark incurs significant space and time overhead. It runs out of memory even for mid-sized graphs with millions of vertices. Moreover, it considers at most 30 edges for every vertex in generating random walks, causing poor result quality. In this paper, we propose Fast-Node2Vec, a family of efficient Node2Vec random walk algorithms on a Pregel-like graph computation framework. Fast-Node2Vec computes transition probabilities during random walks to reduce memory space consumption and computation overhead for large-scale graphs. The Pregel-like scheme avoids space and time overhead of Spark’s read-only RDD structures and shuffle operations. Moreover, we propose a number of optimization techniques to further reduce the computation overhead for popular vertices with large degrees. Empirical evaluation show that Fast-Node2Vec is capable of computing Node2Vec on graphs with billions of vertices and edges on a mid-sized machine cluster. Compared to Spark-Node2Vec, Fast-Node2Vec achieves 7.7–122x speedups. Copyright © 2018, The Authors. All rights reserved.

关键词： Graphic methods

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