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IEEE International Conference on Electronics, Circuits and systems (ICECS)

作者： Shuangshuang Zhang Zhenya Fan Liwei Chen Cheng Qian Xiang Gao State Key Laboratory of Computer Architecture Institute of Computing Technology Beijing China

Hardware accelerators are widely employed to alleviate CPU's burden in video applications. Playing high definition videos encoded in popular standards such as H.264, MPEG4 and VC-1 has already gain significant speedups on Intel, AMD and NVIDIA platforms. In this paper, we realized fluent playback of 720p AVS video on the Godson Platform. We made that possible by expanding the VA-API (Video Acceleration API) specification, developing Godson's backend driver, and implementing hardware accelerated AVS decoder for MPlayer-vaapi. In the playback tests, significant speedup (10x against the software decoder) and much lower CPU-usage-rate (around 5%) were achieved at the same time. And the final 30.282fps frame rate proved the effectiveness of our design and implementation. The methods presented in this paper can be referred to as a model for readers who want to expand the VA-API framework to accommodate new video compression standards, and those who want to add new hardware accelerators into MPlayer-vaapi.

关键词： Decoding Hardware Streaming media Acceleration Servers Software Surface treatment

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SmartCap: User experience-oriented power adaptation for smartphone's application processor 13

SmartCap: User experience-oriented power adaptation for smar...

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Design, Automation and Test in Europe Conference and Exhibition

作者： Xueliang Li Guihai Yan Yinhe Han Xiaowei Li State Key Laboratory of Computer Architecture Institute of Computing Technology Chinese Academy of Sciences

ISBN: (纸本)9781450321532

Power efficiency is increasingly critical to battery-powered smartphones. Given the using experience is most valued by the user, we propose that the power optimization should directly respect the user experience. We conduct a statistical sample survey and study the correlation among the user experience, the system runtime activities, and the minimal required frequency of an application processor. This study motivates an intelligent self-adaptive scheme, SmartCap, which automatically identifies the most power-efficient state of the application processor according to system activities. Compared to prior Linux power adaptation schemes, SmartCap can help save power from 11% to 84%, depending on applications, with little decline in user experience.

关键词： Smart phones Browsers Runtime Accuracy Training Time-frequency analysis Linux

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SMAT: An Input Adaptive Auto-Tuner for Sparse Matrix-Vector Multiplication 13

SMAT: An Input Adaptive Auto-Tuner for Sparse Matrix-Vector ...

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ACM SIGPLAN Conference on Programming Language Design and Implementation

作者： Jiajia Li Guangming Tan Mingyu Chen Ninghui Sun State Key Laboratory of Computer Architecture Institute of Computing Technology Chinese Academy of Sciences

ISBN: (纸本)9781450320146

Sparse Matrix Vector multiplication (SpMV) is an important kernel in both traditional high performance computing and emerging data-intensive applications. By far, SpMV libraries are optimized by either application-specific or architecture-specific approaches, making the libraries become too complicated to be used extensively in real applications. In this work we develop a Sparse Matrix-vector multiplication Auto-Tuning system (SMAT) to bridge the gap between specific optimizations and general-purpose usage. S-MAT provides users with a unified programming interface in compressed sparse row (CSR) format and automatically determines the optimal format and implementation for any input sparse matrix at runtime. For this purpose, SMAT leverages a learning model, which is generated in an off-line stage by a machine learning method with a training set of more than 2000 matrices from the UF sparse matrix collection, to quickly predict the best combination of the matrix feature parameters. Our experiments show that SMAT achieves impressive performance of up to 51GFLOPS in single-precision and 37GFLOPS in double-precision on mainstream x86 multi-core processors, which are both more than 3 times faster than the Intel MKL library. We also demonstrate its adaptability in an algebraic multi-grid solver from Hypre library with above 20% performance improvement reported.

关键词： Sparse matrix-vector multiplication SpMV Auto-tuning Data mining Algebraic multi-grid Algorithms Performance Self tuning data mining Sparse matrix Libraries algorithms Multiplication double precision

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Model predictive control for HVAC systems - A review

Model predictive control for HVAC systems - A review

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2013 IEEE International Conference on Automation Science and Engineering, CASE 2013

作者： Kwadzogah, Roger Zhou, Mengchu Li, Sisi Department of Electrical and Computer Engineering New Jersey Institute of Technology Newark NJ 07013 United States Key Laboratory of Embedded System and Service Computing Ministry of Education Tongji University Shanghai 201804 China

ISBN: (纸本)9781479915156

The world faces an energy problem. Oil supply is gradually running out. Its use is polluting the planet with greenhouse gas. Most alternative energy sources also pose some environmental problems. Hence the efficient use of energy must be an integral part of any solution to them. Whenever possible, one must use advanced control engines and technologies to achieve the highest energy efficiency. In Heating Ventilation and Air Conditioning (HVAC) industry, much research has identified a number of energy-saving control methods. Derived from optimal control theory, Model Predictive Control (MPC) is one of them. This paper presents a comprehensive review of its applications to HVAC systems. © 2013 IEEE.

关键词： Model predictive control

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Parallel simulation of many-core processor and many-core clusters

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Jisuanji Yanjiu yu Fazhan/computer Research and Development 2013年第5期50卷 1110-1117页

作者： Lü, Huiwei Cheng, Yuan Bai, Lu Chen, Mingyu Fan, Dongrui Sun, Ninghui State Key Laboratory of Computer Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing 100190 China University of Chinese Academy of Sciences Beijing 100049 China

computer architecture simulator is an important tool for computer architecture researchers. Recent development of parallel architectures bring great challenge to computer simulations. On the target side, as processors move towards multi-core and many-core, the complexity of the target system is doubling in the speed of Moore's law as the simulated target core number grows;on the host side, the speed of sequential simulation is halted as the speed of a single host processor halts. Due to the above two reasons, sequential simulation could no longer meet the challenge of new parallel architectures. In this paper, we will describe the necessity and feasibility of parallel simulation for parallel computer architectures using two examples: a many-core processor simulator and a many-core cluster simulator. For many-core processor simulator, we use parallel discrete event simulation (PDES) to speed it up 10.9 times without accuracy lost. For many-core cluster simulation, we simulated a cluster at 1024-core scale, with MPI/Pthreads runtime support.

关键词： Simulators

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Optimizing MPI Alltoall communications in multicore clusters

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Jisuanji Yanjiu yu Fazhan/computer Research and Development 2013年第8期50卷 1744-1754页

作者： Li, Qiang Sun, Ninghui Huo, Zhigang Ma, Jie High Performance Computer Research Center Institute of Computing Technology Chinese Academy of Sciences Beijing 100190 China Key Laboratory of Computer System and Architecture Chinese Academy of Sciences Beijing 100190 China University of Chinese Academy of Sciences Beijing 100039 China

MPI Alltoall is an important collective operation. In multicore clusters, many processes run in a node. On the one hand, shared memory can be adopted to optimize Alltoall communications of small messages by leader-based schemes. However, as these schemes adopt a fixed number of leader processes, the optimal performance can't be obtained for all small messages. On the other hand, processes within a node contend for the same network resource. In Alltoall communications of large messages, many synchronization messages are used. Nevertheless, the contention makes their latency increase many times and the synchronization overhead can't be ingored. To solve these problems, two optimizations are presented. For small messages, the PLP method adopts changeable numbers of leader processes. For large messages, the LSS method reduces the number of synchronization messages from 3N to 2√N. The evaluations prove two methods. For small messages, the PLP method always obtains optimal performance. For large messages, the LSS method brings almost constant improvement percentage. The performance is improved by 25% for 32 KB and 64 KB messages.

关键词： Synchronization

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RSAK: Random stream attack for phase change memory in video applications

RSAK: Random stream attack for phase change memory in video ...

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VLSI Test Symposium

作者： Yuntan Fang Huawei Li Xiaowei Li State Key Laboratory of Computer Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing China

As an emerging non-volatile memory technology, phase change memory (PCM) is promising as an alternative for traditional memories such as DRAM. In spite of its non-volatility, high density, low standby power, and resilience to soft errors, PCM has a limited write endurance or lifetime, which means that each PCM cell can only be overwritten finite times. More importantly, limited lifetime potentially provides malicious attackers an opportunity to intentionally aggravate write traffic into PCM. In this paper, from the standpoint of attackers, we propose random stream attacks (RSAK) methods for phase change memory used in video applications. Experimental results show that compared to natural video sequences, RSAK incurs higher total write traffic or worsened lifetime. RSAK also gives hints on how to build a more secure PCM in video applications to counter malicious write streams.

关键词： Phase change materials Video sequences Streaming media Random access memory Security Encoding Measurement

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Spontaneous reload cache: Mimicking a larger cache with minimal hardware requirement

Spontaneous reload cache: Mimicking a larger cache with mini...

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2013 IEEE 8th International Conference on Networking, architecture and Storage, NAS 2013

作者： Zhang, Lunkai Zhang, Mingzhe Fan, Lingjun Wang, Da Ienne, Paolo State Key Laboratory of Computer Architecture Institute of Computing Technology Chinese Academy of Sciences China University of Chinese Academy of Sciences China College of Computer Science Inner Mongolia University China École Polytechnique Fédérale de Lausanne Lausanne Switzerland

ISBN: (纸本)9780769550343

In modern processor systems, on-chip Last Level Caches (LLCs) are used to bridge the speed gap between CPUs and off-chip memory. In recent years, the LRU policy effectiveness in low level caches has been questioned. A significant amount of recent work has explored the design space of replacement policies for CPUs' low level cache systems, and proposed a variety of replacement policies. All these pieces of work are based on the traditional idea of a conventional passive cache, which triggers memory accesses exclusively when there is a cache miss. Such passive cache systems have a theoretical performance upper bound, which is represented by Optimal Algorithm. In this work, we introduce a novel cache system called Spontaneous Reload Cache (SR-Cache). Contrary to passive caches, no matter whether a cache access is a hit or miss, an SR-Cache can actively load or reload an off-chip data block which is predicted to be used in the near future and evict the data block which has the lowest probability to be reused soon. We show that, with minimal hardware overhead, SR-Cache can achieve much better performance than conventional passive caches. © 2013 IEEE.

关键词： Program processors

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A scalable approach to column-based low-rank matrix approximation

A scalable approach to column-based low-rank matrix approxim...

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23rd International Joint Conference on Artificial Intelligence, IJCAI 2013

作者： Pi, Yifan Peng, Haoruo Zhou, Shuchang Zhang, Zhihua Institute for Theoretical Computer Science IIIS Tsinghua University Beijing 100084 China Department of Computer Science and Technology Tsinghua University Beijing 100084 China State Key Laboratory of Computer Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing 100190 China Google Inc. Beijing 100084 China College of Computer Science and Technology Zhejiang University Hangzhou 310027 China

ISBN: (纸本)9781577356332

In this paper, we address the column-based low-rank matrix approximation problem using a novel parallel approach. Our approach is based on the divide-and-combine idea. We first perform column selection on submatrices of an original data matrix in parallel, and then combine the selected columns into the final output. Our approach enjoys a theoretical relative-error upper bound. In addition, our column-based low-rank approximation partitions data in a deterministic way and makes no assumptions about matrix coherence. Compared with other traditional methods, our approach is scalable on largescale matrices. Finally, experiments on both simulated and real world data show that our approach is both efficient and effective.

关键词： Matrix algebra

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A comprehensive QoS determination model for Infrastructure-as-a-Service clouds

A comprehensive QoS determination model for Infrastructure-a...

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2013 IEEE International Conference on Automation Science and Engineering, CASE 2013

作者： Xia, Yunni Zhou, Mengchu Luo, Xin Zhu, Qingsheng Software Theory and Technology Chongqing Key Lab Chongqing University Chongqing 400030 China Key Laboratory of Embedded System and Service Computing Ministry of Education Tongji University Shanghai 201804 China Department of Electrical and Computer Engineering New Jersey Institute of Technology Newark NJ 07102 United States

ISBN: (纸本)9781479915156

Cloud computing is a recently developed new technology for complex systems with massive service sharing, which is different from the resource sharing of the grid computing systems. In a cloud environment, service requests from users go through numerous provider specific steps from the instant it is submitted to when the service is fully delivered. Quality modeling and analysis of clouds are not easy tasks because of the complexity of the provisioning mechanism and the dynamic cloud environment. This study proposes an analytical modelbased approach for quality evaluation of Infrastructure-as-a-Service cloud and consider expected request completion time, rejection probability, and system overhead rate as key QoS metrics. It also features with the modeling of different warming and cooling strategies of machines and the ability to identify the optimal balance between system overhead and performance. © 2013 IEEE.

关键词： Quality control

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