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Pixel-semantic revise of position: Learning a one-stage object detector with a shared encoder-decoder

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arXiv 2020年

作者： Li, Qian Guo, Nan Ye, Xiaochun Fan, Dongrui Tang, Zhimin Chen, Honggang Li, Wenming State Key Laboratory of Computer Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing China University of Chinese Academy of Sciences Beijing China

We analyze that different methods based channel or position attention mechanism give rise to different performance on scale, and some of state-of-the-art detectors applying feature pyramid are integrated with various variants convolutions with many mechanisms to enhance information, resulting in increasing runtime. This work addresses the difficulty by constructing an anchor-free detector with shared module consisting of encoder and decoder with attention mechanism. First, we consider different level features from backbone (e.g., ResNet-50) as the base features. Second, we feed the feature into a simple block, rather than various complex operations. Then, location and classification tasks are obtained by the detector head and classifier, respectively. At the same time, we use the semantic information to revise geometry locations. Additionally, we show that the detector is a pixel-semantic revise of position, universal, effective and simple to detect, especially large-scale objects. More importantly, this work compares different feature processing (e.g., mean, maximum or minimum) performance across channel. Finally, we present that our method improves detection AP of 3.8%, compared with state-of-the-art MNC based ResNet-101 on the standard MSCOCO baseline. Copyright © 2020, The Authors. All rights reserved.

关键词： Pixels

Video face recognition system: Retinaface-mnet-faster and secondary search

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arXiv 2020年

作者： Li, Qian Guo, Nan Ye, Xiaochun Fan, Dongrui Tang, Zhimin State Key Laboratory of Computer Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing China University of Chinese Academy of Sciences Beijing China

Face recognition is widely used in the scene. However, different visual environments require different methods, and face recognition has a difficulty in complex environments. Therefore, this paper mainly experiments complex faces in the video. First, we design an image pre-processing module for fuzzy scene or under-exposed faces to enhance images. Our experimental results demonstrate that effective images pre-processing improves the accuracy of 0.11%, 0.2% and 1.4% on LFW, WIDER FACE and our datasets, respectively. Second, we propose RetinacFace-mnet-faster for detection and a confidence threshold specification for face recognition, reducing the lost rate. Our experimental results show that our RetinaFace-mnet-faster for 640×480 resolution on the Tesla P40 and single-thread improve speed of 16.7% and 70.2%, respectively. Finally, we design secondary search mechanism with HNSW to improve performance. Ours is suitable for large-scale datasets, and experimental results show that our method is 82% faster than the violent retrieval for the single-frame detection. Copyright © 2020, The Authors. All rights reserved.

关键词： Face recognition

Global-view based Task Migration for Deep Learning Processor

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Global-view based Task Migration for Deep Learning Processor

IEEE International Conference on Big Data and Cloud computing (BdCloud)

作者： Jinyu Cheng Kai Zhao Yuanchao Xu College of Information Engineering Capital Normal University Beijing China State Key Laboratory of Computer Architecture Institute of Computing Technology CAS Beijing China

In order to cope with the deep neural network application characterized by big data and intensive computation and memory access, deep learning processors often adopt NUMA architecture and multi-core architecture to alleviate the bandwidth bottleneck and contention problems existing in a single storage node and improve the parallelism of the system. This design also increases the complexity of task scheduling, considering not only the data affinity but also the utilization of DLP. When the load of DLP is uneven, the existing local view scheduling will make forward view scheduling according to the status of tasks waiting in line, instead of following the principle of data affinity, and forcibly migrate tasks to DLP in other quadrants with lower load. It is observed that this strategy produces unnecessary task migration in heterogeneous programming model. The reason is that the load is uneven from local view but is even from global view. This unnecessary migration leads to bandwidth fluctuation and overall performance degradation. In order to overcome this problem, this paper proposes global view scheduling, which schedules according to the status of tasks waiting in line for execution and tasks waiting in line for scheduling. Lazy migration is adopted when DLP load is balanced from the global view, and eager migration is adopted immediately when DLP load is unbalanced from the global view. Experimental results show that this scheduling method can reduce unnecessary migration, alleviate bandwidth fluctuation and improve overall performance without reducing NPU utilization.

关键词： Deep learning Degradation Program processors Fluctuations Processor scheduling Bandwidth computer architecture

RaQu: An automatic high-utilization CNN quantization and mapping framework for general-purpose RRAM Accelerator

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RaQu: An automatic high-utilization CNN quantization and map...

Design Automation Conference

作者： Songyun Qu Bing Li Ying Wang Dawen Xu Xiandong Zhao Lei Zhang Institute of Computing Technology Chinese Academy of Sciences University of Chinese Academy of Sciences Capital Normal University State Key Laboratory of Computer Architecture Hefei University of Technology

ISBN: (数字)9781728110851

ISBN: (纸本)9781728158020

Convolutional neural networks (CNNs) have become the state-of-the-art technique in many classification tasks in IoT system. However, the low-power and area-constraint edge devices are unable to afford the expensive cost of CNNs. Resistive random access memory (RRAM) is attractive for establishing the CNN accelerator at the edge end due to the features of scalability, low-power and in-situ dot-product. However, mapping a random network architecture onto a general-purpose RRAM accelerator suffers a severe issue of resource underutilization. The neural network quantization offers an opportunity to rescue the degraded resource utilization. Selecting the bit-width for the vast parameters is impractically completed by human labor. This paper proposes an AutoML-based array-aware quantization and mapping framework that generates the fine-grained mixed-precision neural networks to optimize resource utilization in RRAM. In this framework, we design a two-stage learning and array-aware grouping strategy to quickly explore the huge searching space. The experimental results show that the proposed framework achieves 18.2%~36.1% improvement in resource utilization and 0.9%~3.3% increase in model accuracy over prior coarse-grained quantization methods.

关键词：

Streamline Ring ORAM Accesses through Spatial and Temporal Optimization

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Streamline Ring ORAM Accesses through Spatial and Temporal O...

IEEE Symposium on High-Performance computer architecture

作者： Dingyuan Cao Mingzhe Zhang Hang Lu Xiaochun Ye Dongrui Fan Yuezhi Che Rujia Wang Tsinghua University Beijing China State Key Laboratory of Computer Architecture ICT CAS Beijing China State Key Laboratory of Mathematical Engineering and Advanced Computing China Illinois Institute of Technology

Memory access patterns could leak temporal and spatial information in a sensitive program; therefore, obfuscated memory access patterns are desired from the security perspective. Oblivious RAM (ORAM) has been the favored candidate to eliminate the access pattern leakage through randomly remapping data blocks around the physical memory space. Meanwhile, accessing memory with ORAM protocols results in significant memory bandwidth overhead. For each memory request, after going through the ORAM obfuscation, the main memory needs to service tens of actual memory accesses, and only one real access out of them is useful for the program execution. Besides, to ensure the memory bus access patterns are indistinguishable, extra dummy blocks need to be stored and transmitted, which cause memory space waste and poor performance. In this work, we introduce a new framework, String ORAM, that accelerates the Ring ORAM accesses with Spatial and Temporal optimization schemes. First, we identify that dummy blocks could significantly waste memory space and propose a compact ORAM organization that leverages the real blocks in memory to obfuscate the memory access pattern. Then, we identify the inefficiency of current transaction-based Ring ORAM scheduling on DRAM devices and propose an effective scheduling technique that can overlap the time spent on row buffer misses while ensuring correctness and security. With a minimal modification on the hardware and software, and negligible impact on security, the framework reduces 30.05% execution time and up to 40% memory space overhead compared to the state-of-the-art bandwidth-efficient Ring ORAM.

关键词： Protocols Space debris Memory management Random access memory Performance gain Scheduling Software

ASBP: Automatic Structured Bit-Pruning for RRAM-Based NN Accelerator 21

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ASBP: Automatic Structured Bit-Pruning for RRAM-Based NN Acc...

Proceedings of the 58th Annual ACM/IEEE Design Automation Conference

作者： Songyun Qu Bing Li Ying Wang Lei Zhang Institute of Computing Technology Chinese Academy of Sciences and University of Chinese Academy of Sciences Capital Normal University Institute of Computing Technology Chinese Academy of Sciences and University of Chinese Academy of Sciences and State Key Laboratory of Computer Architecture Institute of Computing Technology Chinese Academy of Sciences

ISBN: (纸本)9781665432740

Network sparsity or pruning is an extensively studied method to optimize the computation efficiency of deep neural networks (DNNs) for CMOS-based accelerators, such as FPGAs and GPUs. Though the RRAM-based accelerator has demonstrated superior performance and energy efficiency for DNN tasks, deploying the sparse neural networks desires dedicated consideration to save resource consumption without introducing the expensive index overhead and sophisticated control. To exploit the potential of sparse neural network design on the RRAM-based accelerator, we propose an automatic structured bit-pruning design, ASBP, to harmonize the optimization objective of DNN sparsity with efficient RRAM deployment. Specifically, ASBP prunes the bits of weight which are split into different crossbars and thus, free the zero-value crossbar when mapping the neural network into RRAM-based accelerators without extra hardware modification. Meanwhile, ASBP employs the reinforcement learning (RL) approach to automatically select the best crossbar-aware bit-sparsity strategy for any given neural network without laborious human efforts. According to our experiments on a set of representative neural networks, ASBP saves up to 79.01% energy consumption and 54.79% area overhead compared to the baseline that deploys the original DNN on the RRAM-based accelerator. Besides, ASBP outperforms the state-of-the-art bit-sparsity design by 1.4x in terms of the energy reduction on the RRAM-based accelerator.

关键词： RRAM

Exploring spatial-temporal multi-frequency analysis for high-fidelity and temporal-consistency video prediction

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arXiv 2020年

作者： Jin, Beibei Hu, Yu Tang, Qiankun Niu, Jingyu Shi, Zhiping Han, Yinhe Li, Xiaowei Research Center for Intelligent Computing Systems State Key Laboratory of Computer Architecture Institute of Computing Technology Chinese Academy of Sciences University of Chinese Academy of Sciences Capital Normal University

Video prediction is a pixel-wise dense prediction task to infer future frames based on past frames. Missing appearance details and motion blur are still two major problems for current predictive models, which lead to image distortion and temporal inconsistency. In this paper, we point out the necessity of exploring multi-frequency analysis to deal with the two problems. Inspired by the frequency band decomposition characteristic of Human Vision system (HVS), we propose a video prediction network based on multi-level wavelet analysis to deal with spatial and temporal information in a unified manner. Specifically, multi-level spatial discrete wavelet transform decomposes each video frame into anisotropic sub-bands with multiple frequencies, helping to enrich structural information and reserve fine details. On the other hand, multi-level temporal discrete wavelet transform which operates on time axis decomposes the frame sequence into sub-band groups of different frequencies to accurately capture multi-frequency motions under fixed frame rate. Extensive experiments on diverse datasets demonstrate that our model shows significant improvements on fidelity and temporal consistency over the state-of-the-art works. Copyright © 2020, The Authors. All rights reserved.

关键词： Discrete wavelet transforms

Exploring Spatial-Temporal Multi-Frequency Analysis for High-Fidelity and Temporal-Consistency Video Prediction

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Exploring Spatial-Temporal Multi-Frequency Analysis for High...

Conference on computer Vision and Pattern Recognition (CVPR)

作者： Beibei Jin Yu Hu Qiankun Tang Jingyu Niu Zhiping Shi Yinhe Han Xiaowei Li Research Center for Intelligent Computing Systems State Key Laboratory of Computer Architecture Institute of Computing Technology Chinese Academy of Sciences University of Chinese Academy of Sciences Capital Normal University

ISBN: (数字)9781728171685

ISBN: (纸本)9781728171692

Video prediction is a pixel-wise dense prediction task to infer future frames based on past frames. Missing appearance details and motion blur are still two major problems for current models, leading to image distortion and temporal inconsistency. We point out the necessity of exploring multi-frequency analysis to deal with the two problems. Inspired by the frequency band decomposition characteristic of Human Vision system (HVS), we propose a video prediction network based on multi-level wavelet analysis to uniformly deal with spatial and temporal information. Specifically, multi-level spatial discrete wavelet transform decomposes each video frame into anisotropic sub-bands with multiple frequencies, helping to enrich structural information and reserve fine details. On the other hand, multilevel temporal discrete wavelet transform which operates on time axis decomposes the frame sequence into sub-band groups of different frequencies to accurately capture multifrequency motions under a fixed frame rate. Extensive experiments on diverse datasets demonstrate that our model shows significant improvements on fidelity and temporal consistency over the state-of-the-art works. Source code and videos are available at https://***/Bei-Jin/STMFANet.

关键词： Discrete wavelet transforms Predictive models Wavelet analysis Streaming media Time-frequency analysis

A New Perspective of Graph Data and A Generic and Efficient Method for Large Scale Graph Data Traversal

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arXiv 2020年

作者： Zhang, Chenglong State Key Laboratory of Computer Architecture Institute of Computing Technology Chinese Academy of Sciences School of Computer and Control Engineering University of Chinese Academy of Sciences Beijing100049 China

The BFS algorithm is a basic graph data processing algorithm and many other graph data processing algorithms have similar architectural features with BFS algorithm and can be built on the basis of BFS algorithm model. We analyze the differences between graph algorithms and traditional high-performance algorithms in detail, propose a new way of classifying algorithms into data independent algorithm and data correlation algorithm based on their run-time correlation with data, and use this new classification to explain the validity of the methods proposed in this paper. Through a deeper analysis of graph data, we propose a new fundamental perspective on understanding graph data, establishing a link between two basic data structures, graph and tree, and viewing graph data as consisting of smaller subgraphs and edge trees. Small degree vertices are found to be one of important cause of random memory access. Based on this, we propose a general, easy to implement, and efficient method for graph data processing, with the basic idea of treating low-degree vertices and core subgraphs separately, thus significantly reducing the size of random memory access and improving the efficiency of memory access. Finally, we evaluated the performance of the method on three major data center computing platforms (Intel, AMD, and ARM), and the experiments showed that it brought 19.7%, 31.8% and 17.9% performance improvement, respectively, with a performance-power ratio of 282.70 MTEPS/s on the ARM platform, ranking it among the Green graph500 in November 2019. World No. 1 on the big dataset list. Copyright © 2020, The Authors. All rights reserved.

关键词： Graph algorithms