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Improved condition for controllability of strongly dependent strict minimal siphons in Petri nets

Improved condition for controllability of strongly dependent...

引用

International Conference on Networking, Sensing and Control

作者： Liu, Guanjun Jiang, Changjun Zhou, Mengchu Key Laboratory of the MoE for Embedded System and Service Computing Tongji University Shanghai 201804 China Department of Electrical and Computer Engineering New Jersey Institute of Technology Newark NJ 07102 United States

ISBN: (纸本)9781424495702

Li and Zhou propose an important concept for Petri nets: elementary siphons. They partition siphons into elementary and dependent ones. The controllability of the latter can be ensured by the former's proper control. They give a sufficient condition to decide whether a dependent siphon is controlled by its elementary ones in S3PR. However, this condition is so loose that in many cases the controllability of a dependent SMS cannot be determined although it is actually controlled. In this paper, we propose an improved condition to decide the controllability of strongly dependent SMS. © 2011 IEEE.

关键词： Controllability

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MUSIZ: A generic framework for music resizing with stretching and cropping 11

MUSIZ: A generic framework for music resizing with stretchin...

引用

19th ACM International Conference on Multimedia ACM Multimedia 2011, MM'11

作者： Zhang, Liu Wang, Chaokun Ba, Yiyuan Wang, Hao Wang, Jianmin Department of Computer Science and Technology Tsinghua University China School of Software Tsinghua University Beijing 100084 China Tsinghua National Laboratory for Information Science and Technology China Key Laboratory for Information System Security Ministry of Education China Key Laboratory of Intelligent Information Processing Institute of Computing Technology CAS China

ISBN: (纸本)9781450306164

Content-aware music adaption, i.e. music resizing, in temporal constraints starts drawing attention from multimedia communities because of the need of real-world scenarios, e.g. animation production and radio advertisement production. The goal of music resizing is to change the length of a music track to a user preferred length using a series of basic operations, e.g. compression, prolonging, cropping and repeating. The only existing music resizing approach so far, called LyDAR, suffers from some limitations. For example, it cannot support prolonging a music track and cannot compress music pieces with very small stretch rates. In this paper, we propose MUSIZ, a generic framework for MUsic reSIZing. Observing the diversity of quality degradation for different segments, we propose the concept of stretch-resistance to measure the degree of quality degradation after a segment is stretched. MUSIZ stretches high stretch-resistance segments intensively and relieves low stretch-resistance segments to reduce the negative impact on the stretched music piece. For short length resizing requests, we develop a contiguity-preservative cropping algorithm to remove segments before stretching, while smoothing the abrupt change at the joint between two segments. Comprehensive experimental results show that MUSIZ is superior to the existing approaches. © 2011 ACM.

关键词： stretch-resistance music retargeting music resizing

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Cross-layer optimized placement and routing for FPGA soft error mitigation

Cross-layer optimized placement and routing for FPGA soft er...

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作者： Huang, Keheng Hu, Yu Li, Xiaowei Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing 100190 China Graduate University Chinese Academy of Sciences Beijing 100049 China

ISBN: (纸本)9783981080179

As the feature size of FPGA shrinks to nanometers, soft errors increasingly become an important concern for SRAM-based FPGAs. Without consideration of the application level impact, existing reliability-oriented placement and routing approaches analyze soft error rate (SER) only at the physical level, consequently completing the design with suboptimal soft error mitigation. Our analysis shows that the statistical variation of the application level factor is significant. Hence in this work, we first propose a cube-based analysis to efficiently and accurately evaluate the application level factor. And then we propose a cross-layer optimized placement and routing algorithm to reduce the SER by incorporating the application level and the physical level factor together. Experimental results show that, the average difference of the application level factor between our cube-based method and Monte Carlo golden simulation is less than 0.01. Moreover, compared with the baseline VPR placement and routing technique, the cross-layer optimized placement and routing algorithm can reduce the SER by 14% with no area and performance overhead. © 2011 EDAA.

关键词： Field programmable gate arrays (FPGA)

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On diagnosis of multiple faults using compacted responses

On diagnosis of multiple faults using compacted responses

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作者： Ye, Jing Hu, Yu Li, Xiaowei Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing 100190 China Graduate University Chinese Academy of Sciences Beijing 100049 China

ISBN: (纸本)9783981080179

With the exponential growth in the number of transistors, not only test data volume and test application time may increase, but also multiple faults may exist in one chip. Test compaction has been a de-facto design-for-testability technique to reduce the test cost. However, the compacted test responses make multiple-fault diagnosis rather difficult. When there is no space compactor, the most likely suspect fault is considered producing the failing responses most similar to the failing responses observed from the automatic test equipment. But when compactor exists, those suspect faults may no longer have the same high possibility of being the actual faults. To address this problem, we introduce a novel metric explanation necessity. By using both of the new metric and the traditional metric explanation capability, we evaluate the possibility of a suspect fault to be the actual fault. For ISCAS'89 and ITC'99 benchmark circuits equipped with extreme space compactors, experimental results show that 98.8% of the top-ranked suspect faults hit the actual faults, outperforming a previous work by 11.3%. © 2011 EDAA.

关键词： Design for testability

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A cost-effective substantial-impact-filter based method to tolerate voltage emergencies

A cost-effective substantial-impact-filter based method to t...

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作者： Pan, Songjun Hu, Yu Hu, Xing Li, Xiaowei Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing 100190 China Graduate University Chinese Academy of Sciences Beijing 100049 China

ISBN: (纸本)9783981080179

Supply voltage fluctuation caused by inductive noises has become a critical problem in microprocessor design. A voltage emergency occurs when supply voltage variation exceeds the acceptable voltage margin, jeopardizing the microprocessor reliability. Existing techniques assume all voltage emergencies would definitely lead to incorrect program execution and prudently activate rollbacks or flushes to recover, and consequently incur high performance overhead. We observe that not all voltage emergencies result in external visible errors, which can be exploited to avoid unnecessary protection. In this paper, we propose a substantial-impact-filter based method to tolerate voltage emergencies, including three key techniques: 1) Analyze the architecture-level masking of voltage emergencies during program execution;2) Propose a metric intermittent vulnerability factor for intermittent timing faults (IV F itf) to quantitatively estimate the vulnerability of microprocessor structures (load/store queue and register file) to voltage emergencies;3) Propose a substantial-impact-filter based method to handle voltage emergencies. Experimental results demonstrate our approach gains back nearly 57% of the performance loss compared with the once-occur-then-rollback approach. © 2011 EDAA.

关键词： Cost effectiveness

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A Case Study: Low Power Design-for-Testability Features of a Multi-core Processor Godson-T

A Case Study: Low Power Design-for-Testability Features of a...

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2011 2nd International Conference on Advanced Measurement and Test (AMT 2011)

作者： Da Wang Dongrui Fan Yu Hu Key Laboratory of Computer System and Architecture Institute of Computing TechnologyChinese Academy of Sciences

This paper describes the low power test challenges and features of a multi-core processor, Godson-T, which contains 16 identical coresSince the silicon design technology scales to ultra deep submicron and even nanometers, the complexity and cost of testing is growing up, and the test power of such designs is extremely curious, especially for multicore processorsIn this paper, we use the modular design methodology and scaleable design-for-testability(DFT) structure to achieve low test power, at the same time, an improved test pattern generation method is studied to reduce test power further moreThe experimental results from the real chip show that the test power and test time are well balanced while achieving acceptable test coverage and cost.

关键词： design-for-testability(DFT),multi-core processor,very large scale integration(VLSI),power reduction,pattern filling,multi-capture

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Web service composition techniques in a health care service platform

Web service composition techniques in a health care service ...

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2011 IEEE 9th International Conference on Web Services, ICWS 2011

作者： Wang, Pengwei Ding, Zhijun Jiang, Changjun Zhou, Mengchu Key Laboratory of Embedded System and Service Computing Ministry of Education Tongji University Shanghai 200092 China Department of Electrical and Computer Engineering New Jersey Institute of Technology Newark NJ 07102 United States

ISBN: (纸本)9780769544632

The information technology has been recognized as one of the most important means to improve health care and curb its ever-increasing cost. However, existing efforts mainly focus on informatization of hospitals or medical institutions within organizations, and few are directly oriented to individuals. The strong demand for various health services from customers calls for the creation of powerful individual-oriented personalized health care service systems. Web service composition (WSC) and related technologies can greatly help one build such systems. This paper aims to present a newly developed platform called a Public-oriented Health care Information Service Platform (PHISP) and several novel WSC techniques that are used to build it. Among them include WSC techniques that can well support branch and parallel structures. © 2011 IEEE.

关键词： Web services

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Processes scheduling on heterogeneous multi-core architecture with hardware support

Processes scheduling on heterogeneous multi-core architectur...

引用

IEEE International Conference on Networking, Architecture and Storage

作者： Hao, Shouqing Liu, Qi Zhang, Longbing Wang, Jian Key Laboratory of Computer System and Architecture Chinese Academy of Sciences Beijing China Institute of Computing Technology Chinese Academy of Sciences Beijing China Graduate University of Chinese Academy of Sciences China Loongson Technology Corporation Limited China

ISBN: (纸本)9780769545097

Heterogeneous Chip Multi-Processors (heter-CMP) provide suitable resources to various applications and could get more benefits on performance than homogeneous CMP. To fully develop the performance of the heter-CMP system, the applications should be scheduled to the proper cores by the scheduler of the operating system according to their behaviours. Besides, the last level cache (LLC) miss rate is often used as the metric to identify the application features. However, the LLC miss rate could not reflect the application behaviours accurately since the memory access delay, the most important application character is related to patterns of the memory access and many other issues. To improve the accuracy of scheduling on the heter-CMP system, this paper supplies performance counters for the LLC miss penalty to monitor application behaviours. Based on that, the latency-aware scheduling algorithm for asymmetry chip multi-processors (LA-ACMP) is proposed and implemented. Those hardware supports are implemented on the Godson-3 multi-core RTL and simulator and the LA-ACMP algorithm is integrated to the Linux kernel. The performance evaluation on those platforms shows that the LA-ACMP algorithm with LLC miss penalty outperforms the algorithm with LLC miss rate about 32.4%, and outperforms the original schedule algorithm about 18.4%. © 2011 IEEE.

关键词： Scheduling algorithms

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An efficient shared memory based virtual communication system for embedded SMP cluster

An efficient shared memory based virtual communication syste...

引用

IEEE International Conference on Networking, Architecture and Storage

作者： Yin, Wenxuan Gao, Xiang Zhu, Xiaojing Guo, Deyuan Graduate University of Chinese Academy of Sciences Beijing China Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing China Loongson Technology Corporation Limited Beijing China Institute of Microelectronics Tsinghua University Beijing China

ISBN: (纸本)9780769545097

With the prevalence of multi-core processors, it is a trend that the embedded cluster deploys SMP nodes to gain more computing power. As a crucial issue, the MPI interprocess communication has been suffering the contradiction between high performance and embedded constraints. Moreover, there is a big performance gap between intra- and inter-node communication for different infrastructures. In this paper, we design a virtual communication system called SMVN, which extends the shared memory mechanism typically used in intra-node case into the inter-node case. The SMVN utilizes the HT inter-chip interconnect interface in Godson-3A SMP nodes to build a mesh topology. It is Ethernet compatible by simulating bottom layers of TCP/IP protocol. With the design, the node interconnection can get rid of NICs, cables and switches. Furthermore, we exploit the zero-copy scheme and other optimizations to improve the performance. We port the MPICH2 library by socket channel and formulate its process allocation. The MPI latency and bandwidth tests show that the performance difference between two levels is small. The inter-node bandwidth is 27.3MB/s, which is more than twice the theoretical peak value of 100Mb Ethernet and reaches 84% of the intra-node performance. © 2011 IEEE.

关键词： Bandwidth

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An ultrasound system for tumor detection in soft tissues using low transient pulse

An ultrasound system for tumor detection in soft tissues usi...

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2011 7th IEEE International Conference on Automation Science and Engineering, CASE 2011

作者： Ratnakar, Ashish R. Zhou, MengChu Dept. of Electrical and Computer Engineering New Jersey Institute of Technology Newark NJ 07102-1982 United States MoE Key Laboratory of Embedded System and Service Computing Tongji University Shanghai 200092 China

ISBN: (纸本)9781457717307

This work presents a method to detect the size and location of tumor in soft tissues using ultrasound. Quantitative ultrasound is utilized to allow an ultrasound signal to be sent from a transmitter to multiple receivers. This received signal is analyzed for echogenic and echolucent tumors to differentiate between the two along with non-tumor sample and also studied for the delay to determine the size/location of the tumor. The proposed system utilizes Low Transient Pulse (LTP) technique and is implemented using Field Programmable Gate Array (FPGA) and Digital Signal Processor (DSP) technologies. In this co-design architecture, DSP carries out the analysis of received demodulated signal at a lower speed while FPGA runs at a higher one to generate LTP signal and demodulate bandpass ultrasonic signal. This work elaborates the implementation of Quadrature Amplitude Modulation (QAM) receiver on FPGA for the received signal from an ultrasound detector. LTP is applied to the tumor samples through the transmitter and the received signal at an ultrasonic receiver is passed through QAM to obtain different maxima that are then further used to compute the location and the size of the tumor using DSP. This dual platform co-design demonstrates a good application of a FPGA/DSP platform for the LTP generation and received signal processing. © 2011 IEEE.

关键词： Tumors

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