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A routing algorithm for random error tolerance in network-on-chip

引用

12th International Conference on Human-computer Interaction, HCI International 2007

作者： Zhang, Lei Li, Huawei Li, Xiaowei Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy of Sciences 100080 Beijing China Graduate University Chinese Academy of Sciences Beijing 100080 China

ISBN: (纸本)9783540731092

In DSM and nanometer technology, there will present more and more new fault types, which are difficult to predict and avoid. Applying fault tolerant algorithms to achieve reliable on-chip communication is one of the most important issues of Network-on-Chip (NoC). This paper reviews the main on-chip fault tolerant communication algorithms and then proposes a new routing algorithm with end-to-end feedback. The average transmission latency, power consumption and reliability are compared with other techniques. As experiments show, the proposed algorithm has lower latency, lower power consumption compared with those of others, and it can provide high reliability. © Springer-Verlag Berlin Heidelberg 2007.

关键词： Routing algorithms

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Protein structure superposition by curve moment invariants and iterative closest point

Protein structure superposition by curve moment invariants a...

引用

2007 1st International Conference on Bioinformatics and Biomedical Engineering, ICBBE

作者： Xu, Dong Li, Hua Gu, Tongjun Key Laboratory of Intelligent Information Processing Key Laboratory of Computer System and Architecture National Research Center for Intelligent Computing Systems Institute of Computing Technology Chinese Academy of Sciences Center for Systems Biology Institute of Biophysics Chinese Academy of Sciences Graduate University Chinese Academy of Sciences

ISBN: (纸本)1424411203

Superimpose one protein tertiary structure to another can help to find similarity between them and further identify functional and evolutionary relationships. We first extract invariant features under rigid body transformation for each protein backbone which is represented by alpha-carbons of all the residues. Then, the invariant features are embedded with Iterative Closest Point algorithm for superposition. With several initialized orientations, pairwise alignment can be achieved accurately only by few iterations. Experiments indicate that our proposed algorithm is competitive with several well-known algorithms and with smallest root mean squared distance. © 2007 IEEE.

关键词： Proteins

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cco-exist with other services on a VM-based virtualized computing platform?

cco-exist with other services on a VM-based virtualized comp...

引用

2007 Asian technology Information Program's (ATIP's) 3rd Workshop on High Performance computing in China - Solution Approaches to Impediments for High Performance computing, CHINA HPC'07

作者： Song, Ying Wang, Hui Li, Yaqiong Sun, Yuzhong Zeng, Yu Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing 100080 China National Research Center for Intelligent Computing Systems ICT Beijing 100080 China Graduate University of Chinese Academy of Sciences Beijing 100049 China

ISBN: (纸本)9781595939036

Trend towards providing heterogeneous services concurrently by ISPs and low utilization of servers make it necessary to consolidate various services computing into a single platform. In such a shared environment, meeting application-level QoS goals and avoiding interaction among services become challenges as each application consumes different amount of resource and requires different QoS. Video-on-demand (VoD) has been identified as an important application among multimedia services. In this paper, we study a case of interaction among services concurrently running on a virtualized computing environment. The contributions of this paper are follows. 1) We design a novel capability service computing framework for service computing consolidation (CSCF) to study the interaction among concurrent services in a VM-Based Virtualized computing Environment;2) A dynamic and lazy memory flowing algorithm (DLMFaVM) among VMs is proposed to partially fulfill this computing model by resource flowing;3) We also develop a virtualized computing platform to study the possibility of service computing consolidation;4) We analyze the interaction among VoD service and other typical enterprise services in our capability service computing environment and draw a conclusion that the VoD streaming service co-existing with other services on a VM-based virtualized computing platform is a trend for ISPs. But it presents some challenges for the designers of service soft and the designers of service computing platform. Copyright 2007 ACM.

关键词： Video on demand

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Simplified Multi-Ported Cache in High Performance Processor

Simplified Multi-Ported Cache in High Performance Processor

引用

International Conference on Networking, Architecture, and Storage (NAS)

作者： Hao Zhang Dongrui Fan Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy and Sciences China

The memory bandwidth demands of modern microprocessors require the use of a multi-ported cache to achieve peak performance. However, multi- ported caches are costly to implement. In this paper we propose technique for using a simplified dual-ported cache instead, which is mostly composed of single- ported SRAMs, without decreasing the performance of the processor apparently. We evaluate this technique using realistic applications that include the operating system. Our technique using a simplified multi-ported banking cache, reduces the delay of select logic in LSQ by 16.1%, and achieves 98.1% of the performance of an ideal dual-ported cache.

关键词： Microprocessors Costs Delay Bandwidth Banking Clocks Laboratories High performance computing computer architecture Operating systems

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Design and Implementation of Floating Point Stack on General RISC Architecture

Design and Implementation of Floating Point Stack on General...

引用

Euromicro Conference on Parallel, Distributed and Network-Based Processing

作者： Xuehai Qian He Huang Hao Zhang Guoping Long Junchao Zhang Dongrui Fan Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy and Sciences China

This paper presents a framework for implementing the X86 FP stack used in an x86-compliant processor based on a general RISC architecture. Architectural supports are added to a typical RISC architecture to maintain the FP stack status. Some speculative techniques are applied to the decode stage to enable pipelined and efficient FP operations. An optimized register renaming scheme is proposed to eliminate redundant micro-ops in FP programs, resulting in an increased performance while mitigating the burden on register rename table. The simulation results show that on average more than 10% fmov micro-ops are removed. Elimination of micro-ops significantly speeds up the execution of programs. The IPC increases are as high as 30% for some programs, and near 10% on average

关键词： Reduced instruction set computing Registers computer architecture Decoding Helium Laboratories Design methodology Prototypes Analytical models Performance analysis

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Low Power Techniques on a High Speed Floating-point Adder Design

Low Power Techniques on a High Speed Floating-point Adder De...

引用

IEEE International Conference on Integration technology (ICIT)

作者： Ge Zhang Kun Huang Haihua Shen Feng Zhang Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy and Sciences Beijing China

A 64 bit low power, high speed floating-point adder design is presented in this paper. The proposed floating-point adder is based on dual path architecture, and both dynamic and leakage power are reduced by exploiting architecture opportunities to minimize switching activity and maximize the stack effect of the circuits concurrently. Experimental result based on 130 nm CMOS standard cell design shows that average power consumptions of the FP adder can be reduced by 61.4% with proposed low power techniques.

关键词： Adders Energy consumption Microprocessors Delay computer architecture Laboratories Switching circuits Central Processing Unit CMOS logic circuits Logic design

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Grid Unit: A Self-Managing Building Block for Grid system

Grid Unit: A Self-Managing Building Block for Grid System

引用

IEEE International Conference on Parallel and Distributed computing, Applications and Technologies (PDCAT)

作者： Jianfeng Zhan Lei Wang Ming Zou Hui Wang Shuang Gao Yulei Ding Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy and Sciences Beijing China

Grid system software is inherently complex, hard to build and maintain. In this paper, we propose a self-managing building block: grid unit, which facilitates constructing grid system with higher availability and lower management overhead. We present an agent organization as autonomic management framework, and propose a self-recovering protocol to eliminate most of tough jobs from system administrator's routines. The system has been deployed on Dawning 4000A since 2004, the biggest node for China grid system. We have done extensive experiments to evaluate grid unit, and the collected log data shows the availability of a grid parallel process management service, built on the basis of grid unit, reaches 99.997%.

关键词： Availability Distributed computing computer architecture Protocols Large-scale systems Operating systems Resource management Application software Laboratories Concurrent computing

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An Innovative Power-Efficient Architecture for Input Buffer of Network on Chip

An Innovative Power-Efficient Architecture for Input Buffer ...

引用

IEEE International Conference on Integration technology (ICIT)

作者： Kun Huang Jun Wang Ge Zhang Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy and Sciences Beijing China

In recent years, the power efficiency of NoC (network on chip) is becoming a new research direction. For tiled CMP (single-chip multi processor), the characteristics of transmission data of NoC in a tiled CMP should be noticed that the probability of which the transmitted bits are zero is much bigger than that of which the bits are one. This paper proposes an innovative power-efficient architecture of input buffer of NoC, which makes use of the mentioned characteristics, can improve the power efficiency of the NoC of tiled CMP significantly.

关键词： Network-on-a-chip Energy consumption computer architecture Microprocessors Delay system-on-a-chip Buffer storage Routing Laboratories computer networks

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A layered design methodology of cluster system stack

A layered design methodology of cluster system stack

引用

IEEE International Conference on Cluster computing

作者： Jianfeng Zhan Lei Wang Bibo Tu Zhihong Zhang Yu Wen Yuansheng Chen Wei Zhou Dan Meng Ninghui Sun Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy and Sciences Beijing China

The application range of cluster has expanded beyond scientific computing, but the present cluster system software fails to provide a flexible architecture to promote code reuse and facilitate building cluster system software for different computing contexts, most of which are developed from scratch case by case, or integrated or packaged with ldquothe best practicerdquo. In this paper, we have proposed a layered design methodology to build cluster system stack with different layers concentrating on different functions, and developed common sets of core service as reusing framework for different computing context. Following this methodology, we have built Phoenix-a complete cluster system stack for both scientific and business computing, which is verified and deployed on Dawning 4000 A super computer for scientific computing and other cluster systems for business computing. The qualitative evaluation and our practices show the design methodology of Phoenix has advantages over other methodologies.

关键词： Design methodology system software Engines computer architecture Software Business Monitoring

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Gingko: correlating causal paths in distributed systems

Gingko: correlating causal paths in distributed systems

引用

IFIP International Conference on Network and Parallel computing Workshops (NPC Workshops)

作者： Zhihong Zhang Dan Meng Jianfeng Zhan Lei Wang Yi Jin Yu Wen Hui Wang Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy and Sciences Beijing China

Many large-scale systems are distributed systems of multiple communicating components. Finding causal paths of message traces between components throughout these systems is important to uncover runtime behaviors and identify the root cause of failures, but this "art" often hides in the heads of developers or domain experts. Our goal is to design tools and algorithms to help developers record this art into logs and help the modestly-skilled users and system administrators master it to make better use and management of distributed systems. In this paper, we present a methodology that automatically builds the causal paths of message traces by 1) an agreement with programmers on the style and content of logs produced by operational distributed systems they develop and 2) a correlation algorithm to build message causal paths with the clues from these logs. To validate this mechanism, we have implemented Gingko, a prototype providing a tool chain for users to gain better comprehensions of distributed systems and to debug them efficiently when errors happen.

关键词： Runtime Art Clustering algorithms Algorithm design and analysis Programming profession Prototypes Production systems Parallel processing Laboratories computer networks

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