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Evaluation Method of Synchronization for Shared-Memory On-Chip Many-Core Processor

Evaluation Method of Synchronization for Shared-Memory On-Ch...

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International Symposium on Parallel and Distributed Processing with Applications, ISPA

作者： Fenglong Song Zhiyong Liu Dongrui Fan He Huang Nan Yuan Lei Yu Junchao Zhang Chinese Academy of Sciences Beijing Beijing CN Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy and Sciences Beijing China

On-chip many core architecture is an emerging and promising computation platform. High speed on-chip communication and abundant chipped resources are two outstanding advantages of this architecture, which provide an opportunity to implement efficient synchronization scheme. The practical execution efficiency of synchronization scheme is critical to this platform. However, there are few researches on systematic evaluation method of choice synchronization schemes for on-chip many core processors, and effect of dedicated hardware support in this context. So we focus on the evaluation method and criterion of synchronization scheme on the platform. Firstly, we present several criterions proper to on-chip many core architecture, that is, absolute overhead of synchronization operation, the transferring time between different synchronization operations, overhead caused by load imbalance, and the network congestion caused by synchronization operation. Secondly, we illustrate how to design microbenchmarks which one dedicated to evaluate a performance criterion respectively. Finally, we implement these microbenchmarks and synchronization schemes on an on-chip many core processor with shared level-two cache and AMD Opteron commercial chip multi-processor, respectively. And we analyze effect of dedicated hardware support. Results show that the most overhead of synchronization is caused by load imbalance and serialization on synchronization point. It also shows that synchronization scheme supported with dedicated hardware can improve its performance obviously for chipped many-core processor.

关键词： computer architecture Hardware Yarn Costs system-on-a-chip Concurrent computing Distributed computing Network-on-a-chip Distributed processing Application software

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Data Management: The Spirit to Pursuit Peak Performance on Many-Core Processor

Data Management: The Spirit to Pursuit Peak Performance on M...

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International Symposium on Parallel and Distributed Processing with Applications, ISPA

作者： Yongbin Zhou Junchao Zhang Shuai Zhang Nan Yuan Dongrui Fan Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy and Sciences Beijing China Chinese Academy of Sciences Beijing Beijing CN

To date, most of many-core prototypes employ tiled topologies connected through on-chip networks. The throughput and latency of the on-chip networks usually become to the bottleneck to achieve peak performance especially for communication intensive applications. Most of studies are focus on on-chip networks only, such as routing algorithms or router micro-architecture, to improve the above metrics. The salient aspect of our approach is that we provide a data management framework to implement high efficient on-chip traffic based on overall many-core system. The major contributions of this paper include that: (1) providing a novel tiled many-core architecture which supports software controlled on-chip data storage and movement management; (2) identifying that the asynchronous bulk data transfer mechanism is an effective method to tolerant the latency of 2-D mesh on-chip networks. At last, we evaluate the 1-D FFT algorithm on the framework and the performance achieves 47.6 Gflops with 24.8% computation efficiency.

关键词： Network-on-a-chip Delay Prototypes Network topology Throughput Routing system-on-a-chip Communication system traffic control computer architecture Memory

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Detecting and Eliminating Potential Violations of Sequential Consistency for Concurrent C/C++ Programs 09

Detecting and Eliminating Potential Violations of Sequential...

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International Symposium on Code Generation and Optimization (CGO)

作者： Yuelu Duan Xiaobing Feng Lei Wang Chao Zhang Pen-Chung Yew Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy and Sciences Beijing China Department of Computer Science and Engineering University of Minnesota Twin-Cities Minneapolis USA

ISBN: (纸本)9780769535760

When a concurrent shared-memory program written with a sequential consistency (SC) model is run on a machine implemented with a relaxed consistency (RC) model, it could cause SC violations that are very hard to debug. To avoid such violations, programmers need to provide explicit synchronizations or insert fence instructions. In this paper, we propose a scheme to detect and eliminate potential SC violations by combining Shasha/Snir's conflict graph and delay set theory with existing data race detection techniques. For each execution, we generate a race graph, which contains the improperly synchronized conflict accesses, called race accesses, and race cycles formed with those accesses. As a race cycle would probably lead to a non-sequential-consistent execution, we call it a potential violation of sequential consistency (PVSC) bug. We then compute the race delays of race cycles, and suggest programmers to insert fences into source code to eliminate PVSC bugs. We further convert a race graph into a PC race graph, and improves cycle detection and race delay computation to O(n 2 ), where n is the number of race access instructions. We evaluate our approach with the SPLASH-2 benchmarks, two large real-world applications (MySQL and Apache), and several multi-threaded Cilk programs. The results show that (1) the proposed approach could effec-tively detect PVSC bugs in real-world applications with good scalability; (2) it retains most of the performance of the concurrent program after inserting required fence instructions, with less than 6.3% performance loss; and (3) the additional cost of our approach over traditional race detection techniques is quite low, with 3.3% on average.

关键词： Programming profession Delay Set theory computer bugs Performance loss Chaos computer science Laboratories Concurrent computing computer architecture

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Mean Shift Based Collaborative Localization with Dynamically Clustering for Wireless Sensor Networks

Mean Shift Based Collaborative Localization with Dynamically...

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WRI International Conference on Communications and Mobile Computing, CMC

作者： Quan Zhou Xiaowei Li Yongjun Xu Institute of Computing Technology Key Laboratory of Computer System and Architecture Chinese Academy and Sciences Beijing China Institute of Computing Technology Laboratory of Sensor Networks Chinese Academy and Sciences Beijing China

Mean shift is a nonparametric method to estimate the density gradient, which iteratively computes the mean of observations and shifts to the centroid until reach a predefined end condition. This paper proposes a mean shift based scheme for localization and tracking in wireless sensor *** shift is a generalized framework, and range-free centroid and range-based W-Centrod are both the special cases of this generalized framework. A dynamically clustering protocol is proposed to support the generalized framework. Analysis and simulation results show that the communication overhead and jitter are reduced to 1/3 of traditional algorithms. The positioning accuracy of proposed algorithm with optimal weight increases 28% and 11% in comparison to Centroid and W-Centroid.

关键词： Wireless sensor networks computer networks Clustering algorithms Laboratories Protocols Equations Mobile communication Mobile computing International collaboration computer architecture

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Smallest Enclosing Circle Based Localization Approach for Wireless Sensor Networks

Smallest Enclosing Circle Based Localization Approach for Wi...

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WRI International Conference on Communications and Mobile Computing, CMC

作者： Quan Zhou Xiaowei Li Yongjun Xu Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy and Sciences Beijing China Laboratory of Sensor Networks Institute of Computing Technology Chinese Academy and Sciences Beijing China

A novel range-free localization approach, smallest enclosing Circle based Localization (SECL), has been proposed. This approach uses the center of smallest enclosing circle of neighboring anchor nodes to estimate the position of target. Comparing to centroid, SECL considers the geometrical coverage of anchors rather than the mass center of them. Consequently, SECL is robust to imperfect topology, especially when the topology of anchors is depolyed unevenly. Simulation results show that SECL outperforms Centroid by an average of 10%, and even better when the topology is not uniform.

关键词： Wireless sensor networks Network topology computer networks Laboratories Robustness Computational modeling Equations Hardware Mobile communication Mobile computing

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A stochastic method for controlling the scaling parameters of Cauchy mutation in fast evolutionary programming

A stochastic method for controlling the scaling parameters o...

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Congress on Evolutionary Computation

作者： Yunji Chen Ke Tang Tianshi Chen Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing China Nature Inspired Computation and Applications Laboratory Department of Computer Science and Technology University of Science and Technology of China Hefei Anhui China

The fast evolutionary programming (FEP) introduced the Cauchy distribution into its mutation operator, thus the performances of EP were promoted significantly on a number of benchmark problems. However, the scaling parameter of the Cauchy mutation is invariable, which has become an obstacle for FEP to reach better performance. This paper proposes and analyzes a new stochastic method for controlling the variable scaling parameters of Cauchy mutation. This stochastic method collects information from a group of individuals randomly selected from the population. Empirical evidence validates our method to be very helpful in promoting the performance of FEP.

关键词： Stochastic processes Genetic mutations Genetic programming Laboratories Random variables Gaussian distribution Control systems Stochastic systems computer architecture computer applications

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Optimizing inter-domain communication

Optimizing inter-domain communication

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15th International Conference on Parallel and Distributed systems, ICPADS '09

作者： Zang, Hongyong Sun, Yuzhong Gu, Kuiyan Institute of Computing Technology Chinese Academy of Sciences Beijing 100080 China Graduate University of Chinese Academy of Sciences Beijing 100049 China Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing 100080 China Dongxin Geology Research Institute of Shengli Oilfield Sinopec Dongying Shandong 257094 China

ISBN: (纸本)9780769539003

Virtual machine technology has played an important role in data center. Distributed services deployed in multiple virtual machines, may reside on one physical machine. This situation requires an efficient inter-domain communication channel with transparency and security principles ensured. Although current inter-domain mechanism has gained a much better performance compared to traditional inter-domain path offered by hypervisor, shared data channel size limitation and additional copy are still two restrains against a higher performance efficiency. In this paper, we give an analysis on these limitations, overcome these shortcomings, and achieve a higher efficient inter-domain communication channel. By applying virtual address protection mechanism during channel bootstrap, we enlarge the maximum size of shared data channel. By pointing network packet structure to the buffer in the shared data channel, we avoid an extra data copy on the receiver VM side. In our evaluation using a number of standard benchmarks, we have reduced the latency by nearly 40%, increased the throughput by approximately 45% and cut down more than 3500 CPU cycles per packet. © 2009 IEEE.

关键词： Virtual machine

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A highly efficient inter-domain communication channel

A highly efficient inter-domain communication channel

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IEEE 9th International Conference on computer and Information Technology, CIT 2009

作者： Zang, Hongyong Gu, Kuiyan Li, Yaqiong Sun, Yuzhong Meng, Dan Institute of Computing Technology Chinese Academy of Sciences Beijing 100080 China Graduate University of Chinese Academy of Sciences Beijing 100049 China Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing 100080 China Dongxin Geology Research Institute of Shengli Oilfield Sinopec Dongying Shandong 257094 China

ISBN: (纸本)9780769538365

With virtual machine technology, distributed services deployed in multiple cooperative virtual machines, such as multi-tier web services, may reside on one physical machine. This situation requires an efficient inter-domain communication channel, and meanwhile transparency and security should be guaranteed, for diverse existing distributed applications are serving on plenty of machines. In this paper, we have implemented a highly efficient inter-domain communication channel, called SChannel, with full transparency to both user applications and network protocol stack, and security between guest domains on Xen platform. Between two co-resident domains, SChannel establishes a twoway shared memory channel with elastic size, which is set up using static shared memory mechanism, instead of high-cost dynamic shared memory. Furthermore, SChannel avoids one additional copy from the shared data channel on the receiver domain side. In our evaluation using a number of standard benchmarks, SChannel increases the throughput 5 times than standard inter-domain mechanism offered by the hypervisor. Compared with other typical transparent inter-domain communication mechanism, SChannel achieves approximately 44.5% improvement of throughput, and reduces more than 3500 CPU cycles per packet. © 2009 IEEE.

关键词： Transparency

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A Model Analyzing Method for OWL-S Services Composition Based on High Level Petri Net

A Model Analyzing Method for OWL-S Services Composition Base...

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International Symposium on Knowledge Acquisition and Modeling, KAM

作者： Shaoran Dong Zengzhi Li State key Laboratory of Networking and Switching Technology Beijing University of Posts and Telecommunications Beijing China Institute of Computer System Architecture and Network Xi''an Jiaotong University Xi'an China

To analyze model of Web services composition, firstly analyze and abstract dataflow and control construct in OWL-S process to build high level Petri net model, then describe Petri net in Poses++ language, at last simulate Petri net with Poses++ to check data type and deadlock and calculate service performance. The experiment shows that this model analyzing method is able to accomplish type checking and deadlock and performance analyzing.

关键词： Performance analysis Web services system recovery Data analysis Petri nets Ontologies OWL Analytical models Knowledge acquisition computer networks

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architecture Level Energy Modeling and Optimization for Multi-Ported Giga-Hz Physical Register File

Architecture Level Energy Modeling and Optimization for Mult...

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International Conference on Networking, architecture, and Storage (NAS)

作者： Ge Zhang Xu Yang Yiwei Zhang Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy and Sciences Beijing China Department of Information and Technology University of International Relations UIR Beijing China

In modern high performance microprocessors, multi-ported register-files are commonly used and critical in both performance and energy consumption. As capability and issue width of register-file grows, its energy consumption increases rapidly. Much prior work about energy-efficient register-file design is focusing on various low levels except for architecture level. In this paper, an accurate architectural level energy model for register-file is proposed and verified, based on which some efficient and practical improvements are presented to save energy without changing the internal circuits or structure of register-file. We implemented a full-customized 64-bit width 64-entry depth physical register-file with 8 read ports and 4 write ports, whose power is as low as 20 mW, in a 1 GHz 4-issue out-of-order 64-bit MIPS microprocessor, Godson-2 [1], using 90 nm CMOS process. 56.0% of reading energy and 20.3% of writing energy can be saved.

关键词： Circuits computer architecture Energy consumption Microprocessors Registers Energy efficiency Out of order CMOS process Writing Semiconductor device modeling

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