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AdaptHM: A Fully Adaptive data Migration Strategy for Hybrid Memory systems

IEEE Transactions on Computer-Aided Design of Integrated Circuits and systems 2025年第3期44卷 923-936页

作者： Peng, Zhouxuan Feng, Dan Chen, Jianxi Hu, Jing Liu, Yachun Hu, Jinlei Zhang, Jintong Wan, Tianyu Chen, Zuoning Huazhong University of Science and Technology Wuhan National Laboratory for Optoelectronics Key Laboratory of Information Storage System Engineering Research Center of Data Storage Systems and Technology MoE of China Wuhan430074 China Chinese Academy of Engineering Beijing100088 China

data migration strategies (DMSs) improve the overall performance of hybrid memory systems by migrating frequently accessed (hot) data to faster memory. However, designing an efficient DMS is challenging since the key metrics of DMS - hot data selection, migration granularity, and migration frequency - are sensitive to access patterns of workloads. Most existing strategies focus on only one of these metrics and often overlook the crucial impact of access patterns, resulting in suboptimal performance and unnecessary migration traffic. In this article, we propose AdaptHM, a fully access-pattern-aware Adaptive DMS for Hybrid Memory systems. AdaptHM achieves adaptability on all three metrics through its unique multilevel data framework. First, AdaptHM adopts a group-level competition policy to select hot blocks, which responds faster to access patterns than threshold-based policies. Second, AdaptHM enables segment-level dynamic migration granularity by decoupling migration from remapping, which shows better-access pattern resilience than existing schemes with fixed-size global migration granularity. Third, AdaptHM adjusts the migration frequency at set-level by periodically assessing the migration benefit, avoiding unnecessary migrations. Experimental results demonstrate that AdaptHM improves the performance by an average of 12.78% and reduces energy consumption by up to 37.24% compared to the state-of-the-art scheme. © 1982-2012 IEEE.

关键词： Frequency modulation

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Listen With Seeing: Cross-Modal Contrastive Learning for Audio-Visual Event Localization

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IEEE Transactions on Multimedia 2025年 27卷 2650-2665页

作者： Sun, Chao Chen, Min Zhu, Chuanbo Zhang, Sheng Lu, Ping Chen, Jincai Huazhong University of Science and Technology Wuhan National Laboratory for Optoelectronics Key Laboratory of Information Storage System Engineering Research Center of Data Storage Systems and Technology Ministry of Education of China School of Computer Science and Technology Wuhan430074 China South China University of Technology School of Computer Science and Engineering Guangzhou510640 China Pazhou Laboratory Guangzhou510640 China

In real-world physiological and psychological scenarios, there often exists a robust complementary correlation between audio and visual signals. Audio-Visual Event Localization (AVEL) aims to identify segments with Audio-Visual Events (AVEs) that contain both audio and visual tracks in unconstrained videos. Prior studies have predominantly focused on audio-visual cross-modal fusion methods, overlooking the fine-grained exploration of the cross-modal information fusion mechanism. Moreover, due to the inherent heterogeneity of multi-modal data, inevitable new noise is introduced during the audio-visual fusion process. To address these challenges, we propose a novel Cross-modal Contrastive Learning Network (CCLN) for AVEL, comprising a backbone network and a branch network. In the backbone network, drawing inspiration from physiological theories of sensory integration, we elucidate the process of audio-visual information fusion, interaction, and integration from an information-flow perspective. Notably, the Self-constrained Bi-modal Interaction (SBI) module is a bi-modal attention structure integrated with audio-visual fusion information, and through gated processing of the audio-visual correlation matrix, it effectively captures inter-modal correlation. The Foreground Event Enhancement (FEE) module emphasizes the significance of event-level boundaries by elongating the distance between scene events during training through adaptive weights. Furthermore, we introduce weak video-level labels to constrain the cross-modal semantic alignment of audio-visual events and design a weakly supervised cross-modal contrastive learning loss (WCCL Loss) function, which enhances the quality of fusion representation in the dual-branch contrastive learning framework. Extensive experiments conducted on the AVE dataset for both fully supervised and weakly supervised event localization, as well as Cross-Modal Localization (CML) tasks, demonstrate the superior performance of our model compa

关键词： Information fusion

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CMD: A Cache-Assisted GPU Memory Deduplication Architecture

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IEEE Transactions on Computer-Aided Design of Integrated Circuits and systems 2025年

作者： Zhao, Wei Feng, Dan Tong, Wei Wei, Xueliang Wu, Bing Ministry of Education of China School of Computer Science and Technology Huazhong University of Science and Technology Wuhan National Laboratory for Optoelectronics Key Laboratory of Information Storage System Engineering Research Center of data storage systems and Technology China

Massive off-chip accesses in GPUs are the main performance bottleneck. We find that many writes are duplicate, and the duplication can be inter-dup and intra-dup. While inter-dup means different memory blocks are identical, and intra-dup means all the 4B elements in a line are the same. In this work, we propose a cache-assisted GPU memory deduplication architecture named CMD to reduce the off-chip accesses via utilizing the data duplication in GPU applications. CMD includes three key design contributions which aim to reduce the three kinds of accesses: (1) A novel GPU memory deduplication architecture that removes the intra-dup and inter-dup lines. We design several techniques to manage duplicate blocks, reducing massive off-chip writes. (2) We propose a cache-assisted read scheme to reduce the reads to duplicate data. When an L2 cache miss wants to read the duplicate block, if the reference block has been fetched to L2 and it is clean, we can copy it to the L2 missed block without accessing off-chip DRAM. As for the reads to intra-dup data, CMD uses the on-chip metadata cache to get the data. (3) When a cache line is evicted, the clean sectors in the line are invalidated while the dirty sectors are written back. However, most read-only victims are re-referenced from DRAM more than twice. Therefore, we add a full-associate FIFO to accommodate the read-only (it is also clean) victims to reduce the re-reference counts. Experiments show that CMD can decrease the off-chip accesses by 31.01%, reduce the energy by 32.78% and improve performance by 42.53%. Besides, CMD can improve the performance of memory-intensive workloads by 57.56%. © 2025 IEEE.

关键词： Cache memory

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CorcPUM: Efficient Processing Using Cross-Point Memory via Cooperative Row-Column Access Pipelining and Adaptive Timing Optimization in Subarrays 23

CorcPUM: Efficient Processing Using Cross-Point Memory via C...

引用

Proceedings of the 60th Annual ACM/IEEE Design Automation Conference

作者： Chengning Wang Dan Feng Wei Tong Jingning Liu Wuhan National Laboratory for Optoelectronics Key Laboratory of Information Storage System Engineering Research Center of Data Storage Systems and Technology Ministry of Education of China (School of Computer Science and Technology Huazhong University of Science and Technology) Wuhan China

ISBN: (纸本)9798350323481

Emerging cross-point memory can in-situ perform vector-matrix multiplication (VMM) for energy-efficient scientific computation. However, parasitic-capacitance-induced row charging and discharging latency is a major performance bottleneck of subarray VMM. We propose a memory-timing-compliant bulk VMM processing-using-memory design with row access and column access co-optimization from rethinking of read access commands and μ-op timing. We propose row-level-parallelism-adaptive timing termination mechanism to reduce tail latency of tRCD and tRP by exploiting row nonlinear charging and bulk-interleaved row-column-cooperative VMM access mechanism to reduce tRAS and overlap CL without increasing column ADC precision. Evaluations show that our design can achieve 5.03× performance speedup compared with an aggressive baseline.

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A Lightweight Fine-Grained Scheme for Distinguishing the Hotness of Warm data to Reduce Segment Cleaning Overhead

SSRN

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SSRN 2025年

作者： Yang, Lihua Wang, Fang Lin, Weizhao Zhang, Wei Xiao, Yang Tan, Zhipeng Li, Jiaxin Lu, Kai College of Computer Science and Technology National University of Defense Technology Yanwachi Street Changsha410073 China Wuhan National Laboratory for Optoelectronics Key Laboratory of Information Storage System Engineering Research Center of Data Storage Systems and Technology Ministry of Education of China Huazhong University of Science and Technology Luoyu Road Wuhan430074 China

With the widespread adoption of flash memory, the Flash Friendly File system (F2FS) designed to flash memory characteristics has become widely-used in large data centers. However, F2FS encounters from significant cleaning overheads due to its logging scheme writes. We observe that warm data in F2FS account for a substantial proportion, at least 80%. Nevertheless, the mixed storage of warm data with varying hotness exacerbates segment cleaning challenges. To address this issue, we propose a scheme called M2H, which involves a fine-grained management of warm data hotness identified by the K-means clustering algorithm. M2H determines hotness by considering factors such as file block update distance, most recently used distance, and workload characteristics. M2H facilitates {M}ulti-log delayed writing and {M}odified segment cleaning based on {H}otness. To reduce costs associated with distinguishing data hotness at the file block level, we employ Mini Batch K-means and refer to this variant as M2H_MBK. Moreover, for servers equipped with GPUs, the clustering process can be offloaded to the GPU, known as M2H_GPU. We conduct a comprehensive comparison of traditional F2FS, M2H, M2H_MBK, and M2H_GPU on a real platform. Results show that compared to traditional F2FS, M2H_GPU reduces the number of segment cleanings by 54.41% to 97.93%. © 2025, The Authors. All rights reserved.

关键词： Flash memory

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Hierarchical Recording Architecture for Three-Dimensional Magnetic Recording

arXiv

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arXiv 2025年

作者： Jian, Yugen Luo, Ke Chen, Jincai Fong, Xuanyao Wuhan National Laboratory for Optoelectronics Huazhong University of Science and Technology Wuhan430074 China Department of Electrical and Computer Engineering National University of Singapore Singapore117583 Singapore School of Computer of Science and Technology Huazhong University of Science and Technology Wuhan430074 China Key Laboratory of Information Storage System Engineering Research Center of Data Storage Systems and Technology Ministry of Education of China Wuhan430074 China

Three-dimensional magnetic recording (3DMR) is a highly promising approach to achieving ultra-large data storage capacity in hard disk drives. One of the greatest challenges for 3DMR lies in performing sequential and correct writing of bits into the multi-layer recording medium. In this work, we have proposed a hierarchical recording architecture based on layered heat-assisted writing with a multi-head array. The feasibility of the architecture is validated in a dual-layer 3DMR system with FePt-based thin films via micromagnetic simulation. Our results reveal the magnetization reversal mechanism of the grains, ultimately attaining appreciable switching probability and medium signal-to-noise ratio (SNR) for each layer. In particular, an optimal head-to-head distance is identified as the one that maximizes the medium SNR. Optimizing the system’s noise resistance will improve the overall SNR and allow for a smaller optimal head-to-head distance, which can pave the way for scaling 3DMR to more recording layers. Copyright © 2025, The Authors. All rights reserved.

关键词： Hard disk storage

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Cache Coherency Design in Pentium Ⅲ SMP system

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Wuhan University Journal of Natural Sciences 2006年第2期11卷 360-364页

作者： LIU Jinsong ZHANG Jiangling GU Xiwu Key Laboratory of Data Storage System Huazhong University of Science and Technology Wuhan 430074 Hubei China

This paper analyzes cache coherency mechanism from the view of system. It firstly discusses caehe-memory hierarchy of Pentium Ⅲ SMP system, including memory area distribution, cache attributes control and bus transaction. Secondly it analyzes hardware snoopy mechanism of P6 bus and MESI state transitions adopted by Pentium Ⅲ. Based on these, it focuses on how muhiprocessors and the P6 bus cooperate to ensure cache coherency of the whole system, and gives the key of cache coherency design.

关键词： snoop cache coherency MESI protocol P6bus Pentium Ⅲ SMP system

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High TPO/TCO for data storage:policy,algorithm and early practice

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中国高等学校学术文摘·计算机科学 2007年第3期1卷 349-360页

作者： ZENG Lingfang FENG Dan JIANG Hong Key Laboratory of Data Storage System Ministry of EducationSchool of ComputerHuazhong University of Science and TechnologyWuhan 430074China University of Nebraska LincolnUSA

Today,the data storage industry faces a rapidly growing volume of *** more primary disk capacity to manage data growth is a costly and non-sustainable *** investing in new capacity,data managers should rationalize their existing storage infrastructure to maximize the use of existing *** is a growing need for achieving a high ratio of Total Performance of Ownership (TPO) to Total Cost of Ownership (TCO),or TPO/*** storage infrastructure can be made more efficient by assessing data usages,eliminating unnecessary data copies,moving less critical data to less expensive disk devices and repurposing allocated but unused *** existing storage assets can reduce storage costs by delaying or eliminating the need for new primary capacity to manage information *** this paper,we apply the notion of information lifecycle management (ILM) to achieve the above improved efficiencies and *** balancing data value and storage requirements,we aim to reduce the storage system's dependence on expensive high-performance disk devices and lower its cost per online gigabyte,thus resulting in a higher TPO/TCO.

关键词： storage system information lifecycle management data migration energy conservationaccepted June 20 2007

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An improved direct digital frequency synthesis system design

An improved direct digital frequency synthesis system design

引用

International Workshop on Networking, Architecture and storages

作者： Wang, Qingdong Xie, Changsheng Wang, Haiwei Liu, Chun Key Laboratory of Data Storage System School of Computer Science and Technology Huazhong University of Science and Technology China

ISBN: (纸本)0769526519

This paper researches a programmable signal device by an improved direct digital frequency synthesis technology on DSP and FPGA to simulate servo signal for read-write channel of micro hard disk. This device has wide frequency range from 1Hz to 10MHz, high frequency resolution of 0.001Hz, high precision of frequency, phase and amplitude of output wave, good reliability, little distortion. Compared with general devices, this device can generate all kinds of servo signal, and circuit is simply, reliable, and programmable.

关键词： Frequency synthesizers

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An efficient memory data organization strategy for application-characteristic graph processing

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Frontiers of Computer Science 2022年第1期16卷 191-193页

作者： Peng FANG Fang WANG Zhan SHI Dan FENG Qianxu YI Xianghao XU Yongxuan ZHANG Wuhan National Laboratory for Optoelectronics Key Laboratory of Information Storage SystemEngineering Research Center of data storage systems and TechnologyMinistry of Education of ChinaSchool of Computer Science and TechnologyHuazhong University of Science and TechnologyWuhan430074China

1 Introduction Graph processing has received significant attention for its ability to cope with large-scale and complex unstructured data in the ***,most of the graph processing applications exhibit an irregular memor... 详细信息

关键词： application processing pattern

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