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VmPTP: Precise Time Protocol for Inter-VM Communication in embedded Virtualized Systems

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 2025年第3期44卷 897-910页

作者： Zhao, Sirong Xie, Guoqi Ma, Wenhong Ren, Wei Li, Kenli Hunan University Key Laboratory for Embedded and Network Computing of Hunan Province College of Computer Science and Electronic Engineering Hunan Changsha410082 China Huawei Technology Co. Ltd. Central Software Institute Guangdong Shenzhen518129 China

System virtualization techniques are gradually applied to embedded systems with the performance improvement of embedded devices;however, there is a large time offset (i.e., deviation) of hundreds of ms between virtual machines (VMs) due to the drift of the virtualization abstraction layer and the jitter phenomenon. It is urgent to significantly reduce this offset by time synchronization techniques. Unfortunately, the current mainstream time synchronization software (e.g., Chrony and LinuxPTP) cannot be used in the embedded virtualized system connected by the fieldbus, such as controller area network (CAN);meanwhile, drift correction-based time synchronization techniques dedicated to CAN bus cannot be utilized for virtualized systems. In this study, we design a general vmPTP, which is a precise time protocol (PTP) for inter-VM communication in embedded virtualized systems based on Linux kernel-based VM (KVM). This is the first time synchronization work focused on embedded virtualized systems. We implement two vmPTP versions based on VirtIO and inter-VM shared memory (IVSHMEM) according to the four message (i.e., packet) exchanges of PTP. We propose an asymmetry compensation strategy to solve the problem of asymmetric rate of I/O operations in the message exchange process, which optimizes the offset computation. We further produce a convergence stopping approach which can continuously converge the offset until the offset is within the given bound and stop. We conduct experimental evaluations on both X86-64 and ARM64 architectures. For two versions of vmPTP, the experimental results show that: 1) the offsets are always within 1μ s on two architectures;2) the offsets are less than that of LinuxPTP and Chrony;and 3) the vmPTP's CPU and memory utilization on the X86-64 architecture are merely 0.3% and 0.1%, respectively, whereas those on the ARM64 architecture are 3.8% and 0.1%, respectively. We experiment with vmPTP in real-time application and the result demonstrates th

关键词： Linux

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Holistic WCRT Analysis for Global Fixed-Priority Preemptive Multiprocessor Scheduling 23

Holistic WCRT Analysis for Global Fixed-Priority Preemptive ...

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Proceedings of the 60th Annual ACM/IEEE Design Automation Conference

作者： Guoqi Xie Chenglai Xiong Wei Wu Renfa Li Wanli Chang Key Laboratory for Embedded and Network Computing of Hunan Province College of Computer Science and Electronic Engineering Hunan University China.

ISBN: (纸本)9798350323481

Many embedded applications demand both resource efficiency and timing guarantee. However, resource sharing naturally complicates the analysis that extracts the worst-case scenario out of contention. Global Fixed-Priority (GFP) preemptive multiprocessor scheduling is one of the mainstream strategies to resolve contention on computational resources. It allows jobs of the same task to be executed on different processors, hence potentially enabling better parallelism and more efficient resource utilization. Unfortunately, its worst-case response time (WCRT) analysis is challenging. Existing approaches divide a high-priority task into three workloads, namely, carry-in workload, body workload, and carry-out workload, trying to optimize them individually. In this work, we propose a holistic WCRT analysis for GFP preemptive multiprocessor scheduling, where a task is no longer divided. Specifically, (i) we establish the tight interference scenario for the task being analyzed to find the most interfering high-priority jobs in any time interval; (ii) we obtain the starting released instant of each high-priority task's first job to determine the maximum interference from high-priority tasks' first jobs to the task being analyzed; (iii) we build the worst-case tight interference scenario for the task being analyzed by combining the tight interference scenario and the starting released instants; (iv) we prove that the WCRT of the task being analyzed can be decided by the worst-case tight interference scenario. Evaluation on schedulability shows that our proposed analysis achieves 4.2%-8.6% higher acceptance ratio in randomly generated data sets than the state-of-the-art workload division approaches.

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Fault Tolerance in Time-Sensitive networking with Mixed-Critical Traffic 23

Fault Tolerance in Time-Sensitive Networking with Mixed-Crit...

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Proceedings of the 60th Annual ACM/IEEE Design Automation Conference

作者： Wenhong Ma Xiangzhen Xiao Guoqi Xie Nan Guan Yu Jiang Wanli Chang Key Laboratory for Embedded and Network Computing of Hunan Province College of Computer Science and Electronic Engineering Hunan University City University of Hong Kong Tsinghua University China

ISBN: (纸本)9798350323481

As an Ethernet-based communication protocol with timing determinism, TSN (time-sensitive networking) has become a well-recognized promising in-vehicle network solution for increasingly automated automobiles. To satisfy the reliability requirement of safety-critical applications, existing works towards fault-tolerant TSN trade too much bandwidth for redundancy, limiting their scope of applicability. Targeting mixed-critical traffic, which is widely found in practice, we define a shared fault-tolerant segment that is compatible with the TSN standard. It serves the critical flows when faults occur, to improve their reliability and serves the non-critical flows when otherwise, to improve their quality of service (QoS). On top of this, we propose a space-time redundancy scheduling algorithm, aiming to make the most efficient use of bandwidth, i.e., to fulfill both the reliability as well as hard real-time requirements, and maximize the QoS with the least bandwidth. In essence, we formulate a bi-objective design space exploration problem with hundreds of thousands of decision variables and solve it with customized heuristics. Experimental results show that compared to the state-of-the-art methods, our reported work increases the number of critical flows that can be accommodated on a resource-constrained network by 3 to 4 times, and achieve the highest QoS with an average reduction of 60.3% in bandwidth. As the first work along sharing of bandwidth between mixed-critical traffic in fault-tolerant TSN, this idea can be further pursued towards higher efficiency and may be applied in general autonomous systems.

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LIDS: A Lightweight Intrusion Detection System for Controller Area Network

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IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 2025年

作者： Yu, Zhangwei Liu, Yan Li, Renfa Chang, Wanli Hunan University Key Laboratory for Embedded and Network Computing of Hunan Province College of Computer Science and Electronic Engineering Changsha410082 China Research Institute of Hunan University in Chongqing Research and Innovation Center for Convergence of Automobile and Cyberspace Chongqing401120 China

Controller Area Network (CAN) is widely adopted in automobiles and susceptible to cyber attacks with the development of intelligent connected vehicles. While neural networks have demonstrated high accuracy in detection of such attacks, they consume a large amount of resources, hence unsuitable to be directly used for the automotive domain. In this work, we propose LIDS, a lightweight intrusion detection system for CAN. It first filters out DoS (Denial of Service) and Fuzzy attacks through list screening, following which, a Multi-Layer Perceptron (MLP) model is deployed to predict Impersonation attacks. Leveraging this combination, the detection accuracy is kept and the resources required are significantly reduced. LIDS is able to run on small hardware with 520KB memory and CPU of 240MHz. Its power consumption is one order of magnitude lower than the existing works, thus an excellent candidate for protection of CAN in automobiles. © 1982-2012 IEEE.

关键词： Automobiles

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Zram Instance Pool Framework for Adaptive Memory Compression in Resource-Sensitive embedded Operating Systems

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IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 2025年

作者： Deng, Yin Xie, Guoqi Xiong, Chenglai Zhao, Sirong Ren, Wei Li, Kenli Hunan University Key Laboratory for Embedded and Network Computing of Hunan Province College of Computer Science and Electronic Engineering Hunan Changsha410082 China Huawei Technology Co. Ltd. Central Software Institute Guangdong Shenzhen518129 China

Memory compression can reduce the size of the inactive data in the random access memory (RAM), thereby freeing up unused space and allowing more programs to run;however, current mainstream memory compression frameworks (e.g., Zram and Zswap) and algorithms (e.g., Zstd and Lz4) do not effectively solve the problem of increased CPU utilization, causing they cannot be directly applied to the resource-sensitive embedded operating system that is sensitive to both CPU utilization and memory usage. In this study, we develop a Zram instance pool framework called ZramPool for adaptive memory compression. The framework consists of the swap space with multiple Zram instances and the adaptive Zram compression module. Through introducing linear regression analysis, the number of Zram instances can be adaptively adjusted based on the size of the compressed data, allowing Zram instances to work in parallel to match the workload. In ZramPool, we achieve two different requirements of reducing CPU utilization while keeping compression speed and increasing compression speed while keeping CPU utilization. ZramPool is deployed in the embedded Linux OS with a 8GB memory size running on the ARMv8 architecture. For the first requirement, ZramPool can reduce CPU utilization by an average of 11.42% while the compression speed only decreases by an average of 2.4%. For the second requirement, ZramPool can increase compression speed by an average of 11.71% while the CPU utilization only increases by an average of 1.9%. © 1982-2012 IEEE.

关键词： Random access storage

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Schedulability analysis for messages of FlexRay/CAN networks interconnected by a gateway

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Journal of Computational Information Systems 2015年第15期11卷 5531-5543页

作者： Li, Rui Du, Changjie Key Laboratory for Embedded and Network Computing of Hunan Province Hunan University Changsha China

Schedulability analysis and scheduling strategies are very important for the in-vehicle network system consisting of CAN bus and FlexRay bus interconnected via a gateway. The aim of this study is to investigate the time behavior of such network and generate scheduling solutions to guarantee real-time constrains. First, a schedulability analysis approach based on end-to-end response time analysis is presented. In order to calculate the worse response time of the messages effectively, a new simple MAX-MIN algorithm are proposed to guarantee real-time constrains and make the arrival of messages more predictable. Experimental results show that MAX-MIN algorithm can effectively calculate end-to-end response time in the large-scale set of messages. Copyright © 2015 Binary Information Press.

关键词： Real time systems

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FPGA based unified architecture for public key and private key cryptosystems

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Frontiers of Computer Science 2013年第3期7卷 307-316页

作者： Yi WANG Renfa LI Embedded Systems and Networking Laboratory Hunan Province Key Laboratory of Network and Information Security Hunan University Changsha 410082 China Department of Electrical and Computer Engineering National University of Singapore Singapore 117576 Singapore

Recently, security in embedded system arises attentions because of modern electronic devices need cau- tiously either exchange or communicate with the sensitive data. Although security is classical research topic in world- wide communication, the researchers still face the problems of how to deal with these resource constraint devices and en- hance the features of assurance and certification. Therefore, some computations of cryptographic algorithms are built on hardware platforms, such as field program gate arrays （FPGAs）. The commonly used cryptographic algorithms for digital signature algorithm （DSA） are rivest-shamir-adleman （RSA） and elliptic curve cryptosystems （ECC） which based on the presumed difficulty of factoring large integers and the algebraic structure of elliptic curves over finite fields. Usu- ally, RSA is computed over GF（p）, and ECC is computed over GF（p） or GF（2P）. Moreover, embedded applications need advance encryption standard （AES） algorithms to pro- cess encryption and decryption procedures. In order to reuse the hardware resources and meet the trade-off between area and performance, we proposed a new triple functional arith- metic unit for computing high radix RSA and ECC operations over GF（p） and GF（2P）, which also can be extended to support AES operations. A new high radix signed digital （SD） adder has been proposed to eliminate the carry propagations over GF（p）. The proposed unified design took up 28.7% less hardware resources than implementing RSA, ECC, and AES individually, and the experimental results show that our proposed architecture can achieve 141.8 MHz using approxi- mately 5.5k CLBs on Virtex-5 FPGA.

关键词： AES RSA ECC signed-digit number FPGA cryptographic algorithms high radix arithmetic unit

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Security-aware Signal Packing Algorithm for CAN-based Automotive Cyber-physical Systems

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IEEE/CAA Journal of Automatica Sinica 2015年第4期2卷 422-430页

作者： Yong Xie Liangjiao Liu Renfa Li Jianqiang Hu Yong Han Xin Peng Key Laboratory for Application Technology of Internet of Things of Fujian Educational Bureau Xiamen University of Technology Key Laboratory of Embedded and Networking Computing of Hunan Province Hunan University Key Laboratory on Complex Systems Optimization & Controlling of Hunan High Education Institutions Hunan Institute of Science and Technology

Network and software integration pose severe challenges in cyber-security for controller area network (CAN)-based automotive cyber-physical system (ACPS), therefore we employ message authentication code (MAC) to defend CAN against masquerade attack, but the consequent bandwidth overhead makes it a necessity to find the tradeoff among security, real-time and bandwidth utilization for signal packing problem (SPP) of CAN. A mixed-security signal model is firstly proposed to formally describe the properties and requirements on security and real-time for signals, and then a mixed-integer linear programming (MILP) formulation of SPP security-aware signal packing (SASP) is implemented to solve the tradeoff problem, where the bandwidth utilization is improved and the requirements in both security and real-time are met. Experiments based on both society of automotive engineers (SAE) standard signal set and simulated signal set showed the effectiveness of SASP by comparing with the state-of-the-art algorithm. © 2014 Chinese Association of Automation.

关键词： Algorithms Bandwidth Communication channels (information theory) Control system synthesis embedded systems Integer programming

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A long lifetime,low error rate RRAM design with self-repair module

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Journal of Semiconductors 2016年第11期37卷 94-98页

作者：尤志强胡飞黄黎明刘鹏邝继顺李实英 Key Laboratory for Embedded and Network Computing of Hunan Province College of Computer Science and Electronic EngineeringHunan University

Resistive random access memory （RRAM） is one of the promising candidates for future universal memory. However, it suffers from serious error rate and endurance problems. Therefore, exploring a technical solution is greatly demanded to enhance endurance and reduce error rate. In this paper, we propose a reliable RRAM architecture that includes two reliability modules： error correction code （ECC） and self-repair modules. The ECC module is used to detect errors and decrease error rate. The self-repair module, which is proposed for the first time for RRAM, can get the information of error bits and repair wear-out cells by a repair voltage. Simulation results show that the proposed architecture can achieve lowest error rate and longest lifetime compared to previous reliable designs.

关键词： self-repair ECC RRAM memristor

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Optimized roles set algorithm in distributed parallel computing system

Optimized roles set algorithm in distributed parallel comput...

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26th International Conference on Parallel Computational Fluid Dynamics, ParCFD 2013

作者： Wu, Wenkang Tang, Zhuo Key Laboratory for Embedded and Network Computing of Hunan Province Changsha Hunan 410082 China

ISBN: (纸本)9783642539619

With the rapid development of computer technology, distributed computing and parallel computing have made great progress. Distributed parallel computing system is a combination of distributed computing and parallel computing, which can provide fast solutions to information sharing and subtasks in high-speed network environment. In this paper, we propose a new access control model-Distributed Parallel computing Role Based Access Control (DPCRBAC) Model on the basis of the traditional RBAC model. We propose a new roles set assignment algorithm-Optimized Roles Set (ORS) algorithm. According to the results of simulation, the proposed algorithm ORS can effectively improve the efficiency roles and is effective in reducing role conflicts in the process of role assignment, and ensure the safety and reliability of the distributed parallel computing system. © Springer-Verlag Berlin Heidelberg 2014.

关键词： Distributed computer systems

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