This paper introduces a self-adaptive digital technique to calibrate multi-channel SAR *** than achieving higher resolution by adjusting the analog component values,this new digital method infers the capacitor weights...
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ISBN:
(纸本)9781509066261;9781509066254
This paper introduces a self-adaptive digital technique to calibrate multi-channel SAR *** than achieving higher resolution by adjusting the analog component values,this new digital method infers the capacitor weights of a SAR ADC with the help of a channel-shared high resolution sigma-delta ADC,which results in remarkable improvements in the capacitive SAR ADCs' *** increases from 11.06 bits to 12.67 *** digital calibration logic is based on LMS(least mean squares) and gradient descent.
Emerging resistive switching random access memory(RRAM), considered as the most promising candidate of flash memory, is favorable for in flexible electronic system. However, in high density flexible crossbar RRAM ar...
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Emerging resistive switching random access memory(RRAM), considered as the most promising candidate of flash memory, is favorable for in flexible electronic system. However, in high density flexible crossbar RRAM array, crosstalk issue that currents from the neighboring unselected cell lead to failure of write and read operations, still keeps a main bottleneck. Therefore, flexible selector compatible with the flexibility of the RRAM array should be focused on to configure one selector-one resistor(1 S1 R) system,which is immune to crosstalk issue. In this paper, flexible cation-based threshold switching(TS) selectors(Pt/Ag/Hf O2/Pt/Ti/parylene) are fabricated and the compressive performance is studied *** device shows excellent bidirectional volatile TS characteristics, including high selectivity ratio(10~9), low operating voltages(|VTH|<1 V), ultra-low leakage current(~10-13A) and good flexibility. The successful demonstration of the wire connected 1 S1 R unit comprising this flexible selector and one bipolar resistor cell indicates the great potential of this cation-based selector to restrain the crosstalk issue in a large flexible RRAM array.
In this paper, an analytical model is developed for parasitic gate capacitance of the gate-all-around (GAA) silicon nanowire MOSFETs (SNWT) with asymmetrical top and bottom gates. The modeling results show that the ga...
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In this paper, an analytical model is developed for parasitic gate capacitance of the gate-all-around (GAA) silicon nanowire MOSFETs (SNWT) with asymmetrical top and bottom gates. The modeling results show that the gate-to-source/drain spacer significantly impacts on the parasitic capacitance especially in the case of top-to-bottom gate misalignment. It is found that the optimized top-to-bottom gate misalignment may achieve smaller C p /C total so as to improve the AC performance of GAA SNWT. The developed capacitance model is more suitable for the actual process for further device design optimization.
We develop a metric-torsion theory for chiral structures by using a generalized framework of transformation optics. We show that the chirality is uniquely determined by a metric with the local rotational degree of fre...
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We develop a metric-torsion theory for chiral structures by using a generalized framework of transformation optics. We show that the chirality is uniquely determined by a metric with the local rotational degree of freedom. In analogy to the dislocation continuum, the chirality can be alternatively interpreted as the torsion tensor of a Riemann-Cartan space, which is mimicked by the anholonomy of the orthonormal basis. As a demonstration, we reveal the equivalence of typical three-dimensional chiral metamaterials in the continuum limit. Our theory provides an analytical recipe to design optical chirality.
Two-dimensional van der Waals heterostructures (2D vdWHs) have recently gained widespread attention because of their abundant and exotic properties, which open up many new possibilities for next-generation nanoelectro...
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Two-dimensional van der Waals heterostructures (2D vdWHs) have recently gained widespread attention because of their abundant and exotic properties, which open up many new possibilities for next-generation nanoelectronics. However, practical applications remain challenging due to the lack of high-throughput techniques for fabricating high-quality vdWHs. Here, we demonstrate a general electrochemical strategy to prepare solution-processable high-quality vdWHs, in which electrostatic forces drive the stacking of electrochemically exfoliated individual assemblies with intact structures and clean interfaces into vdWHs with strong interlayer interactions. Thanks to the excellent combination of strong light absorption, interfacial charge transfer, and decent charge transport properties in individual layers, thin-film photodetectors based on graphene/In 2 Se 3 vdWHs exhibit great promise for near-infrared (NIR) photodetection, owing to a high responsivity (267 mA W −1 ), fast rise (72 ms) and decay (426 ms) times under NIR illumination. This approach enables various hybrid systems, including graphene/In 2 Se 3 , graphene/MoS 2 and graphene/MoSe 2 vdWHs, providing a broad avenue for exploring emerging electronic, photonic, and exotic quantum phenomena.
This paper presents a novel design of a ternary SRAM sense amplifier using carbon nanotube field-effect transistors (CNFETs). Chirality of CNFET is used to control the threshold voltage to realize the ternary logic. S...
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The comprehensive understanding of the structure-dependent electrostatic discharge behaviors in a conventional diode-triggered silicon controlled rectifier (DTSCR) is presented in this paper. Combined with the devic...
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The comprehensive understanding of the structure-dependent electrostatic discharge behaviors in a conventional diode-triggered silicon controlled rectifier (DTSCR) is presented in this paper. Combined with the device simulation, a mathematical model is built to get a more in-depth insight into this phenomenon. The theoretical studies are verified by the transmission-line-pulsing (TLP) test results of the modified DTSCR structure, which is realized in a 65-nm complementary metal-oxide-semiconductor (CMOS) process. The detailed analysis of the physical mechanism is used to provide predictions as the DTSCR-based protection scheme is required. In addition, a method is also presented to achieve the tradeoff between the leakage and trigger voltage in DTSCR.
Nanoionics based devices and networks are intriguing candidates for the construction of new computing systems that could perform intelligent and energy-efficient *** this talk,I will discuss recent progresses in the d...
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Nanoionics based devices and networks are intriguing candidates for the construction of new computing systems that could perform intelligent and energy-efficient *** this talk,I will discuss recent progresses in the development of neuromorphic devices and networks,as well as a few critical challenges existing in the mechanism,device and network levels that must be overcome[1-2].
This paper presents a novel design of a ternary SRAM sense amplifier using carbon nanotube field-effect transistors(CNFETs).Chirality of CNFET is used to control the threshold voltage to realize the ternary *** result...
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This paper presents a novel design of a ternary SRAM sense amplifier using carbon nanotube field-effect transistors(CNFETs).Chirality of CNFET is used to control the threshold voltage to realize the ternary *** results using HSPICE shows that the proposed SRAM sense amplifier perform correctly at 0.9 V supply voltage in the ternary SRAM read *** it can achieve 87.5% and 88.5% enhancement in speed,84.2% and 85.6% in PDP,compared with a ternary DRAM sense amplifier and the ternary SRAM without sense amplifier.
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