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Electric field modified Arrhenius description of charge transport in amorphous oxide semiconductor thin film transistors

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Physical Review B 2018年第24期98卷 245308-245308页

作者： Wei Wang Guangwei Xu M. Delwar H. Chowdhury Hong Wang Jae Kwang Um Zhuoyu Ji Nan Gao Zhiwei Zong Chong Bi Congyan Lu Nianduan Lu Writam Banerjee Jiafeng Feng Ling Li Andrey Kadashchuk Jin Jang Ming Liu Key Laboratory of Microelectronic Devices & Integrated Technology Institute of Microelectronics of Chinese Academy of Sciences Beijing 100029 China Jiangsu National Synergetic Innovation Center for Advanced Materials (SICAM) Nanjing 210009 China Department of Information Display Advanced Display Research Center Kyung Hee University Korea Key Laboratory of Wide Band Gap Semiconductor Materials and Devices Xidian University China State Key Laboratory of Magnetism Institute of Physics of Chinese Academy of Sciences Beijing 100029 China Institute of Physics National Academy of Sciences of Ukraine Prospect Nauky 46 03028 Kyiv Ukraine IMEC Kapeldreef 75 3001 Leuven Belgium

While it is known that the charge-carrier mobility in amorphous metal oxide semiconductor thin film transistors (TFT) deviates from Arrhenius temperature dependence, we found that the Hall mobility measured in amorphous In-Ga-Zn-O (a-IGZO) follows an Arrhenius relation surprisingly well. We explain these observations by the effect of strong vertical electric field created by the gate voltage, which facilitates direct tunneling of trapped carriers into the conductive band and leads to virtually temperature independent mobility. We present a generalized Arrhenius model based on the effective temperature concept. We show that our model allows quantitative description of the temperature dependence of the mobility in a-IGZO TFTs over a broad temperature range.

关键词： Carrier dynamics Field-effect transistors Transport phenomena Amorphous semiconductors Oxides

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A Prolonged Discharge Time ESD Power-rail Clamp Circuit Structure with Strong Ability to Prevent False Triggering 13

A Prolonged Discharge Time ESD Power-rail Clamp Circuit Stru...

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2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT)

作者： Jian Cao Xiangxiang Xue Yuan Wang Guangyi Lu Xing Zhang School of Software and Microelectronics Peking University Key Laboratory of Microelectronic Devices and Circuits (MoE) Peking University

ISBN: (纸本)9781467397209

A new reliable Electrostatic Discharge(ESD) power-rail clamp circuit has been proposed in this paper. The new circuit structure has achieved good results in reducing leakage current, anti-false triggering, increasing discharge transistor's turn on time. During the ESD event, the proposed circuit has a discharge time of 755.22 ns, which is about 6.74 times that of conventional R-C power-rail clamp circuit. Besides, the leakage current of whole circuit eventually stabilizes at a lower level of 46.50 nA.

关键词： ESD power-rail clamp circuit leakage current anti-false triggering discharge time

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Multi-VT design of vertical channel nanowire FET for sub-10nm technology node 7

Multi-VT design of vertical channel nanowire FET for sub-10n...

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7th IEEE International Nanoelectronics Conference, INEC 2016

作者： Chen, Gong Li, Ming Fan, Jiewen Yang, Yuancheng Zhang, Hao Huang, Ru Key Laboratory of Microelectronic Devices Circuits Institute of Microelectronics Peking University Beijing China

ISBN: (纸本)9781467389693

In this work, a feasible multi-VT modulation strategy in vertical nanowire FETs (VNWFETs) combining asymmetric halo doping with nanowire diameter is proposed and verified by TCAD simulation. The results show that halo configuration close to source side exhibits larger VT-tuning range and better SCE controlling. Moreover, adjustment of halo doping concentration and nanowire diameters can be adopted to provide at least three VT choices for 7nm technology node. It is demonstrated that VNWFETs is quite promising for SOC application. © 2016 IEEE.

关键词： Nanowires

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A 1.67-ppm/°C 64-ppm/V Curvature-Compensated Bandgap Reference Based on a Transcendental Equation 13

A 1.67-ppm/°C 64-ppm/V Curvature-Compensated Bandgap Refere...

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2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT)

作者： Ruocheng Wang Wengao Lu Yajun Zhu Yuze Niu Yacong Zhang Zhongjian Chen Key Laboratory of Microelectronic Devices and Circuits Department of Microelectronics Peking University Peking University Information Technology Institute (Tianjin Binhai)

ISBN: (纸本)9781467397209

This paper proposes a current-mode bandgap referenc which employs a novel "coarse" voltage replication to offset the 2nd-order curvature due to base-emitter voltag of the BJT. The coarse replication is based on a proces insensitive transcendental equation which regulates th independent CTAT current. The bandgap reference which will be implemented in 0.35μm CMOS process has a low operating current of 0.85μA. Under a 2.6V to 4V supply its line sensitivity is 64ppm/V even in the wors condition, and its TC is only 1.67ppm/°C in th temperature range of-55°C to 115°C.

关键词： current-mode bandgap reference curvature compensation low temperature coefficient

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A 14-bit 8-column shared SAR ADC for 640×512 IRFPA 13

A 14-bit 8-column shared SAR ADC for 640×512 IRFPA

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2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT)

作者： Zhaokai Liu Wengao Lu Yuze Niu Dahe Liu Yacong Zhang Zhongjian Chen Key Laboratory of Microelectronic Devices and Circuits Department of Microelectronics Peking University Peking University information technology institute (Tianjin Binhai)

ISBN: (纸本)9781467397209

This paper presents a new structure of column-level successive approximation register(SAR) analogue-to-digital converter(ADC) for Infrared Focal Plane Array. In this design, each column has a capacitance array and each comparator and SAR logic block are shared by 8 columns. By using this shared structure, we achieved smaller silicon area, lower power dissipation and lower noise. And shared structure leaves enough space for signal and control wires of ADC blocks, therefore relieves the mutual disturbance among wires. Also, correlated switches are used to cancel the offset generated by charge injection. The conversion accuracy of the proposed ADC is 14 bits and is used for a 640×512 array with a frame rate of 50 Hz.

关键词： ADC SAR A 14-bit 8-column shared SAR ADC for 640 IRFPA

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Leakage Current Analysis Using High Resistivity Silicon Gated Diodes For PIN Detectors Application 13

Leakage Current Analysis Using High Resistivity Silicon Gate...

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2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT)

作者： Hao Wang Min Yu Baohua Shi Yahuan Huang Xinyang Zhao Yufeng Jin National Key Laboratory of Nano/Micro Fabrication Technology Key Laboratory of Microelectronic Devices and Circuits(MOE) Institute of Microelectronics Peking University

ISBN: (纸本)9781467397209

Ultra-thick and ultra-thin Silicon PIN detectors are specially applied in high particles detections. The corresponding leakage current is investigated. The ultra-thick and ultra-thin gated diodes structures based on high resistivity silicon substrates are fabricated and tested to analyses the reverse leakage current for silicon PIN detectors application. It is concluded that the contribution of the generation current in the main junction depletion region is more significant in the ultra-thick structures, while the contribution of the generation current generated at the silicon-oxide interface is more evident in the ultra-thin structures.

关键词： Leakage Current Analysis Using High Resistivity Silicon Gated Diodes For PIN Detectors Application PIN

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Toward High Carrier Mobility and Low Contact Resistance:Laser Cleaning of PMMA Residues on Graphene Surfaces

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Nano-Micro Letters 2016年第4期8卷 336-346页

作者： Yuehui Jia Xin Gong Pei Peng Zidong Wang Zhongzheng Tian Liming Ren Yunyi Fu Han Zhang Materials Physics Laboratory State Key Laboratory for Mesoscopic PhysicsSchool of PhysicsPeking University Key Laboratory of Microelectronic Devices and Circuits(MOE) Institute of MicroelectronicsPeking University School of Electronic and Computer Engineering Peking University Shenzhen Graduate School

Poly(methyl methacrylate)(PMMA) is widely used for graphene transfer and device ***,it inevitably leaves a thin layer of polymer residues after acetone rinsing and leads to dramatic degradation of device *** to eliminate contamination and restore clean surfaces of graphene is still highly *** this paper,we present a reliable and position-controllable method to remove the polymer residues on graphene films by laser *** proper laser conditions,PMMA residues can be substantially reduced without introducing defects to the underlying ***,by applying this laser cleaning technique to the channel and contacts of graphene fieldeffect transistors(GFETs),higher carrier mobility as well as lower contact resistance can be *** work opens a way for probing intrinsic properties of contaminant-free graphene and fabricating high-performance GFETs with both clean channel and intimate graphene/metal contact.

关键词： Graphene PMMA residues Laser exposure Carrier mobility Contact resistance

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Data Storage: Self‐Assembled Networked PbS Distribution Quantum Dots for Resistive Switching and Artificial Synapse Performance Boost of Memristors (Adv. Mater. 7/2019)

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Advanced Materials 2019年第7期31卷

作者： Xiaobing Yan Yifei Pei Huawei Chen Jianhui Zhao Zhenyu Zhou Hong Wang Lei Zhang Jingjuan Wang Xiaoyan Li Cuiya Qin Gong Wang Zuoao Xiao Qianlong Zhao Kaiyang Wang Hui Li Deliang Ren Qi Liu Hao Zhou Jingsheng Chen Peng Zhou National‐Local Joint Engineering Laboratory of New Energy Photovoltaic Devices Key Laboratory of Digital Medical Engineering of Hebei Province College of Electron and Information Engineering Hebei University Baoding 071002 P. R. China Department of Materials Science and Engineering National University of Singapore Singapore 117576 Singapore State Key Laboratory of ASIC and System School of Microelectronics Fudan University Shanghai 200433 China Key Laboratory of Microelectronic Devices and Integrated Technology Institute of Microelectronics Chinese Academy of Sciences Beijing 100029 China Giantec Semiconductor Inc. Shanghai 201203 China

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A Capacitor Self-Calibration Technique for High Resolution ADCs 13

A Capacitor Self-Calibration Technique for High Resolution A...

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2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT)

作者： Yitong Cao Wengao Lu Kezhi Li Zhaokai Liu Zhongjian Chen Yacong Zhang Key Laboratory of Microelectronic Devices and Circuits Institute of Microelectronics Peking University Peking University Information Technology Institute (Tianjin Binhai)

ISBN: (纸本)9781467397209

In this paper, a novel capacitor self-calibration technique is presented, which can be used in high resolution ADCs, such as SAR ADC and pipeline ADC. The capacitors achieve self-calibration through the adjusting capacitors array and successive approximation(SAR) logic. A 14-bit SAR ADC using capacitor selfcalibration technique we proposed has been designed. The simulation result shows that the SNDR/SFDR has been improved from 63.80 d B/67.89 d B to 78.55 d B/92.36 dB, respectively, using the proposed capacitor self-calibration technique.

关键词： ADC A Capacitor Self-Calibration Technique for High Resolution ADCs SAR

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A Digital Multiplexing and Real-time Refresh Dimming Control Circuit Used in LED Driver for Multiple LED strings 13

A Digital Multiplexing and Real-time Refresh Dimming Control...

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2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT)

作者： Kezhi Li Wengao Lu Bo Wang Xin'an Wang Yuze Niu Guangyi Chen Yacong Zhang Zhongjian Chen Peking University Shenzhen Graduate School Key Laboratory of Microelectronic Devices and Circuits Institute of Microelectronics Peking University Peking University Information Technology Institute (Tianjin Binhai)

ISBN: (纸本)9781467397209

This paper presents a digital dimming control circuit used in a light-emitting diode（LED） driver, allowing it to dim multiple LED strings with only two input ports which receive serial data accompanied with synchronous clock. A multiplexing technique is used to simplify the control circuit, using one DAC to transfer all the dimming messages for each string, and a real-time refresh technique is used to make the transferred dimming voltage keep a high accuracy all the time. The circuit is friendly compatible with the linear current regulator and pulsewidth modulation（PWM） dimming methods. To get a precise dimming control, we build a 10-bit segment R-2R DAC. The simulation results show the dimming voltages for each LED string keep the errors less than 0.5LSB compared with the designed voltages.

关键词： Estimation Field programmable gate arrays OFDM Modulation Filtration Clocks Signal processing algorithms

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