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3rd International Symposium on Semiconductor and Electronic Technology, ISSET 2024

作者： Guan, Li Li, Qi Liang, Lanyi Wang, Lei Zhang, Xin Li, Haiou Guilin University of Electronic Technology Guangxi Key Laboratory of Precision Navigation Technology and Application Guilin541004 China Key Laboratory of Microelectronic Devices and Integrated Circuits Education Department of Guangxi Zhuang Autonomous Region Guilin541004 China

ISBN: (纸本)9798350390285

This paper proposes a novel pseudo-p-channel AlGaN/GaN heterostructure field-effect transistor (PP-HFET). As semiconductor technology advances, GaN devices are preferred for high-power and high-frequency applications due to their high electron mobility, breakdown field, and wide bandgap. Traditional AlGaN/GaN HFETs perform well because of their high electron density and mobility in the 2DEG channel. However, conventional n-type AlGaN/GaN HFETs are limited in applications requiring p-channel devices. The PP-HFET consists of a top reference electrode and a back-gate control electrode. During operation, the top reference electrode of the PP-HET is biased negatively, rendering the device to be initially in the off state. When a negative voltage is applied to the back gate, the two-dimensional electron gas (2DEG) in the channel is regenerated owing to the compensation effect of the electric field. The more negative the back-gate voltage, the higher the ON current of the device, exhibiting the same characteristics as those of a p-channel device. The effects of the device parameters on the output and transfer characteristics are comprehensively examined, and an analytical model is presented. The simulation results illustrate that the threshold voltage of the proposed device based on the back-gate control is approximately -3.5 V, and the current density is as high as 0.1 A/mm, which is much higher than that of the conventional E-mode p-channel GaN HFET based on two-dimensional hole gas. © 2024 IEEE.

关键词： Gallium nitride

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Simulating the obstacle avoidance behavior day and night based on the visible-infrared MoS_(2)/Ge heterojunction field-effect phototransistor

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Nano Research 2023年第8期16卷 11296-11302页

作者： Zhao Han Bo Wang Jie You Qiancui Zhang Yichi Zhang Tian Miao Ningning Zhang Dongdong Lin Zuimin Jiang Renxu Jia Jincheng Zhang Hui Guo Huiyong Hu Liming Wang Key Laboratory of Analog Integrated Circuits and Systems Ministry of EducationSchool of MicroelectronicsXidian UniversityXi’an 710071China Qian Xuesen Collaborative Research Center of Astrochemistry and Space Life Sciences Department of Microelectronic Science and EngineeringNingbo UniversityNingbo 315211China Department of Physics Fudan UniversityShanghai 200433China

The contradiction between the high number of visually handicapped people and the scarcity of guide dogs has stimulated the demand for electronic guide dogs(EGDs).Here,we demonstrate an EGD by leveraging piezoresistors on a MoS_(2)/Ge heterostructure for simultaneous pressure-sensing and optical-sensing *** device has excellent gating capability and exhibits large positive and negative photoresponses under visible(532 nm,182 A/W)and infrared(1550 nm,37 A/W)*** characteristics allow the device to efficiently classify different obstacles at all times of day using pressure and light *** device reaches nearly 100%accuracy after 48 training sessions when used to classify frequent *** device adopts passive and active detection modes during the day and night,respectively,which improves the battery life of the *** work provides a significant reference for the future design of EGDs,which may help a greater number of visually impaired people by reducing the cost of such devices.

关键词： electronic guide dogs dual-band photodetection pressure and light synergy work round the clock

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Experimental Demonstration of A CT-FeFET Array with Intrinsic Long-Short-Term Plasticity for Low-Cost Trajectory Prediction

Experimental Demonstration of A CT-FeFET Array with Intrinsi...

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2024 IEEE International Electron devices Meeting, IEDM 2024

作者： Li, Chao Yu, Jie Zhang, Xumeng Zhang, Zhaohao Zhu, Fangduo Ouyang, Siyuan Chen, Pei Cheng, Lingli Xu, Gaobo Zhang, Qingzhu Yin, Huaxiang Liu, Qi Liu, Ming State Key Laboratory of Integrated Chips and Systems Frontier Institute of Chip and System Fudan University Shanghai200438 China Key Laboratory of Microelectronic Devices and Integrated Technology Institute of Microelectronics Chinese Academy of Sciences Beijing100029 China Key Laboratory of Fabrication Technologies for Integrated Circuits Chinese Academy of Sciences Beijing100029 China

ISBN: (纸本)9798350365429

Trajectory prediction is a vital function in the auto-driving field, typically achieved with a long short-term memory network. Static IMC technology accelerates the computing of long-term parameters, while the execution of short-term parameters faces great buffer overhead. Inspired by the fused long-short-term synaptic plasticity in biology, here, we proposed a dynamic IMC strategy based on a charge-trapping FeFET array with intrinsic long-short-term plasticity. The long-term weights are stored in the ferroelectric domain, while the short-term weights are in-situ dynamically operated in a charge-trapping domain, eliminating the external caching process. We further demonstrated a dynamic IMC neuromorphic system built on this array for performing trajectory prediction of moving vehicles, achieving more than 1000× and 4× improvements than GPU in power consumption and memory overhead. © 2024 IEEE.

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Vertical SnS2/Si heterostructure for tunnel diodes

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Science China(Information Sciences) 2020年第2期63卷 189-195页

作者： Rundong JIA Qianqian HUANG Ru HUANG Key Laboratory of Microelectronic Devices and Circuits (MOE) Institute of Microelectronics Peking University

Tunneling FET（TFET） is considered as one of the most promising low-power electronic devices,however, suffers from the low drive current. Heterostructure TFET with low effective tunnel barrier height based on traditional 3D materials can obtain large tunnel current but deteriorated off-state current induced by the lattice mismatch. van der Waals heterostructure TFET based on 2D materials can obtain danglingbond-free interface for suppressed off-state current but face the challenge of controllable and stable doping technology. As the critical building block of the TFET, tunnel diode based on the 2D/3D heterostructure is proposed in this study and experimentally demonstrated. Combination of the pristine interface of 2D materials and matured doping technology in the traditional 3D bulk materials, tunnel diodes based on the 2D/3D heterostructures are expected to realize low leakage current and high on current simultaneously,showing great potential in low-power electronics. The N+SnS2/P+Si heterostructure with effective tunnel barrier of 0.17 eV theoretically is considered for the first time and selected as the optimal material platform for tunnel diodes. The N+SnS2/P+Si tunnel diode demonstrated experimentally shows the high current density of 1 μA/μm2, which is the highest one among the reported tunnel diodes based on the 2D/group IV materials. The tunneling current is also confirmed by low-temperature measurements. This study shows the great potential of the 2D/3D heterostructure for low-power tunneling devices.

关键词： 2D/3D heterostructure SnS2/Si tunnel barrier tunnel diode energy-efficient

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A 20-Gb/s Low Power Inductorless TIA Design in 0.18μm CMOS 6

A 20-Gb/s Low Power Inductorless TIA Design in 0.18μm CMOS

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6th International Conference on Electronic Engineering and Informatics, EEI 2024

作者： Zeng, Zhiwei Xu, Weilin Mo, Peisi Li, Haiou Key Laboratory of Microelectronic Devices and Integrated Circuits Guilin University of Electronic Technology Education Department of Guangxi Zhuang Autonomous Region Guilin China Guilin University of Electronic Technology Guangxi Key Laboratory of Precision Navigation Technology and Applications Guilin China

ISBN: (纸本)9798350353594

The performance demands on transimpedance amplifiers (TIA) for optoelectronic conversion have increased with the rapid development of fiber optic communication technology. A modified feedforward common gate (MFCG) transimpedance amplifier with an inductor less topology is suggested for analogue front-end wireless fiber optic communications applications. This leads to a significant improvement in the circuit power consumption and band-width. An improved auxiliary amplifier without Miller effect is used instead of the traditional FCG common source amplifier to improve the bandwidth and reduce the phase jitter. An improved parallel active inductor is used instead of the traditional active inductor to obtain a more favorable bandwidth compensation effect. Small-signal analysis demonstrated that the M-FCG has a low input impedance, a large output impedance and transconductance con-version ratio. Based on a 0.18-μm CMOS process post-simulation results, the M-FCG circuit exhibits a transimpedance gain of 58.87 dBΩ, a bandwidth of 6.33 GHz, an equivalent input current noise of 27.02 pA/-VHz, a power consumption of 1.9 mW in the core circuit, and occupies a layout area of 0.0054 mm2. Additionally, the eye diagrams were generated using PRBS at a rate of 20 Gb/s. The resulting eye diagram displays openness and clarity, thereby meeting the requirement for 20 Gb/s code element transmission. © 2024 IEEE.

关键词： CMOS integrated circuits

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A 9.1μW Capacitance-to-Digital Converter for Pressure Sensor Systems 16

A 9.1μW Capacitance-to-Digital Converter for Pressure Senso...

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16th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2022

作者： Xia, Qing-Jiang Zhang, Ya-Cong You, You Zhou, Fei Lu, Wen-Gao Peking University School of Software and Microelectronics Beijing100091 China Peking University Key Laboratory of Microelectronic Devices and Circuits Ministry of Education School of Integrated Circuits Beijing100871 China

ISBN: (数字)9781665469067

ISBN: (纸本)9781665469067

This paper presents a capacitance-to-digital converter (CDC) for pressure sensor systems, which consists of a front-end circuit and a successive approximation register (SAR) ADC. The front-end circuit uses correlated double sampling technology to eliminate the impact of the low-frequency noise and offset voltage of the operational amplifier. The CDACP and CDACN in the SAR ADC can save power and area as the sampling capacitance of the front-end circuit. The SAR ADC uses bottom plate sampling to avoid various nonlinearities caused by top plate sampling, and a comparator with pre-amplification to reduce the impact of kickback noise. Adjustable reference capacitance (CREF) is designed to expand the detection range of sensor capacitance. The circuit is designed and fabricated in 0.18μm standard CMOS process. While the power supply is 1.8V and the conversion time is 224μs, the power consumption is only 9.1μW. Capacitance resolution of 7.8fF is achieved with sensor capacitance (CSENS) detectable in the range of 10.1pF-21.5pF. © 2022 IEEE.

关键词： Pressure sensors

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XOR spin logic operated by unipolar current based on field-free spin-orbit torque switching induced by a lateral interface

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Rare Metals 2024年第8期43卷 3868-3875页

作者： Yan-Ru Li Mei-Yin Yang Guo-Qiang Yu Bao-Shan Cui Jin-Biao Liu Yong-Liang Li Qi-Ming Shao Jun Luo Key Laboratory of Microelectronic Devices and Integrated Technology Institute of MicroelectronicsChinese Academy of Sciences(IMECAS)Beijing 100029China University of Chinese Academy of Sciences(UCAS) Beijing 100049China Songshan Lake Materials Laboratory Dongguan 523808China Institute of Physics Chinese Academy of SciencesBeijing 100190China Key Laboratory for Magnetism and Magnetic Materials of Ministry of Education Lanzhou UniversityLanzhou 730000China Department of Electronic and Computer Engineering The Hong Kong University of Science and TechnologyHong Kong 999077China

Spin logics have emerged as a promising avenue for the development of logic-in-memory *** particular,the realization of XOR spin logic gates using a single spin-orbit torque device shows great potential for low-power stateful logic circuits in the next *** this study,we successfully obtained the XOR logic gate by utilizing a spin-orbit torque device with a lateral interface,which was created by local ion implantation in the Ta/Pt/Co/Ta Hall device exhibiting perpendicular magnetic *** angle of the lateral interface is set at 45°relative to the current direction,leading to the competition between symmetry breaking and current-driven Néel-type domain wall ***,the field-free magnetic switching reversed is realized by the same sign of current amplitude at this *** on this field-free magnetic switching behavior,we successfully proposed an XOR logic gate that could be implemented using only a single spin-orbit torque Hall *** study provides a potentially viable approach toward efficient spin logics and in-memory computing architectures.

关键词： Filed-free magnetic switching Spin-orbit torque XOR logic gate Lateral interface

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High-quality and large-grain epi-like Si film by NiSi2-seed initiated lateral epitaxial crystallization（SILEC）

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Science China(Information Sciences) 2020年第12期63卷 272-274页

作者： Yuancheng YANG Baotong ZHANG Xiaoqiao DONG Xiaokang LI Shuang SUN Qifeng CAI Ran BI Xiaoyan XU Ming LI Ru HUANG Key Laboratory of Microelectronic Devices and Circuits Institute of MicroelectronicsPeking University

Dear editor,Three-dimensional monolithic integration (3D-MI)has recently emerged for both "more Moore"and "more than Moore" applications, because of its high integration density, high bandwidth and multi-functions [1]. With 3D-MI, different types of devices can be stacked on the same platform and in a single process flow.

关键词： 3D monolithic integration (3D-MI) NiSi2-seed low-temperature crystallization epitaxial barrier layer metal contamination

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Interfacial properties of 2D WS_(2)on SiO_(2)substrate from X-ray photoelectron spectroscopy and firstprinciples calculations

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Frontiers of physics 2022年第5期17卷 93-103页

作者： Changjie Zhou Huili Zhu Weifeng Yang Qiubao Lin Tongchang Zheng Lan Yang Shuqiong Lan Xiamen Key Laboratory of Ultra-Wide Bandgap Semiconductor Materials and Devices Department of PhysicsSchool of ScienceJimei UniversityXiamen 361021China Department of Microelectronics and Integrated Circuits Xiamen UniversityXiamen 361005China

Two-dimensional(2D)WS_(2)films were deposited on SiO_(2)wafers,and the related interfacial properties were investigated by high-resolution X-ray photoelectron spectroscopy(XPS)and first-principles *** the direct(indirect)method,the valence band offset(VBO)at monolayer WS_(2)/SiO_(2)interface was found to be 3.97 eV(3.86 eV),and the conduction band offset(CBO)was 2.70 eV(2.81 eV).Furthermore,the VBO(CBO)at bulk WS_(2)/SiO_(2)interface is found to be about 0.48 eV(0.33 eV)larger due to the interlayer orbital coupling and splitting of valence and conduction band ***,the WS_(2)/SiO_(2)heterostructure has a Type I energy-band *** band offsets obtained experimentally and theoretically are consistent except the narrower theoretical bandgap of SiO_(2).The theoretical calculations further reveal a binding energy of 75 meV per S atom and the totally separated partial density of states,indicating a weak interaction and negligible Fermi level pinning effect between WS_(2)monolayer and SiO_(2)*** combined experimental and theoretical results provide proof of the sufficient VBOs and CBOs and weak interaction in 2D WS_(2)/SiO_(2)heterostructures.

关键词： band offsets WS_(2) SiO_(2) X-ray photoelectron spectroscopy first-principles calculations

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Complementary tunneling transistors based on WSe2/SnS2 van der Waals heterostructure

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Science China(Information Sciences) 2020年第4期63卷 245-247页

作者： Rundong JIA Liang CHEN Qianqian HUANG Ru HUANG Key Laboratory of Microelectronic Devices and Circuits (MOE) Institute of Microelectronics Peking University

Dear editor,Two-dimensional (2D) semiconductors have emerged as one of the most promising material candidates for next-generation electronic devices [1].Owing to the broad range of bandgap diversity and the pristine i... 详细信息

关键词： Complementary tunneling transistors based on WSe2/SnS2 van der Waals heterostructure VDS

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