A silicon-controlled rectifier (SCR) device for on-chip ESD protection is proposed. The Anode pad of the device is directly connected to die drain of the embedded nMOS crossing the N-well P-substrate junction of the n...
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A silicon-controlled rectifier (SCR) device for on-chip ESD protection is proposed. The Anode pad of the device is directly connected to die drain of the embedded nMOS crossing the N-well P-substrate junction of the nMOS to achieve a high holding current. Thus, latch-up immune current of SCR type ESD protection device is achieved by this method.
A novel layout strategy for on-chip ESD protection application is presented to solve the non-uniformity turn-on phenomenon of multi-finger gate-grounded nMOS (GGnMOS). The multi-finger gates as well as drains and sour...
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A novel layout strategy for on-chip ESD protection application is presented to solve the non-uniformity turn-on phenomenon of multi-finger gate-grounded nMOS (GGnMOS). The multi-finger gates as well as drains and sources are connected in serrate type. The whole multi-finger device acts as singer finger with large gate width. After realized in 0.13μm craft and tested under TLP method, the It2 per unit channel width of the novel GGnMOSs are much higher than those of the traditional GGnMOSs by this simply approach.
Using an auxiliary quantizer before unity-STF SDM, a novel 3 rd -order dual-quantizer SDM with extended dynamic range is presented. With hybrid distributed feedback & feedforward paths and an internal feedforward ...
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Using an auxiliary quantizer before unity-STF SDM, a novel 3 rd -order dual-quantizer SDM with extended dynamic range is presented. With hybrid distributed feedback & feedforward paths and an internal feedforward path, a novel low-distortion 3 rd -order SDM with simple adder before quantizer is proposed as the unity-STF SDM. Simulations show their perfect immunity to non-idealities.
In this paper, the random telegraph noise (RTN) statistics in silicon nanowire transistors (SNWTs) are comprehensively studied. The capture/emission time constants and probabilities are found to be strongly impacted b...
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In this paper, the random telegraph noise (RTN) statistics in silicon nanowire transistors (SNWTs) are comprehensively studied. The capture/emission time constants and probabilities are found to be strongly impacted by the quantum confinement in SNWTs, which cannot be fully explained by classical RTN theory. A full quantum RTN model for SNWTs is proposed for fundamental understanding of the experiments. The characteristics of non-stationary RTN in SNWTs under high-field biases are studied for the first time, based on the developed statistical trap-response (STR) characterization method. The trap capture probability is found to be much different from that of the quasi-stationary RTN, leading to large errors in circuit aging prediction if using traditional RTN distributions. These new understandings are critical for robust SNWT circuit design against RTN.
In this paper, a novel silicon-based T-gate Schottky barrier tunneling FET (TSB-TFET) is proposed and experimentally demonstrated. With enhanced electric field at source side through gate configuration for steeper sub...
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ISBN:
(纸本)9781457705069
In this paper, a novel silicon-based T-gate Schottky barrier tunneling FET (TSB-TFET) is proposed and experimentally demonstrated. With enhanced electric field at source side through gate configuration for steeper subthreshold slope (SS), the device with self-depleted structure can effectively suppress the leakage current and simultaneously achieve the dominant Schottky barrier tunneling current for high ON-current without area penalty, which can alleviate the problems in silicon TFET. In addition, the proposed TSB-TFET can have comparable DIBL effect and reduced gate-to-drain capacitance compared with traditional TFET. Further device optimization is experimentally achieved by extended multi-finger gate configuration of the same footprint and barrier modulation by dopant segregation Schottky technology. With compatible bulk CMOS technology, the fabricated device can achieve steep SS over almost 5 decades of current, as well as high I ON /I OFF ratio (~10 7 ). The proposed device with high compatibility is very promising for future low power system applications.
This paper presents a novel dynamic element matching (DEM) method called Thermo Data Weighted Average (TDWA) for Nyquist-rate current - steering digital to analog converter (DAC). When the input code changes, it only ...
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This paper presents a novel dynamic element matching (DEM) method called Thermo Data Weighted Average (TDWA) for Nyquist-rate current - steering digital to analog converter (DAC). When the input code changes, it only increase or decrease the number of unit current source which is be chosen. This approach can reach a better static performance than full random DEM technique but also eliminate signal dependent distortions to achieve good linearity at high sampling frequencies as other DEM implementations.
A capacitor mismatch auto-compensation circuit has been designed and implemented for MEMS gyroscope differential capacitive sensing circuit. An in-chip capacitor array that controlled by the 7-bit SAR is selected to b...
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A capacitor mismatch auto-compensation circuit has been designed and implemented for MEMS gyroscope differential capacitive sensing circuit. An in-chip capacitor array that controlled by the 7-bit SAR is selected to be connected in parallel with one of the gyroscope capacitor, making the two differential capacitors of the gyroscope equal. The compensation progress only takes eight periods of the clock at the start and will be turned off afterward automatically. The chip is fabricated in a 0.35um CMOS process. The test of the chip is performed with a vibratory gyroscope on the condition of a closed-loop control in the drive mode, and the measurement shows that the minimum capacitive compensation is 3.5fF.
The paper presents a low-noise high voltage (HV) CMOS Interface ASIC designed for MEMS vibratory gyroscopes. A closed-loop control is realized in the driving mode. An in-chip level shifter is designed in the loop to a...
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The paper presents a low-noise high voltage (HV) CMOS Interface ASIC designed for MEMS vibratory gyroscopes. A closed-loop control is realized in the driving mode. An in-chip level shifter is designed in the loop to achieve a high DC voltage level of 5V which can excite the gyroscope. A DC biasing method is adopted in the interface circuit to convert the amplitude-modulated capacitive signal into voltage. The chip occupies 2.5 × 2.0 mm 2 in a 0.35 μm 2P3M BCD HV process, which offers buried layer and high voltage N-well isolation to block out the potential coupling noise. Simulation results show that the drive axis can accomplish a closed-loop self-oscillation of the MEMS gyroscope.
A unified microscopic principle is proposed to clarify resistive switching behaviors of transition metal oxide based resistive random access memories (RRAM) for the first time. In this unified microscopic principle, b...
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A unified microscopic principle is proposed to clarify resistive switching behaviors of transition metal oxide based resistive random access memories (RRAM) for the first time. In this unified microscopic principle, both unipolar and bipolar switching characteristics of RRAM are correlated with the distribution of localized oxygen vacancies in the oxide switching layer, which is governed by the generation and recombination with dissociative oxygen ions. Based on the proposed microscopic principle, an atomistic simulation method is developed to evaluate critical memory performance, and successfully conduct the device optimization. The experimental data are well in line with the developed simulation method.
A low-noise readout integrated circuit for high-energy particle detector is *** noise of charge sensitive amplifier was suppressed by using single-side amplifier and resistors as source ***-time semi-Gaussian filter i...
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A low-noise readout integrated circuit for high-energy particle detector is *** noise of charge sensitive amplifier was suppressed by using single-side amplifier and resistors as source ***-time semi-Gaussian filter is chosen to avoid switch *** peaking time of pulse shaper and the gain can be programmed to satisfy *** readout integrated circuit has been designed and fabricated using a 0.35 μm double-poly triple-metal CMOS *** results show the functions of the readout integrated circuit are *** equivalent noise charge with no detector connected is 500–700 e in the typical mode,the gain is tunable within 13–130 mV/fC and the peaking time varies from 0.7 to 1.6 μs,in which the average gain is about 20.5 mV/fC,and the linearity reaches 99.2%.
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