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Radial boundary forces-modulated valence band structure of Ge (110) nanowire

Radial boundary forces-modulated valence band structure of G...

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2009 13th International Workshop on Computational Electronics, IWCE 2009

作者： Honghua, Xu Yuhui, He Yuning, Zhao Gang, Du Jinfeng, Kang Ruqi, Han Xiaoyan, Liu Chun, Fan Institute of Microelectronics Key Laboratory of Microelectronic Devices and Circuits Peking University Beijing China Computer Center of Peking University Beijing China

ISBN: (纸本)9781424439270

For the radial boundary force induced in the process, the strain energy distribution and strain tensor components in Ge (110) nanowire (NW) are calculated by finite element method. Based on the strain distribution, we compute valence band structures with different radial forces. As increasing force values, top valence subbands shift downwards. The influence on the corresponding effective masses and density of states are also investigated. ©2009 IEEE.

关键词： Nanowires

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Investigation of thermally robust single-component resistive switching organic memory cell

Investigation of thermally robust single-component resistive...

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67th Device Research Conference, DRC 2009

作者： Kuang, Yongbian Huang, Ru Wu, Dake Tang, Yu Yu, Zhe Ma, Ying Zhang, Lijie Tang, Poren Gao, Dejin Wen, Yongqiang Song, Yanlin Key Laboratory of Microelectronic Devices and Circuits Institute of Microelectronics Peking University Beijing 100871 China Organic Solid Laboratory Institute of Chemistry Chinese Academy of Sciences Beijing 100080 China

ISBN: (纸本)9781424435289

A novel organic memory device based on titany 1 phthalocyanine (TiOPc) thin film sandwiched between Aluminum and indium tin oxide electrodes was reported. With a single-component organic material, the device can achieve good performance, such as a high on/off current ratio of 10 4, a large 4 V read voltage window, and good retention (14, 000s at 1 V stress). The organic memory cell can maintain bistable performance up to 525 K due to the thermal robustness of TiOPc, indicating the potential for hybrid integration with CMOS technology. The possible switching mechanis m is proposed and well fitted with experimental data. The results show that the interface is significant for the reversible switching phenomenon. Trap-filling space charge limited conduction (SCLC) with TiOPc charge confinement and electrochemical reaction at the interface inducing lower electron affinity can elucidate the switching behavior of the TiOPc memory cell. © 2009 IEEE.

关键词： Electron affinity

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Evaluation of Mobility in Graphene Nanoribbons Including Line Edge Roughness Scattering

Evaluation of Mobility in Graphene Nanoribbons Including Lin...

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International Conference on Simulation of Semiconductor Processes and devices (SISPAD)

作者： Lang Zeng Xiao Yan Liu Gang Du Jin Feng Kang Ru Qi Han Key Laboratory of Microelectronic Devices and Circuits Institute of Microelectronics Peking University China

This work employs single particle Monte Carlo method to calculation the electron mobility in graphene nanoribbons including phonon scattering (acoustic and optical) and line edge roughness scattering. Mobility as high as 2 times 10 4 cm 2 /Vs is obtained and when the GNRs width is 2 nm, the mobility reduces to only about 200 cm 2 /Vs. These results agree well with experiment results. Also the effect of roughness parameters on mobility is analyzed.

关键词： Optical scattering Acoustic scattering Phonons Particle scattering Stimulated emission Electron mobility Electron optics Nanoscale devices microelectronics Monte Carlo methods

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A 16-bit 312.5-kHz bandwidth fourth-order one-bit switched-capacitor sigma-delta modulator

A 16-bit 312.5-kHz bandwidth fourth-order one-bit switched-c...

引用

IEEE Conference on Electron devices and Solid-State circuits

作者： Hongyi Li Yuan Wang Song Jia Xing Zhang Key Laboratory of Microelectronic Devices and Circuits Institute of Microelectronics Peking University Beijing China

In this paper, a high-resolution medium-frequency single-loop fourth-order 1-bit sigma-delta modulator is implemented in 0.18 ¿m CMOS technology. The modulator has been presented with an oversampling ratio of 50, clock frequency of 31.25 MHz, 312.5 kHz bandwidth, and achieves a peak SNR of 101.7 dB, which is 16.6-bit resolution, 103 dB dynamic range. The whole circuits consume 58.55-mW from a single 1.8 V supply voltage. The experimental results show a figure-of-merit (FOM) of 170.27 dB. A system to circuit level design is finished in this paper.

关键词： Bandwidth Delta-sigma modulation Circuit topology CMOS technology Delta modulation Switches Signal resolution microelectronics Clocks Dynamic range

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A comparative study of double gate MOSFET with asymmetric barrier heights at source/drain and the symmetric DG-SBFET

A comparative study of double gate MOSFET with asymmetric ba...

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International Workshop on Junction Technology

作者： Xiong-Xiong Du Lei Sun Xiao-Yan Liu Ru-Qi Han Key Laboratory of Microelectronic Devices and Circuits Peking University Beijing P.R. China Key Laboratory of Microelectronic Devices and Circuits Institute of Microelectronics Peking University Beijing 100871 China

Double gate SBFET with asymmetric barrier heights at source/drain and the symmetric DG-SBFET are simulated. A comparative study between them is made. We have found that the DG-ASBFET is more appropriate for LOP and LSPT applications. Furthermore, the DG-ASBFET shows a better scale ability and better immunity to the short channel effects.

关键词： MOSFET circuits Silicon Silicides microelectronics CMOS technology Semiconductor device doping Fabrication Schottky barriers Electrodes Electrons

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New noise-tolerant dynamic circuit design

New noise-tolerant dynamic circuit design

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IEEE Conference on Electron devices and Solid-State circuits

作者： Wei Su Song Jia Xiayu Li Limin Liu Yuan Wang Key Laboratory of Microelectronics Devices and Circuits (MOE) Department of Microelectronics Peking University Beijing China Key Laboratory of Microelectronics Devices and Circuits (MOE) Department of Microelectronics Peking University Beijing 100871 China

Dynamic circuit is suitable for high-speed application, but often suffers from noise related reliability problems which become increasingly prominent as the technology are entering into the scores of nano meter era. This paper presented a new dynamic circuit scheme, which could achieve higher noise margin without sacrificing much power consumption and delay time. This design achieves a higher noise margin (1.2 V) by finely tuning the transistor size. The effectiveness of new scheme is demonstrated in both NMOS series and parallel circuits. The simulation result shows that, compared with other published work, the proposed structure has the highest noise margin for the same power-delay product (PDP) 1 .

关键词： Circuit noise Circuit synthesis Crosstalk Working environment noise Noise reduction MOS devices Signal to noise ratio Energy consumption Dynamic voltage scaling microelectronics

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Investigation of thermally robust single-component resistive switching organic memory cell

Investigation of thermally robust single-component resistive...

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Device Research Conference

作者： Yongbian Kuang Ru Huang Dake Wu Yu Tang Zhe Yu Ying Ma Lijie Zhang Poren Tang Dejin Gao Yongqiang Wen Yanlin Song Key Laboratory of Microelectronic Devices and Circuits Institute of Microelectronics Peking University Beijing P. R. China Key Laboratory of Microelectronic Devices and Circuits Institute of Microelectronics Peking University Beijing China Organic Solid Laboratory Institute of Chemistry Chinese Academy of Sciences Beijing P. R. China

A novel organic memory device based on titanyl phthalocyanine (TiOPc) thin film sandwiched between Aluminum and indium tin oxide electrodes was reported. With a single-component organic material, the device can achieve good performance, such as a high on/off current ratio of 10 4 , a large 4 V read voltage window, and good retention (14,000 s at 1 V stress). The organic memory cell can maintain bistable performance up to 525 K due to the thermal robustness of Ti OPc, indicating the potential for hybrid integration with CMOS technology. The possible switching mechanism is proposed and well fitted with experimental data. The results show that the interface is significant for the reversible switching phenomenon. Trap-filling space charge limited conduction (S CLC) with TiOPc charge confinement and electrochemical reaction at the interface inducing lower electron affinity can elucidate the switching behavior of the TiOPc memory cell.

关键词： Thermal resistance Robustness CMOS technology Thin film devices Aluminum Indium tin oxide Electrodes Organic materials Voltage Thermal stresses

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Effects of Ionic Doping on the Behaviors of Oxygen Vacancies in HfO2 and ZrO2: A First Principles Study

Effects of Ionic Doping on the Behaviors of Oxygen Vacancies...

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International Conference on Simulation of Semiconductor Processes and devices (SISPAD)

作者： Haowei Zhang Bin Gao Shimeng Yu Lin Lai Lang Zeng Bing Sun Lifeng Liu Xiaoyan Liu Jing Lu Ruqi Han Jinfeng Kang Institute of Microelectronics Ministry of Education Peking University and Key Laboratory of Microelectronic Devices and Circuits Beijing China State Key Laboratory of Mesoscopic Physics and Department of Physics Peking University Beijing China

The effects of metallic ion (Al, Ti, or La) doping in HfO 2 or ZrO 2 on the behaviors of oxygen vacancies (V 0 ) such as the formation energy, density of states, and migration energy were investigated by using first principles calculations. The calculations show that, 1) the doping causes an upward shift of deep V 0 levels; 2) dopant radius has a weak impact on the relaxed formation energy of V 0 (E j v ) but a significant impact on the unrelaxed E f v ; 3) the relaxed formation energy E f v of V 0 is remarkably reduced by trivalent ion (Al or La) doping compared to by tetravalent ion (Ti) doping; 4) Al, Ti, or La doping impacts the migration barriers of V 0 along different directions.

关键词： Doping Oxygen Hafnium oxide microelectronics Laboratories Physics Zirconium High K dielectric materials High-K gate dielectrics Neural networks

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Impact of Thickness and Deposition Temperature of Gate Dielectric on Valence Bands in Silicon Nanowires

Impact of Thickness and Deposition Temperature of Gate Diele...

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International Conference on Simulation of Semiconductor Processes and devices (SISPAD)

作者： Honghua Xu Yuhui He Chun Fan Yuning Zhao Gang Du Jinfeng Kang Ruqi Han Xiaoyan Liu Institute of Microelectronics Ministry of Education Peking University and Key Laboratory of Microelectronic Devices and Circuits Beijing China Computer Center Peking University Beijing China

The strain distribution and strained valence band structure in silicon nanowire with varied thicknesses and deposition temperatures of gate dielectric are discussed in detail in this work. Our calculation indicates that valence subbands are dependent on the structure and process parameters. Strain has little effects in (001) orientation. But in Si (110) nanowire, the valence subbands shift upper and warp remarkably as the gate dielectric becomes thicker. Taking thermal residual strain into consideration, the strained valence subbands go to higher energy positions compared to NW without the residual strain. The different deposition temperature by a certain process slightly influences the valence bands. Strain effects on densities of states and effective masses are also investigated.

关键词： Silicon Nanowires Capacitive sensors Dielectric devices Thermal expansion Tensile strain microelectronics Hafnium oxide Temperature distribution Effective mass

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A unified FinFET reliability model including high K gate stack dynamic threshold voltage, hot carrier injection, and negative bias temperature instability

A unified FinFET reliability model including high K gate sta...

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IEEE International Symposium on Quality Electronic Design

作者： Chenyue Ma Bo Li Lining Zhang Jin He Xing Zhang Xinnan Lin Mansun Chan TSRC Key Laboratory of Microelectronic Devices and Circuits of Ministry of Education Institute of Microelectronics EECS Peking University Shenzhen China The Micro-& Nano Electronic Device and Integrated Technology Group The Key Laboratory of Integrated Microsystems Peking University Shenzhen China TSRC Key Laboratory of Microelectronic Devices and Circuits of Ministry of Education Institute of Microelectronics EECS Peking University Beijing China Peking University Beijing Beijing CN Department of ECE Hong Kong University of Science and Technology Hong Kong China

A unified FinFET reliability model including high K stack dynamic threshold (HKSDT), hot carrier injection (HCI), and negative bias temperature instability (NBTI) has been developed and verified by experimental data. The FinFET-based circuit performances are simulated and compared under these reliability issues by HSPICE simulator after the inclusion of the presented model.

关键词： FinFETs High K dielectric materials High-K gate dielectrics Threshold voltage Hot carrier injection Negative bias temperature instability Circuit simulation Human computer interaction Niobium compounds Titanium compounds

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