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Low power and high uniformity of HfOx-based RRAM via tip-enhanced electric fields

中国科学:化学（英文版） 2019年第10期62卷 160-166页

作者： Xiaokang LI Baotong ZHANG Bowen WANG Xiaoyan XU Yuancheng YANG Shuang SUN Qifeng CAI Shijie HU Xia AN Ming LI Ru HUANG Key Laboratory of Microelectronic Devices and Circuits(MOE) Institute of MicroelectronicsPeking University Beijing 100871 China

In this paper,the HfOx-based resistive random access memory (RRAM) devices with sub-100 nm pyramid-type electrodes were *** the help of tip-enhanced electric field around the pyramid-type electrodes,it was experimentally demonstrated that the novel devices have better cycle-to-cycle variation control,lower forming/set voltage (1.97/0.7 V) and faster switching speed (≤ 30 ns under 0.9 V pulse) as well as better endurance reliability than conventional flat electrode resistive memory *** addition,the novel RRAM is experimentally demonstrated with independence of electrode number for the first time to present great potential in scaling *** novel structure metal-oxide based RRAM will be suitable for the future low-power non-volatile memory application.

关键词： RRAM pyramid-type electrode variation reliability switching speed conducting filament

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A 1μW-to-158μW Output Power Pseudo Open-Loop Boost DC-DC with 86.7% Peak Efficiency using Frequency-Programmable Oscillator and Hybrid Zero Current Detection

A 1μW-to-158μW Output Power Pseudo Open-Loop Boost DC-DC w...

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IEEE International Symposium on circuits and Systems (ISCAS)

作者： Xiaolong Chen Enbin Gong Hao Zhang Le Ye Ru Huang Key Laboratory of Microelectronic Devices and Circuits (MOE) Institute of Microelectronics Peking university Beijing 100871 China

ISBN: (数字)9781728133201

ISBN: (纸本)9781728133218

This paper proposed a pseudo-open boost DC-DC converter whose input voltage ranges from 300mV-to-500mV and output voltage ranges from 1.2V-to-1.8V. The output power ranges from 1μW to 158μW. Three key structures are designed to realize the high energy conversion efficiency when the load reaches ultra-light: the pseudo open-loop structure, the frequency-programmable oscillator, and the hybrid zero current detection (H-ZCD) circuit. The pseudo open-loop structure eliminates the analog comparators or error amplifiers used in converter and the quiescent power loss is much reduced. The frequency-programmable ring oscillator is able to output 9-bit binary frequency ranges from 500Hz-100KHz, so the power consumption of clock generation is saved when load power reaches to ultra-light. The proposed H-ZCD is designed to reduce the inductor power loss with just tiny power consumption. Accordingly, the high efficiency boost DC-DC works in the discontinuous condition mode (DCM) and the constant on time pulse frequency modulation (PFM) is proposed. As a simulation result, the peak efficiency of the converter reaches to 86.7% while the load power is 13.7μW.

关键词： Ring oscillators DC-DC power converters Power demand Switches Capacitors Energy efficiency

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An 81–99 GHz Tripler with Fundamental Cancellation and 3rd Harmonic Enhancement Technique in 40-nm CMOS

An 81–99 GHz Tripler with Fundamental Cancellation and 3rd ...

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IEEE International Symposium on circuits and Systems (ISCAS)

作者： Xiaolei Su Xiucheng Hao Dong Wang Zhengkun Shen Zexue Liu Junhua Liu Huailin Liao Key Laboratory of Microelectronic Devices and Circuits (MOE) Institute of Microelectronics Peking University Beijing 100871 China

ISBN: (数字)9781728133201

ISBN: (纸本)9781728133218

An 81–99 GHz tripler for wireless transceiver LO generation is presented in this paper. To suppress the fundamental signal and enhance the 3rd harmonic, the inversion signal is applied to the gate of the cascading transistor of the push-push differential pair. A capacitor is connected to the source and drain of the cascading transistor to further suppress the fundamental signal. Without additional filters, the tripler achieves more than 40 dBc of fundamental suppression with an even harmonic suppression of up to 60 dBc. The tripler reaches an output power of −2.6 dBm (4-dBm input) at 91.5 GHz with a 20% bandwidth of from 81 to 99 GHz. The core area of the chip occupies only 190 μm×530 μm in TSMC 40-nm CMOS process and consumes 28.2 mW.

关键词： Harmonic analysis Power harmonic filters Transistors Radio frequency Parasitic capacitance Capacitors Inductors

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Applications of MXenes in human-like sensors and actuators

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Nano Research 2023年第4期16卷 5767-5795页

作者： Jinbo Pang Songang Peng Chongyang Hou Xiao Wang Ting Wang Yu Cao Weijia Zhou Ding Sun Kai Wang Mark H.Rümmeli Gianaurelio Cuniberti Hong Liu Institute for Advanced Interdisciplinary Research(iAIR) Collaborative Innovation Center of Technology and Equipment for Biological Diagnosis and Therapy in Universities of ShandongUniversity of JinanJinan 250022China Institute for Materials Science and Max Bergmann Center of Biomaterials Technische Universität DresdenDresden 01069Germany Center for Advancing Electronics Dresden Technische Universität DresdenDresden 01069Germany Dresden Center for Computational Materials Science Technische Universität DresdenDresden 01062Germany Dresden Center for Intelligent Materials(GCL DCIM) Technische Universität DresdenDresden 01062Germany High-Frequency High-Voltage Device and Integrated Circuits R&D Center Institute of MicroelectronicsChinese Academy of SciencesBeijing 100029China Key Laboratory of Microelectronic Devices&Integrated Technology Institute of MicroelectronicsChinese Academy of SciencesBeijing 100029China Shenzhen Key Laboratory of Nanobiomechanics Shenzhen Institute of Advanced TechnologyChinese Academy of SciencesShenzhen 518055China State Key Laboratory of Biobased Material and Green Papermaking Qilu University of TechnologyShandong Academy of SciencesJinan 250353China School of Bioengineering Qilu University of TechnologyShandong Academy of ScienceJinan 250353China Key Laboratory of Modern Power System Simulation and Control&Renewable Energy Technology(Ministry of Education) Northeast Electric Power UniversityJilin 132012China School of Electrical Engineering Northeast Electric Power UniversityJilin 132012China School of Electrical Engineering Weihai Innovation Research InstituteQingdao UniversityQingdao 266000China School of Electrical and Computer Engineering Jilin Jianzhu UniversityChangchun 130118China Institute for Complex Materials Leibniz Institute for Solid State and Materials Research Dresden(IFW Dresden)20 Helmholtz StrasseDresden 01069Germany College of Energy Soochow Institute for Energy and Materials Innovations Soochow UniversitySuzhou 215006China Key L

Human beings perceive the world through the senses of sight,hearing,smell,taste,touch,space,and *** first five senses are prerequisites for people to *** sensing organs upload information to the nervous systems,including the brain,for interpreting the surrounding ***,the brain sends commands to muscles reflexively to react to stimuli,including light,gas,chemicals,sound,and ***,as an emerging two-dimensional material,has been intensively adopted in the applications of various sensors and *** this review,we update the sensors to mimic five primary senses and actuators for stimulating muscles,which employ MXene-based film,membrane,and composite with other functional ***,a brief introduction is delivered for the structure,properties,and synthesis methods of ***,we feed the readers the recent reports on the MXene-derived image sensors as artificial retinas,gas sensors,chemical biosensors,acoustic devices,and tactile sensors for electronic ***,the actuators of MXene-based composite are ***,future opportunities are given to MXene research based on the requirements of artificial intelligence and humanoid robot,which may induce prospects in accompanying healthcare and biomedical engineering applications.

关键词： MXenes sensors actuators gas sensors biosensors tactile sensors sound sensors artificial retina

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Dilution-induced current-density increase in disordered organic semiconductor devices: A kinetic Monte Carlo study

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Physical Review Applied 2024年第1期21卷 014050-014050页

作者： Feiling Yang Harm van Eersel Jiawei Wang Quan Niu Peter A. Bobbert Reinder Coehoorn Feilong Liu Guofu Zhou Guangdong Provincial Key Laboratory of Optical Information Materials and Technology & Institute of Electronic Paper Displays South China Academy of Advanced Optoelectronics South China Normal University Guangzhou 510006 People’s Republic of China Department of Applied Physics and Institute for Complex Molecular Systems Eindhoven University of Technology Eindhoven University of Technology P.O. Box 513 Eindhoven Manitoba 5600 Netherlands Simbeyond B.V. Het Eeuwsel 57 Eindhoven AS 5612 Netherlands Key Laboratory of Microelectronic Devices and Integrated Technology Institute of Microelectronics of Chinese Academy of Sciences Beijing 100029 China State Key Laboratory of Luminescent Materials and Devices South China University of Technology Guangzhou 510640 People’s Republic of China Shenzhen Guohua Optoelectronics Tech. Co. Ltd. Shenzhen 518110 People’s Republic of China

Using three-dimensional kinetic Monte Carlo simulations, we systematically investigate the effect of dilution with an inert material on the current density in unipolar sandwich-type disordered organic semiconductor devices. Such a dilution technique was studied experimentally by Abbaszadeh et al. [Nat. Mater. 15, 628 (2016)], who observed a dilution-induced increase of the current density. The authors explained the effect as a result of a reduced density of trapped charges (“trap dilution”), assuming an exponential density of trap states. Our simulations support this explanation, and show under which conditions this trap-dilution-induced increase of the current density becomes more than outweighed by the negative effect of the dilution-induced decrease of the mobility. The effect is studied for sets of systematically varied material parameters, including systems with a Gaussian shape of the host and trap DOS.

关键词： Carrier dynamics Energy transport Optoelectronics Surface & interfacial phenomena Disordered systems Organic LEDs Organic semiconductors Monte Carlo methods

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In-memory computing with emerging nonvolatile memory devices

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Science China(Information Sciences) 2021年第12期64卷 23-68页

作者： Caidie CHENG Pek Jun TIW Yimao CAI Xiaoqin YAN Yuchao YANG Ru HUANG State Key Laboratory for Advanced Metals and Materials School of Materials Science and EngineeringUniversity of Science and Technology Beijing Key Laboratory of Microelectronic Devices and Circuits (MOE) Department of Micro/nanoelectronicsPeking University Center for Brain Inspired Chips Institute for Artificial IntelligencePeking University Center for Brain Inspired Intelligence Chinese Institute for Brain Research (CIBR)

The von Neumann bottleneck and memory wall have posed fundamental limitations in latency and energy consumption of modern computers based on von Neumann architecture. In-memory computing represents a radical shift in the computer architecture that can address such problems by merging computing functions within the memory itself. In this article, we review the emerging nonvolatile memory devices,such as resistance-based and charge-based memory devices, that are explored for in-memory computing applications. We will provide an overview of the materials, mechanisms, and integration of these devices,and discuss the optimizations at the device and array levels that are required to better support in-memory computing. Recent progress in the application of in-memory computing in artificial neural networks, spiking neural networks, digital logic in memory as well as hardware security will also be discussed. Finally, we will discuss the remaining challenges in this field and potential pathways to address them.

关键词： in-memory computing von Neumann bottleneck nonvolatile memory energy efficiency neural network

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Resistive Memory-based Neural Differential Equation Solver for Score-based Diffusion Model

arXiv

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arXiv 2024年

作者： Yang, Jichang Chen, Hegan Chen, Jia Wang, Songqi Wang, Shaocong Yu, Yifei Chen, Xi Wang, Bo Zhang, Xinyuan Cui, Binbin Li, Yi Lin, Ning Xu, Meng Li, Yi Xu, Xiaoxin Qi, Xiaojuan Wang, Zhongrui Zhang, Xumeng Shang, Dashan Wang, Han Liu, Qi Cheng, Kwang-Ting Liu, Ming Department of Electrical and Electronic Engineering the University of Hong Kong Hong Kong ACCESS – AI Chip Center for Emerging Smart Systems InnoHK Centers Hong Kong Science Park Hong Kong Laboratory of Microelectronic Devices and Integrated Technology Institute of Microelectronics Chinese Academy of Sciences Beijing100029 China State Key Laboratory of Integrated Chips and Systems Frontier Institute of Chip and System Fudan University Shanghai200433 China Institute of the Mind the University of Hong Kong Hong Kong University of Chinese Academy of Sciences Beijing100049 China School of Integrated Circuits Hubei Key Laboratory for Advanced Memories Huazhong University of Science and Technology Wuhan430074 China Department of Electronic and Computer Engineering the Hong Kong University of Science and Technology Hong Kong

Human brains image complicated scenes when reading a novel. Replicating this imagination is one of the ultimate goals of AI-Generated Content (AIGC). However, current AIGC methods, such as score-based diffusion, are still deficient in terms of rapidity and efficiency. This deficiency is rooted in the difference between the brain and digital computers. Digital computers have physically separated storage and processing units, resulting in frequent data transfers during iterative calculations, incurring large time and energy overheads. This issue is further intensified by the conversion of inherently continuous and analog generation dynamics, which can be formulated by neural differential equations, into discrete and digital operations. Inspired by the brain, we propose a time-continuous and analog in-memory neural differential equation solver for score-based diffusion, employing emerging resistive memory. The integration of storage and computation within resistive memory synapses surmount the von Neumann bottleneck, benefiting the generative speed and energy efficiency. The closed-loop feedback integrator is time-continuous, analog, and compact, physically implementing an infinite-depth neural network. Moreover, the software-hardware co-design is intrinsically robust to analog noise. We experimentally validate our solution with 180 nm resistive memory in-memory computing macros. Demonstrating equivalent generative quality to the software baseline, our system achieved remarkable enhancements in generative speed for both unconditional and conditional generation tasks, by factors of 64.8 and 156.5, respectively. Moreover, it accomplished reductions in energy consumption by factors of 5.2 and 4.1. Our approach heralds a new horizon for hardware solutions in edge computing for generative AI applications. © 2024, CC BY-NC-SA.

关键词： Diffusion

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Tunable synaptic devices based on ambipolar MoTe2 transistor

Tunable synaptic devices based on ambipolar MoTe2 transistor

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IEEE Electron devices Technology and Manufacturing Conference (EDTM)

作者： Tingting Gao Xuefei Li Linxin Han Yanqing Wu Wuhan National High Magnetic Field Center and School of Optical and Electronic Information Huazhong University of Science and Technology Wuhan China Institute of Microelectronics and Key Laboratory of Microelectronic Devices and Circuits (MOE) Peking University Beijing China

Synapse is one of the main elements of hardware implementation in a neuron network. Complex CMOS technology-based circuits using various Si-based transistors, non-Si based memory devices like RRAM, and 2D FET devices serve as hardware implement for neuron network. In this work, we demonstrate ambipolar MoTe₂ FET devices with a wide range oftunability in synaptic characteristic and classical paired pulsed facilitation as well as spike-timing-dependent plasticity function.

关键词： Neurons Field effect transistors CMOS technology Hardware Biology Manufacturing Synapses

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A low-Power SRAM with charge cycling based read and write assist scheme

A low-Power SRAM with charge cycling based read and write as...

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International Conference on Solid-State and Integrated Circuit Technology

作者： Hanzun Zhang Song Jia Jiancheng Yang Yuan Wang Institute of Microelectronics Peking University Beijing China Key Laboratory of Microelectronic Devices and Circuits Peking University Beijing China

ISBN: (数字)9781728162355

ISBN: (纸本)9781728162362

In a SRAM array, the largest power consumer is pre-charging or voltage switching on bit-lines in read or write operations. The paper presents a bit-line charge cycling based read and write assist circuit for static random-access memory. With help of the assist circuit, the BLs charges wasted in conventional design is reused for BLs pre-charging in next period. The proposed array is simulated in SMIC 14nm FinFET process with a supply voltage of 0.8V. Simulation results show that a 23%-43% power reduction is achieved compared with conventional designs.

关键词： Random access memory Power demand Voltage control Transistors Timing Heating systems Circuit stability

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Geometric Variability Aware Quantum Potential based Quasi-ballistic Compact Model for Stacked 6 nm-Thick Silicon Nanosheet GAA-FETs

Geometric Variability Aware Quantum Potential based Quasi-ba...

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International Electron devices Meeting (IEDM)

作者： Shijie Huang Zhenghua Wu Haoqing Xu Jingrui Guo Lihua Xu XinLv Duan Qian Chen Guanhua Yang Qingzhu Zhang Huaxiang Yin Lingfei Wang Ling Li Ming Liu Key Laboratory of Microelectronics Devices and Integrated Technology Institute of Microelectronics of the Chinese Academy of Sciences Beijing China University of Chinese Academy of Sciences Beijing China Advanced Integrated Circuits R&D Center Institute of Microelectronic of the Chinese Academy of Sciences Beijing China

Quantum-corrected quasi-ballistic compact model is developed for Stacked Silicon Nanosheet (SiNS) Gate-all-around (GAA) FETs. Theories of Density-Gradient-Poisson (DG-P), Singular perturbation and quasi-ballistic to interpret quantum mechanicals on density profile and charge transport are employed in analytical expressions of current, terminal charge and trans-capacitance. Besides, the model incorporates ultra-scaling induced subthreshold degradation and is rigidly verified by comparing to 6-nm-thick-SiNS based experiments (of both ${P-}$ and $N$ -GAAFET) and GTS simulations (of down to 15 nm channel length). Instead of classical Schrodinger-Poisson theory, it holds features of computation-efficiency and SPICE-compatibility. Especially, awareness of geometric variability enables performance and reliability assessments that statistical effects of stacked nanosheets on on-state voltage are predicted. Hence, this high-efficient quantum corrected model is promising in designing integrated circuits and developing a geometry aware design-technology co-optimization flow in the next generation technology node.

关键词： Electric potential Simulation Field effect transistors Gallium arsenide Logic gates Mathematical models Silicon

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