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International Electron devices Meeting (IEDM)

作者： Pan Xu Pengfei Jiang Yang Yang Xueyang Peng Wei Wei Tiancheng Gong Yuan Wang Xiao Long Jiebin Niu Zhongguang Xu Chenxin Zhu Zhenhua Wu Qing Luo Ming Liu Key Laboratory of Fabrication Technologies for Integrated Circuits Chinese Academy of Sciences Beijing China Laboratory of Microelectronics Devices and Integrated Technology Institute of Microelectronics Chinese Academy of Sciences Beijing China University of Chinese Academy of Sciences Beijing China University of Science and Technology of China Hefei Anhui China

ISBN: (数字)9798350365429

ISBN: (纸本)9798350365436

HfO 2 -based FeFET paves the way for the next generation NVM thecnology, however, demands for high memory window (MW) and roubust reliability (especially the endurance) cannot be combined in the current reported devices, and the contradiction of high MW and low thermal budget (aiming for BEOL compatibility) also needs to be solved. In this work, we propose an integrated ferroelectric (FE) Hf 0.5 Zr 0.5 O 2 (HZO) and amorphous In-Ga-Zn-O (a-IGZO) channel FeFET with a maximum 10V MW and prominent endurance up to 10 9 . Workfunction (WF) engineering is utilized to regualte the intrinsic $\mathrm{V}_{\mathrm{t}}$ to improve the PGM/ERS efficiency with full-loop polarization switching, and the adopted Mo gate can effectively reduce the thermal budget to 300°C ensuring a fully BEOL compatibility. Then with O 3 -plasma treatment to the gate electrode, the introduced tunneling layer can futher improve the MW by gate charge injection. The demonstrated FeFET shows great 3-bit/cell storage ability without states overlapping, high $\mathrm{I}_{\text{on}}/\mathrm{I}_{\text{off}}$ ratio $(>10^{7})$ , as well as great linearity and high $\mathrm{G}_{\max}/\mathrm{G}_{\min}$ (286) during synaptic weight modulation.

关键词： Performance evaluation Nonvolatile memory Thermal engineering Modulation Switches Logic gates Tunneling Reliability FeFETs Next generation networking

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Semimetallization induced Hall anomaly in doped polymers

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Physical Review Research 2024年第4期6卷 043180-043180页

作者： Zean Guo Jiawei Wang Mengmeng Li Yawei Lv Nianduan Lu Chong Bi Yeliang Wang Ling Li Ming Liu State Key Lab of Fabrication Technologies for Integrated Circuits Institute of Microelectronics Chinese Academy of Sciences Beijing 100029 China University of Chinese Academy of Sciences Beijing 100049 China Key Laboratory for Micro-/Nano-Optoelectronic Devices of the Ministry of Education School of Physics and Electronics Hunan University Changsha 410082 China School of Information and Electronics MIIT Key Laboratory for Low-Dimensional Quantum Structure and Devices Beijing Institute of Technology Beijing 100081 China

Hall anomaly related to deviations in Hall carrier concentrations have always been recognized as signs of charge incoherence in organic semiconductors, which lack ordered lattices. In this paper, we show that the Hall carrier concentration anomaly in doped polymers might be a result of semimetallization. Based on the observation of semimetal-like states, a dual-channel model, in which electrons and holes compensate the Hall voltages of each other, is employed to account for the anomaly. Observations of possible nonlinear Hall effect and temperature dependent Hall signs further support the origin of Hall anomaly from semimetal states.

关键词： Anomalous Hall effect Hall effect Conducting polymers Density functional theory Electron spin resonance X-ray photoelectron spectroscopy

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Development of HSQ replacement gate process for silicon nanowire MOS devices

Development of HSQ replacement gate process for silicon nano...

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IEEE Electron devices Technology and Manufacturing Conference (EDTM)

作者： Kun Tu Xiaoqiao Dong Baotong Zhang Ru Huang Ming Li Peimin Lu Key Laboratory of Microelectronic Devices and Circuits Institute of Microelectronics Peking University Beijing China Fuzhou University Fuzhou China

In this paper, we have developed a replacement gate process with HSQ based on electron beam transmission exposure, which can simply and efficiently realize ideally symmetrical gate-all-around structure. HSQ replacement gate with intact morphology is successfully prepared on suspended nanowire arrays. With Si₃N₄ as the filling dielectric material, HSQ replacement gate is flattened by CMP and removed by hydrofluoric acid. Finally, the self-aligned and completely controllable poly-Si gate-all-around structure is realized successfully.

关键词： Electron beams Dielectric materials Morphology Logic gates Silicon Nanoscale devices Filling

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Highly Sensitive Humidity Sensor Based on Strontium-Doped Lanthanum Ferrite Nanofibers

SSRN

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SSRN 2023年

作者： Zhang, Ziyi Li, Fangxin Zheng, Yangong Faculty of Electrical Engineering and Computer Science Ningbo University Ningbo315211 China Key Laboratory of Microelectronic Devices & Integrated Technology Institute of Microelectronics Chinese Academy of Sciences Beijing100029 China

Humidity sensors are the most widely applied sensors. Although some highly sensitive humidity sensors have been explored, devices that can accurately detect low humidity are still required. Improving the adsorption of water molecules by surface regulation is an effective way to enhance humidity sensitivity. In this study, electrospinning prepared a series of lanthanum ferrite samples doped with different concentrations of strontium. For the sample with a surface atomic ratio between strontium and lanthanum was approximately 0.2, there was a 6×104 times change in the resistance of the sensor to 90% relative humidity, and the response was 6.76 for 4% relative humidity. Negligible hysteresis, and excellent stability demonstrate the advantages of the strontium-doped lanthanum ferrite nanofibers. The sensing mechanism was discussed by measuring the change of band gap and work function of samples with different concentrations of strontium doping. Furthermore, suitable doping also decreased the adsorption energy and increased the charge transfer during the adsorption of water molecules on the surface of lanthanum ferrite based on the calculations. This study provides a new perspective for enhancing the sensitivity of humidity sensors via surface regulation. © 2023, The Authors. All rights reserved.

关键词： Electrospinning

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A 256 Kbit Hf0.5Zr0.5O2-based FeRAM Chip with Scaled Film Thickness (sub-8nm), Low Thermal Budget (350oC), 100% Initial Chip Yield, Low Power Consumption (0.7 pJ/bit at 2V write voltage), and Prominent Endurance (>1012)

A 256 Kbit Hf0.5Zr0.5O2-based FeRAM Chip with Scaled Film Th...

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International Electron devices Meeting (IEDM)

作者： Pengfei Jiang Haijun Jiang Yang Yang Lu Tai Wei Wei Tiancheng Gong Yuan Wang Pan Xu Shuxian Lv Boping Wang Jianfeng Gao Junfeng Li Jun Luo Jianguo Yang Qing Luo Ming Liu State Key Laboratory of Fabrication Technologies for Integrated Circuits Institute of Microelectronics Chinese Academy of Sciences Beijing China Laboratory of Microelectronics Devices and Integrated Technology Institute of Microelectronics Chinese Academy of Sciences Beijing China Zhangjiang Lab Shanghai China School of Information Science and Engineering Shandong University Qingdao China

In this work, we successfully resolve the remanent polarization (P r ) degradation issue, which is caused by the thermal budget decreasing and the film thickness scaling of Hf 0.5 Zr 0.5 O 2 (HZO), and co-integrate the TiN/HZO/TiN capacitors with large initial P r and low operating voltage in the Back-End-of -Line (BEOL) of 130nm CMOS technology to provide a 256 Kbit 1T1C FeRAM chip. Firstly, we prove that the P r degradation is caused by the increasing component of anti-ferroelectric (AFE) phase. Then, utilizing the pre-crystallization engineering and O 3 treatment to the TiN bottom electrode (BE), not only the formation of t-phase is effectively suppressed, but also the required annealing temperature is reduced. The enhancement of ferroelectricity is related to the small thermal expansion of TiO 2 interface layer, which can induce large tensile stress to HZO during the annealing process. Moreover, the oxidization of TiN BE can prevent it absorbing oxygen from HZO, and the reduced oxygen vacancy (Vo) defects can improve both the retention and TDDB characteristics. Based on the above optimizations, the chip demonstrates 100% initial chip yield, >150mV sense margin after 10 12 write cycles, power consumption of 0.7 pJ/bit at 2V write voltage, over 10 12 endurance and 10 years retention.

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Research on Kalman filter for one-dimensional discrete data

Research on Kalman filter for one-dimensional discrete data

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2021 International Conference on Information Technology and Intelligent Control, CITIC 2021

作者： Wei, Fan Zhang, Zupei Jia, Kunpeng School of Computing Xi'an Shiyou University Shanxi Xi'an710065 China Key Laboratory of Microelectronic Devices and Integration Technology Institute of Microelectronics Chinese Academy of Sciences Beijing100029 China

Kalman filter processes the input and observation signals with noise on the basis of linear state space representation to obtain the system state or real signal. In the one-dimensional model, due to the lack of multi-dimensional description of the target, the prior estimate of the state is often the measured value of the previous moment. When the target state changes, the divergence phenomenon will occur. Aiming at the problem that the one-dimensional traditional Kalman filter lacks the target observation dimension, which leads to the divergence or imprecision of the filter, this paper focuses on improving the estimation method of the target state, and proposes a real-time prediction model based on the cascade structure. This model can improve the response of Kalman filter to the change of target state and dynamically adjust the Kalman iterative domain to improve the measurement accuracy. The digital signal filtering simulation is carried out and the performance of the filter is verified based on LabVIEW. Experimental results show that the algorithm can maintain the accuracy and real-time performance of filtering when only one dimension observation results are obtained. © 2021 institute of Physics Publishing. All rights reserved.

关键词： Kalman filters

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Single-Electron Transistor Based on Cobalt Oxide

Single-Electron Transistor Based on Cobalt Oxide

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IEEE International Symposium on circuits and Systems

作者： Muchan Li Zhongzheng Tian Xuemin Yu Dacheng Yu Zhongyang Ren Liming Ren Yunyi Fu Key Laboratory of Microelectronic Devices and Circuits (MOE) Institute of Microelectronics Peking University Beijing P. R. China

In this paper, we propose and implement a single-electron transistor (SET) based on cobalt oxide for the first time. The SETs were fabricated through nanofabrication process compatible with the CMOS technology. A cobalt oxide (Co1-yO) on the surface of the source (S) and drain (D) Co electrodes is utilized to act as a quantum dot (QD). The diameter of QD is calculated to be 2.3 nm. The interface between Co1-yO and Co thin films (S/D electrodes) is used as tunneling junctions. The SET based on CoO exhibits typical single electron transport characteristics. Owing to the high Coulomb blockade energy (～180 meV), the Coulomb blockade regions still remain at room temperature (300 K), revealing the nanometer scale CoO-based SETs have great potential to operate at room temperature.

关键词： Electrodes Temperature Quantum dots Tunneling Cobalt Junctions Single electron transistors

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High-Speed, Low-Voltage, Small-Pitch and Robust Otft-Based Integrated Gate Driver for Active-Matrix Displays

SSRN

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SSRN 2023年

作者： Wu, Wanming Geng, Di Chen, Chuanke Chuai, Xichen Li, Shuai Lu, Nianduan Li, Ling State key Lab of Fabrication Technologies for Integrated Circuits Institute of Microelectronics Chinese Academy of Sciences Beijing100029 China Laboratory of Microelectronics Devices and Integrated Technology Institute of Microelectronics Chinese Academy of Sciences Beijing100029 China University of Chinese Academy of Sciences Beijing100049 China

We design and fabricate a high-speed, low-voltage, small-pitch and robust integrated gate driver with organic thin-film transistors (OTFTs). The dual-gate OTFT devices have a field effect mobility of 0.78cm2/Vs, and on/off current ratio of above 108. A single stage of the gate driver consists of ten TFTs and two capacitors, with small pitch of 244μm. The fabricated circuit can output minimum pulse width of 5μs, which is compatible to full-high definition (FHD, 1,920×1,080) active-matrix displays with 60Hz frame rate. It can work at input swing of as low as 10V, with VGH2, VGH1 and VGL of 5V, 0V and -10V respectively. With the threshold voltage shift under positive and negative bias stress, the driver shows output signals without significant degradation and demonstrates its high reliability through simulation. © 2023, The Authors. All rights reserved.

关键词： Thin film transistors

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Two-dimensional materials for future information technology: status and prospects

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Science China(Information Sciences) 2024年第6期67卷 1-147页

作者： Hao QIU Zhihao YU Tiange ZHAO Qi ZHANG Mingsheng XU Peifeng LI Taotao LI Wenzhong BAO Yang CHAI Shula CHEN Yiqi CHEN Hui-Ming CHENG Daoxin DAI Zengfeng DI Zhuo DONG Xidong DUAN Yuhan FENG Yu FU Jingshu GUO Pengwen GUO Yue HAO Jun HE Xiao HE Jingyi HU Weida HU Zehua HU Xinyue HUANG Ziyang HUANG Ali IMRAN Ziqiang KONG Jia LI Qian LI Weisheng LI Lei LIAO Bilu LIU Can LIU Chunsen LIU Guanyu LIU Kaihui LIU Liwei LIU Sheng LIU Yuan LIU Donglin LU Likuan MA Feng MIAO Zhenhua NI Jing NING Anlian PAN Tian-Ling REN Haowen SHU Litao SUN Yue SUN Quanyang TAO Zi-Ao TIAN Dong WANG Hao WANG Haomin WANG Jialong WANG Junyong WANG Wenhui WANG Xingjun WANG Yeliang WANG Yuwei WANG Zhenyu WANG Yao WE... Department of Applied Physics The Hong Kong Polytechnic University Key Laboratory for Micro-Nano Physics and Technology of Hunan Province College of Materials Science and EngineeringHunan University College of Integrated Circuits Zhejiang University Shenzhen Geim Graphene Center Shenzhen Key Laboratory of Layered Materials for Value-Added ApplicationsTsinghua-Berkeley Shenzhen Institute & Institute of Materials ResearchTsinghua Shenzhen International Graduate SchoolTsinghua University State Key Laboratory of Extreme Photonics and Instrumentation College of Optical Science and EngineeringInternational Research Center for Advanced PhotonicsZijingang CampusZhejiang University National Key Laboratory of Materials for Integrated Circuits Shanghai Institute of Microsystem and Information TechnologyChinese Academy of Sciences CAS Key Laboratory of Nanophotonic Materials and Devices & Key Laboratory of Nanodevices and Applications i-LabSuzhou Institute of Nano-Tech and Nano-Bionics (SINANO)Chinese Academy of Sciences College of Chemistry and Chemical Engineering Hunan University Key Laboratory of Quantum State Construction and Manipulation (Ministry of Education) Department of PhysicsRenmin University of China School of Integrated Circuits Beijing National Research Center for Information Science and Technology (BNRist)Tsinghua University School of Electronic Science and Engineering Nanjing University The State Key Discipline Laboratory of Wide Band Gap Semiconductor Technology Shaanxi Joint Key Laboratory of GrapheneSchool of MicroelectronicsXidian University Key Laboratory of Artificial Micro- and Nano-Structures of Ministry of Education School of Physics and TechnologyWuhan University School of Integrated Circuits Huazhong University of Science and Technology Center for Nanochemistry (CNC) Beijing Science and Engineering Center for NanocarbonsBeijing National Laboratory for Molecular SciencesCollege of Chemistry and Molecular EngineeringPeking University State Key Laboratory for Artificial Microstruct

Over the past 70 years, the semiconductor industry has undergone transformative changes,largely driven by the miniaturization of devices and the integration of innovative structures and materials. Two-dimensional(2D) materials like transition metal dichalcogenides(TMDs) and graphene are pivotal in overcoming the limitations of silicon-based technologies, offering innovative approaches in transistor design and functionality, enabling atomic-thin channel transistors and monolithic 3D integration. We review the important progress in the application of 2D materials in future information technology, focusing in particular on microelectronics and optoelectronics. We comprehensively summarize the key advancements across material production, characterization metrology, electronic devices, optoelectronic devices, and heterogeneous integration on silicon. A strategic roadmap and key challenges for the transition of 2D materials from basic research to industrial development are outlined. To facilitate such a transition, key technologies and tools dedicated to 2D materials must be developed to meet industrial standards, and the employment of AI in material growth, characterizations, and circuit design will be essential. It is time for academia to actively engage with industry to drive the next 10 years of 2D material research.

关键词： two-dimensional (2D) materials information technology production technology standardization of characterization microelectronic devices optoelectronic devices multi-functional integration

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A Spike-Event-Based Neuromorphic Processor with Enhanced On-Chip STDP Learning in 28nm CMOS

A Spike-Event-Based Neuromorphic Processor with Enhanced On-...

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IEEE International Symposium on circuits and Systems (ISCAS)

作者： Yi Zhong Xiaoxin Cui Yisong Kuang Kefei Liu Yuan Wang Ru Huang Key Laboratory of Microelectronics Devices and Circuits Institute of Microelectronics Peking University Beijing China

Event-based spiking neural network (SNN) has displayed a promising prospect to realize real-time, efficient and intelligent hardware platforms. Whereas great efforts are still being appealed to explore the possibility of introducing online learning abilities to neuromorphic systems. In this paper, a 28-nm CMOS neuromorphic processor is presented, fulfilling online learning by adopting counter and lookup table (LUT) based spike-timing-dependent plasticity (STDP) rule. Designed to work at high-precision scenarios, the presented processor integrates up to 1024 neurons and 256K signed 9-bit synapses. It also ensures chip array interconnection to fit large neural networks. Moreover, by utilizing the sparse property of spike events to minimize activity rate, the typical power consumption is further reduced to 3.348mW for training MNIST dataset.

关键词： Training Power demand Neuromorphics Table lookup System-on-chip Biological neural networks Synapses

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