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International Electron devices Meeting (IEDM)

作者： Yonghui Zheng Tianjiao Xin Jing Yang Yunzhe Zheng Zhaomeng Gao Yiwei Wang Yilin Xu Yan Cheng Kai Du Diqing Su Ruiwen Shao Bingxing Zhou Zhen Yuan Qilan Zhong Cheng Liu Rong Huang Xiaodong Tang Chungang Duan Sannian Song Zhitang Song Hangbing Lyu Department of Electronics Key Laboratory of Polar Materials and Devices (MOE) East China Normal University Shanghai China State Key Laboratory of Functional Materials for Informatics Shanghai Institute of Microsystem and Information Technology Chinese Academy of Sciences Shanghai China Huawei Technologies Co. Shenzhen China Beijing Advanced Innovation Center for Intelligent Robots and Systems School of Medical Technology Beijing Institute of Technology Beijing China Institute of Microelectronics Chinese Academy of Sciences Beijing China

ISBN: (纸本)9781665489607

In this work, we revealed the dynamic process of atomic structure transitions of ferroelectric (FE) Hf 0.5 Zr 0.5 O 2 (HZO) film across Curie temperature ${\mathrm{T}}_{\mathrm{c}}$ in spherical aberration corrected transmission electron microscope (Cs-TEM) with in-situ controlled heating and cooling. We have the following new observations: (1) A first-order transition between polar orthorhombic (o−) and nonpolar tetragonal (t−) phases occurs as heating up to ${\mathrm{T}}_{\mathrm{c}}$, while the reverse process is triggered by cooling with obvious thermal hysteresis $(\Delta \mathrm{T}\approx 298^{o}\mathrm{C})$; (2) Monoclinic (m−) phase contributes to the stability of o-structure by introducing local compressive stress; (3) The cooling t-to-o transition is identified as martensitic-like transformation, therefore increasing the phase change driving force would be helpful to FE enhancement. This work provides solid evidences on structure transitions near ${\mathrm{T}}_{\mathrm{c}}$ of HZO film at atomic-scale, laying foundation for understanding the physical nature of ferroelectricity in hafnium oxide materials.

关键词： Heating systems Temperature distribution Cooling Capacitors Force Hafnium oxide Iron

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Dynamic neural network with memristive CIM and CAM for 2D and 3D vision

arXiv

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arXiv 2024年

作者： Zhang, Yue Zhang, Woyu Wang, Shaocong Lin, Ning Yu, Yifei He, Yangu Wang, Bo Jiang, Hao Lin, Peng Xu, Xiaoxin Qi, Xiaojuan Wang, Zhongrui Zhang, Xumeng Shang, Dashan Liu, Qi Cheng, Kwang-Ting Liu, Ming Department of Electrical and Electronic Engineering The University of Hong Kong Hong Kong Key Laboratory of Microelectronic Devices & Integrated Technology Institute of Microelectronics Chinese Academy of Sciences Beijing100049 China ACCESS – AI Chip Center for Emerging Smart Systems InnoHK Centers Hong Kong Science Park Hong Kong Institute of the Mind The University of Hong Kong Hong Kong Key Lab of Fabrication Technologies for Integrated Circuits Chinese Academy of Sciences Beijing100049 China State Key Laboratory of Integrated Chips and Systems Frontier Institute of Chip and System Fudan University Shanghai200433 China University of Chinese Academy of Sciences Beijing100049 China College of Computer Science and Technology Zhejiang University Zhejiang310027 China Department of Electronic and Computer Engineering The Hong Kong University of Science and Technology Hong Kong

The brain is dynamic, associative and efficient. It reconfigures by associating the inputs with past experiences, with fused memory and processing. In contrast, AI models are static, unable to associate inputs with past experiences, and run on digital computers with physically separated memory and processing. We propose a hardware-software co-design, a semantic memory-based dynamic neural network (DNN) using memristor. The network associates incoming data with the past experience stored as semantic vectors. The network and the semantic memory are physically implemented on noise-robust ternary memristor-based Computing-In-Memory (CIM) and Content-Addressable Memory (CAM) circuits, respectively. We validate our co-designs, using a 40nm memristor macro, on ResNet and PointNet++ for classifying images and 3D points from the MNIST and ModelNet datasets, which not only achieves accuracy on par with software but also a 48.1% and 15.9% reduction in computational budget. Moreover, it delivers a 77.6% and 93.3% reduction in energy consumption. © 2024, CC BY.

关键词： Memristors

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High-Speed Trace Detection DROIC for 15μm-Pitch Cryogenic Infrared FPAs

High-Speed Trace Detection DROIC for 15μm-Pitch Cryogenic I...

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IEEE International Symposium on circuits and Systems (ISCAS)

作者： Yuze Niu Yajun Zhu Wengao Lu Zhaofeng Huang Yuting Gu Yacong Zhang Zhongjian Chen Key Laboratory of Microelectronic Devices and Circuits Department of Microelectronics Peking University China Peking University information technology institute (Tianjin Binhai) China

ISBN: (数字)9781728133201

ISBN: (纸本)9781728133218

This paper introduces a digital readout integrated circuit (DROIC) for 320×256 target-tracking infrared focal plane arrays(IRFPAs). The circuit is based on a two-stage ADC, which implements 10-bit coarse quantization and 4-bit fine quantization, enabling high frame frequency trace detection. In addition, the locating and independent output of sensitive pixels are realized by a scanning function, which greatly reduces output frequency and power consumption. The proposed ROIC of 15μm pixel-pitch is fabricated using 55nm 1P6M CMOS process. The pixel circuit consumes 379nW. Frame frequency of the target-tracking mode is 1 kHz, the two-stage ADC has a nonlinearity of 0.06%.

关键词： Quantization (signal) Capacitors Array signal processing Power demand Imaging Detectors Integrated circuits

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A Novel Self-Aligned Dopant-Segregated Schottky Tunnel-FET with Asymmetry Sidewall Based on Standard CMOS Technology

A Novel Self-Aligned Dopant-Segregated Schottky Tunnel-FET w...

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International Conference on Solid-State and Integrated Circuit Technology

作者： Yiqing Li Qianqian Huang Mengxuan Yang Ting Li Zhixuan Wang Weihai Bu Jin Kang Wenbo Wang Shengdong Zhang Ru Huang School of Electronic and Computer Engineering Peking University Shenzhen China Key Laboratory of Microelectronic Devices and Circuits (MOE) Institute of Microelectronics Peking University Beijing China Semiconductor Technology Innovation Center (Beijing) Beijing China

ISBN: (数字)9781728162355

ISBN: (纸本)9781728162362

A novel Si-based tunnel field effect transistor (TFET) with self-aligned dopant-segregated Schottky (DSS) source and underlap-drain is proposed and manufactured based on standard CMOS process. Asymmetric sidewall structures are introduced and manufactured for the process of self-aligned DSS source/drain. In the proposed device, DSS structure is able to optimize the source junction of devices without introducing ambipolar effect. The fabricated device improves the on-current by about two orders of magnitude compared with the conventional TFET without DSS structure, and suppress the ambipolar current over two orders of magnitude compared with the DSS-TFET without asymmetric sidewall structures. The experimental results demonstrate the great potential of the device for ultra-low power IOT applications.

关键词： TFETs Silicides Standards Internet of Things Logic gates CMOS process Junctions

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A Novel Electrical Isolation Solution for Tunnel FET Integration

A Novel Electrical Isolation Solution for Tunnel FET Integra...

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China Semiconductor Technology International Conference (CSTIC)

作者： Ting Li Qianqian Huang Le Ye Yuan Zhong Mengxuan Yang Yiqing Li Yimei Li Zhongxin Liang Ru Huang School of Electronic Information Engineering Anhui University Hefei China Key Laboratory of Microelectronic Devices and Circuits (MOE) Institute of Microelectronics Peking University Beijing China Peking University Information Technology Institute (Tianjin Binhai)

ISBN: (数字)9781728165585

ISBN: (纸本)9781728165592

In this work, for bulk tunnel field-effect transistors (TFET), the electrical isolation solutions between neighboring devices for TFET integration are investigated. To suppress the leakage current of the P-type doped regions through the P-type substrate, a new effective isolation method is proposed and verified via simulation. The simulation shows the leakage current can be reduced from 10 -5 A/μm to 10 -13 A/μm. The solution is beneficial for TFETs to keep its advantages for ultra-low power applications such as implantable medical devices and Internet of Things.

关键词： TFETs Medical devices Leakage currents Low-power electronics Internet of Things Substrates

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Structural phase transition of monochalcogenides investigated with machine learning

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Physical Review B 2022年第9期105卷 094116-094116页

作者： J. Zhang F. Zhang D. Wei L. Liu X. Liu D. Fang G. X. Zhang X. Chen D. Wang School of Microelectronics & State Key Laboratory for Mechanical Behavior of Materials Xi'an Jiaotong University Xi'an 710049 China Key Lab of Micro-Nano Electronics and System Integration of Xi'an City Xi'an Jiaotong University Xi'an 710049 China Guangxi Key Laboratory of Optical and Electronic Materials and Devices College of Materials Science and Engineering Guilin University of Technology Guilin 541004 China Engineering Research Center of Nanoelectronic Integration and Advanced Equipment Ministry of Education School of Physics and Electronic Science East China Normal University Shanghai 200062 China MOE Key Laboratory for Nonequilibrium Synthesis and Modulation of Condensed Matter School of Physics Xi' an Jiaotong University Xi'an 710049 China School of Chemistry and Chemical Engineering Harbin Institute of Technology Harbin 150001 China Department of Applied Physics Aalto University Espoo 00076 Finland

As machine learning becomes increasingly important in science and engineering, it holds the promise to provide a universal approach applicable to various systems to investigate their crystalline phase transitions. Here, we build and train accurate artificial neural networks that can distinguish tiny energy difference, which is crucial to predict the crystalline phase transitions. Employing the trained artificial neural networks in Monte Carlo simulations as the surrogate energy function, we apply this approach to monochalcogenides, including bulk and two-dimensional monolayer SnTe and GeTe, investigating their crystalline phase transitions. The machine-learning approach, when viewed as providing a universal mathematical structure, can be transferred to the investigation of other materials when the training data set generated with ab initio methods are available. Moreover, the machine-learning approach resolves the difficulties associated with constructing the effective Hamiltonian for monochalcogenides, showing great potential with its accuracy and efficiency.

关键词： Ferroelectricity Structural phase transition Chalcogenides Machine learning

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A 12-GHz All-Digital Calibration-Free FMCW Signal Generator Based on a Retiming Fractional Frequency Divider

A 12-GHz All-Digital Calibration-Free FMCW Signal Generator ...

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IEEE Asian Conference on Solid-State circuits (ASSCC)

作者： Zhengkun Shen Heyi Li Haoyun Jiang Zherui Zhang Junhua Liu Huailin Liao Key Laboratory of Microelectronic Devices and Circuits (MOE) Institute of Microelectronics Peking University Beijing China

ISBN: (数字)9781728151069

ISBN: (纸本)9781728151076

A 12-GHz all-digital calibration-free frequency-modulated continuous-wave (FMCW) signal generator is presented in this paper based on a retiming fractional frequency divider (FFD). Instead of modulating a multi-modulus divider (MMD) by a ΔΣ modulator, a fractional divider is utilized to release the narrow loop bandwidth limitation and achieve better phase noise without active noise cancellation techniques. Thus, the FMCW signal generator can achieve low root-mean-square (RMS) frequency error under a fast chirp slop. A calibration-free retiming FFD architecture which is not sensitive to process, voltage and temperature (PVT) variations is proposed to avoid complex and slow calibration process. Implemented in 40-nm CMOS, the generator consumes 33.8 mW power and 0.32 mm 2 chip area. Measurement results show that the generator achieves 78 MHz/μs maximum chirp slope and 6.0 kHz RMS frequency error when 300 MHz frequency is swept in 2 ms. The phase noise from 12 GHz carrier is -113.6 dBc/Hz at 1 MHz offset.

关键词： Chirp Generators Frequency conversion Phase noise Bandwidth Linearity Frequency modulation

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Efficient and accurate neural field reconstruction using resistive memory

arXiv

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arXiv 2024年

作者： Yu, Yifei Wang, Shaocong Zhang, Woyu Zhang, Xinyuan Wu, Xiuzhe He, Yangu Yang, Jichang Zhang, Yue Lin, Ning Wang, Bo Chen, Xi Wang, Songqi Zhang, Xumeng Qi, Xiaojuan Wang, Zhongrui Shang, Dashan Liu, Qi Cheng, Kwang-Ting Liu, Ming Department of Electrical and Electronic Engineering The University of Hong Kong Hong Kong Hong Kong ACCESS – AI Chip Center for Emerging Smart Systems InnoHK Centers Hong Kong Science Park Hong Kong Hong Kong Institute of Mind The University of Hong Kong Hong Kong Hong Kong Key Lab of Fabrication Technologies for Integrated Circuits Institute of Microelectronics Chinese Academy of Sciences Beijing100029 China Laboratory of Microelectronic Devices and Integrated Technology Institute of Microelectronics Chinese Academy of Sciences Beijing100029 China University of Chinese Academy of Sciences Beijing100049 China Frontier Institute of Chip and System Fudan University Shanghai200433 China Department of Electronic and Computer Engineering The Hong Kong University of Science and Technology Hong Kong Hong Kong

Human beings construct perception of space by integrating sparse observations into massively interconnected synapses and neurons, offering a superior parallelism and efficiency. Replicating this capability in AI finds wide applications in medical imaging, AR/VR, and embodied AI, where input data is often sparse and computing resources are limited. However, traditional signal reconstruction methods on digital computers face both software and hardware challenges. On the software front, difficulties arise from storage inefficiencies in conventional explicit signal representation. Hardware obstacles include the von Neumann bottleneck, which limits data transfer between the CPU and memory, and the limitations of CMOS circuits in supporting parallel processing. We propose a systematic approach with software-hardware co-optimizations for signal reconstruction from sparse inputs. Software-wise, we employ neural field to implicitly represent signals via neural networks, which is further compressed using low-rank decomposition and structured pruning. Hardware-wise, we design a resistive memory-based computing-in-memory (CIM) platform, featuring a Gaussian Encoder (GE) and an MLP Processing Engine (PE). The GE harnesses the intrinsic stochasticity of resistive memory for efficient input encoding, while the PE achieves precise weight mapping through a Hardware-Aware Quantization (HAQ) circuit. We demonstrate the system’s efficacy on a 40nm 256Kb resistive memory-based in-memory computing macro, achieving 31.5×, 35.5×, and 47.2× energy efficiency improvements and 10.8×, 38.8×, and 6.2× parallelism improvements without compromising reconstruction quality in tasks like 3D CT sparse reconstruction, novel view synthesis, and novel view synthesis for dynamic scenes. This work advances the AI-driven signal restoration technology and paves the way for future efficient and robust medical AI and 3D vision applications. Copyright © 2024, The Authors. All rights reserved.

关键词： Signal reconstruction

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Improvement of Failure Current in Modified Later Silicon-Controlled Rectifier Device with N-type Floating Region

Improvement of Failure Current in Modified Later Silicon-Con...

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International Conference on Solid-State and Integrated Circuit Technology

作者： Junmin He Yize Wang Yi Hu Dunshan Yu Yuan Wang Key Laboratory of Microelectronics Device and Circuits (MoE) Institute of Microelectronics Peking University Beijing P. R. China Beijing Smart-Chip Microelectronics Technology Co. Ltd. Beijing China

ISBN: (数字)9781728162355

ISBN: (纸本)9781728162362

The traditional Modified Later Silicon-Controlled Rectifier (MLSCR) devices for one- or dual-direction are realized based on 110nm technology node. Through TLP test, it is found that with the same 45-μ m width of the single device, by increasing the size of N-type floating region between PW and NW, the increase of the holding voltage (V h ) for dual-directional DDMLSCR device is more obvious compared with the one-direction MLSCR device. In addition, the attenuation ratio of failure current (I t2 ) is much smaller than that of the one-directional device. Both of these are beneficial for high voltage ESD applications.

关键词： Junctions Integrated circuits Electrostatic discharges High-voltage techniques Attenuation Voltage measurement Semiconductor device measurement

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Study of Silicon Controlled Rectifier devices with Different Dimensions for ESD Protection

Study of Silicon Controlled Rectifier Devices with Different...

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International Conference on Solid-State and Integrated Circuit Technology

作者： Yize Wang Junmin He Yi Hu Yubo Wang Yuan Wang Key Laboratory of Microelectronics Device and Circuits (MoE) Institute of Microelectronics Peking University Beijing P. R. China Beijing Smart-Chip Microelectronics Technology Co. Ltd. Beijing China

ISBN: (数字)9781728162355

ISBN: (纸本)9781728162362

This work mainly shows the impact of dimension changes of silicon controlled rectifier (SCR) devices on ESD protection. Based on 110-nm technology node, the key parameters D1, D2, and D3 of SCR device are variable to obtain the relevant measurement. Further, the detail analysis from the perspective of high-voltage application for these measured results are summarized in this work.

关键词： Electrostatic discharges Voltage measurement Current measurement Thyristors Junctions Discharges (electric) High-voltage techniques

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