检索结果-内蒙古大学图书馆

MXenes induce epitaxial growth of size-controlled noble nanometals:A case study for surface enhanced Raman scattering(SERS)

引用

Journal of Materials Science & Technology 2020年第5期40卷 119-127页

作者： Renfei Cheng Tao Hu Minmin Hu Changji Li Yan Liang Zuohua Wang Hui Zhang Muchan Li Hailong Wang Hongxia Lu Yunyi Fu Hongwang Zhang Quan-Hong Yang Xiaohui Wang Shenyang National Laboratory for Materials Science Institute of Metal ResearchChinese Academy of SciencesShenyang 110016China School of Materials Science and Engineering University of Science and Technology of ChinaShenyang 110016China University of Chinese Academy of Sciences Beijing 100049China National Engineering Research Center for Equipment and Technology of Cold Strip Rolling College of Mechanical EngineeringYanshan UniversityQinhuangdao 066004China Department of Materials Science and Engineering Monash UniversityClaytonVictoria 3800Australia Institute of Microelectronics Key Laboratory of Microelectronic Devices and CircuitsPeking UniversityBeijing 100871China School of Materials Science and Engineering Zhengzhou UniversityZhengzhou 450001China School of Chemical Engineering&Technology Tianjin UniversityTianjin 300072China

Noble nanometals are of significance in both scientific interest and technological applications,which are usually obtained by conventional wet-chemical *** surfactants are always used in the synthesis to prevent unexpected overgrowth and aggregation of noble ***,the surfactants are hard to remove and may interfere with plasmonic and catalytic studies,remaining surfactant-free synthesis of noble nanometals a ***,we report an approach to epitaxial growth of sizecontrolled noble nanometals on *** piloted by density functional theory calculations,along with work function experimental determination,kinetic and spectroscopic studies,epitaxial growth of noble nanometals is initiated via a mechanism that involves an in situ redox *** the redox,MXenes as two-dimensional solid reductants whose work functions are compatible with the reduction potentials of noble metal cations,enable spontaneous donation of electrons from the MXenes to noble metal cations and reduce the cations into nanoscale metallic metals on the outmost surface of *** surfactants nor external reductants are used during the whole synthesis process,which addresses a long-standing interference issue of surfactant and external reductant in the conventional wet-chemical ***,the MXenes induced noble nanometals are ***,noble nanometals firmly anchored on MXenes exhibit excellent performance towards surface enhanced Raman *** developed strategy will promote the nanostructure-controlled synthesis of noble nanometals,offering new opportunities to further improve advanced functional properties towards practical applications.

关键词： Two-dimensional materials MXene In situ redox Noble metal SERS

来源：评论

学校读者我要写书评

暂无评论

Corrigendum to “Epitaxial growth of wafer scale antioxidant single-crystal graphene on twinnedPt(111)” [Carbon 181 (2021) 225-233]

引用

Carbon 2021年 182卷 863-864页

作者： He Kang Pengtao Tang Haibo Shu Yanhui Zhang Yijian Liang Jing Li Zhiying Chen Yanping Sui Shike Hu Shuang Wang Sunwen Zhao Xuefu Zhang Chengxin Jiang Yulong Chen Zhongying Xue Miao Zhang Da Jiang Guanghui Yu Songang Peng Zhi Jin Xinyu Liu State Key Laboratory of Functional Materials for Informatics Shanghai Institute of Microsystem and Information Technology Chinese Academy of Sciences Shanghai 200050 China Center of Materials Science and Optoelectronics Engineering University of Chinese Academy of Sciences Beijing 100049 China College of Optical and Electronic Technology China Jiliang University 310018 Hangzhou China Microwave Devices and Integrated Circuits Department Institute of Microelectronics Chinese Academy of Sciences Beijing 100029 China

来源：评论

学校读者我要写书评

暂无评论

A Novel Electrical Isolation Solution for Tunnel FET Integration

A Novel Electrical Isolation Solution for Tunnel FET Integra...

引用

China Semiconductor Technology International Conference (CSTIC)

作者： Ting Li Qianqian Huang Le Ye Yuan Zhong Mengxuan Yang Yiqing Li Yimei Li Zhongxin Liang Ru Huang School of Electronic Information Engineering Anhui University Hefei China Key Laboratory of Microelectronic Devices and Circuits (MOE) Institute of Microelectronics Peking University Beijing China Peking University Information Technology Institute (Tianjin Binhai)

ISBN: (数字)9781728165585

ISBN: (纸本)9781728165592

In this work, for bulk tunnel field-effect transistors (TFET), the electrical isolation solutions between neighboring devices for TFET integration are investigated. To suppress the leakage current of the P-type doped regions through the P-type substrate, a new effective isolation method is proposed and verified via simulation. The simulation shows the leakage current can be reduced from 10 -5 A/μm to 10 -13 A/μm. The solution is beneficial for TFETs to keep its advantages for ultra-low power applications such as implantable medical devices and Internet of Things.

关键词： TFETs Medical devices Leakage currents Low-power electronics Internet of Things Substrates

来源：评论

学校读者我要写书评

暂无评论

An Energy-Efficient Mixed-Signal Parallel Multiply-Accumulate (MAC) Engine Based on Stochastic Computing

An Energy-Efficient Mixed-Signal Parallel Multiply-Accumulat...

引用

International Conference on ASIC

作者： Xinyue Zhang Jiahao Song Yuan Wang Yawen Zhang Zuodong Zhang Runsheng Wang Ru Huang Institute of Microelectronics and Key Laboratory of Microelectronics Devices and Circuits (MoE) Peking University Beijing P.R. China

Convolutional neural networks (CNN) have achieved excellent performance on various tasks, but deploying CNN to edge is constrained by the high energy consumption of convolution operation. Stochastic computing (SC) is an attractive paradigm which performs arithmetic operations with simple logic gates and low hardware cost. This paper presents an energy-efficient mixed-signal multiply-accumulate (MAC) engine based on SC. A parallel architecture is adopted in this work to solve the latency problem of SC. The simulation results show that the overall energy consumption of our design is 5.03pJ per 26-input MAC operation under 28nm CMOS technology.

关键词：

来源：评论

学校读者我要写书评

暂无评论

An Energy-Efficient Computing-in-Memory Neuromorphic System with On-Chip Training

An Energy-Efficient Computing-in-Memory Neuromorphic System ...

引用

IEEE Biomedical circuits and Systems (BIOCAS)

作者： Zhao Zhao Yuan Wang Xinyue Zhang Xiaoxin Cui Ru Huang Institute of Microelectronics and Key Laboratory of Microelectronics Devices and Circuits (MoE) Peking University Beijing P.R. China

The aim of neuromorphic computing system is to implement the computational power and efficiency of the human brain. Computing-in-memory (CIM) is a promising and energy-efficient way to perform intensive computations, whose structure is similar to human brain synapse. A 8.78TOPS/W biologically-inspired neuromorphic computing system for pattern recognition based on CIM architecture is presented in this work. The proposed system supports on-chip training with energy-efficient bio-plausible spike-timing-dependent plasticity (STDP) rule and performs multiply-and-accumulate (MAC) computations inside SRAM array during inference, which greatly reduces the energy consumption. Simulated in 65-nm technology, the proposed system achieves good performance and energy efficiency for pattern recognition. The total energy consumption of training and classifying per image of the proposed system is 0.20 nJ. And the proposed spiking neural network (SNN) just consumes 0.074mW at 1.0V with the throughput of 2.5M images/s in inference phase.

关键词： Neurons Training Synapses Random access memory Testing Neuromorphics Static VAr compensators

来源：评论

学校读者我要写书评

暂无评论

An Automatic Slope-Calibrated Ramp Generator for Single-Slope ADCs

An Automatic Slope-Calibrated Ramp Generator for Single-Slop...

引用

International Conference on ASIC

作者： Shoudong Huang Wengao Lu Ye Zhou Shanzhe Yu Yacong Zhang Xueyou Shi Zhongjian Chen Key Laboratory of Microelectronic Devices and Circuits Institute of Microelectronics Peking University Beijing China

This paper presents a ramp generator with automatic slope calibration which is able to compensate slope deviation due to process and environmental effects. A novel analog feedback circuit is proposed to regulate the stop voltage in successive approximation while fix the start voltage of the ramp automatically without much calibration code input or complicated auxiliary circuits, which reduces the complexity of circuitry and timing, meanwhile, saves area and power. A 12-bit single-slope ADC (SS-ADC), employing the proposed ramp generator, has been implemented in a 0.11-μm CMOS process. The simulation results show that the offset of the ramp's stop voltage is reduced to 0.1 LSB and the nonlinearity of the ramp is 0.034%. Besides, the measurement results verify that this structure can fulfill automatic slope calibration.

关键词：

来源：评论

学校读者我要写书评

暂无评论

A Novel Self-Aligned Dopant-Segregated Schottky Tunnel-FET with Asymmetry Sidewall Based on Standard CMOS Technology

A Novel Self-Aligned Dopant-Segregated Schottky Tunnel-FET w...

引用

International Conference on Solid-State and Integrated Circuit Technology

作者： Yiqing Li Qianqian Huang Mengxuan Yang Ting Li Zhixuan Wang Weihai Bu Jin Kang Wenbo Wang Shengdong Zhang Ru Huang School of Electronic and Computer Engineering Peking University Shenzhen China Key Laboratory of Microelectronic Devices and Circuits (MOE) Institute of Microelectronics Peking University Beijing China Semiconductor Technology Innovation Center (Beijing) Beijing China

ISBN: (数字)9781728162355

ISBN: (纸本)9781728162362

A novel Si-based tunnel field effect transistor (TFET) with self-aligned dopant-segregated Schottky (DSS) source and underlap-drain is proposed and manufactured based on standard CMOS process. Asymmetric sidewall structures are introduced and manufactured for the process of self-aligned DSS source/drain. In the proposed device, DSS structure is able to optimize the source junction of devices without introducing ambipolar effect. The fabricated device improves the on-current by about two orders of magnitude compared with the conventional TFET without DSS structure, and suppress the ambipolar current over two orders of magnitude compared with the DSS-TFET without asymmetric sidewall structures. The experimental results demonstrate the great potential of the device for ultra-low power IOT applications.

关键词： TFETs Silicides Standards Internet of Things Logic gates CMOS process Junctions

来源：评论

学校读者我要写书评

暂无评论

Improved Discrete Wavelet Analysis and Principal Component Analysis for EEG Signal Processing

Improved Discrete Wavelet Analysis and Principal Component A...

引用

International Conference on ASIC

作者： YiHsiang Chen Xiaoxin Cui Kanglin Xiao Dunshan Yu Key Laboratory of Microelectronics Devices and Circuits (MoE) Institute of Microelectronics Peking University Beijing P. R. China

Electroencephalogram (EEG) has significant applications on medical diagnosis and Brain Computer Interface (BCI). But the main obstacle of analyzing EEG signal is various types of noises to get actual information. Extracting important features is a key issue in this study. This paper uses the BCI Competition IV 2b motion imagery data, in which we provide a review of various prior art to determine the motion imaginary MI mission. Using machine learning to identify two different movements in the EEG signal, the data from nine subjects were analyzed by principal component analysis (PCA) combined with discrete wavelet (DWT) packet analysis. The extracted DWT feature is input into the support vector machine (SVM) classifier, and the experimental results shows that this method is better than traditional methods with a classification accuracy rate of 86.7%.

关键词：

来源：评论

学校读者我要写书评

暂无评论

A 12-GHz All-Digital Calibration-Free FMCW Signal Generator Based on a Retiming Fractional Frequency Divider

A 12-GHz All-Digital Calibration-Free FMCW Signal Generator ...

引用

IEEE Asian Conference on Solid-State circuits (ASSCC)

作者： Zhengkun Shen Heyi Li Haoyun Jiang Zherui Zhang Junhua Liu Huailin Liao Key Laboratory of Microelectronic Devices and Circuits (MOE) Institute of Microelectronics Peking University Beijing China

ISBN: (数字)9781728151069

ISBN: (纸本)9781728151076

A 12-GHz all-digital calibration-free frequency-modulated continuous-wave (FMCW) signal generator is presented in this paper based on a retiming fractional frequency divider (FFD). Instead of modulating a multi-modulus divider (MMD) by a ΔΣ modulator, a fractional divider is utilized to release the narrow loop bandwidth limitation and achieve better phase noise without active noise cancellation techniques. Thus, the FMCW signal generator can achieve low root-mean-square (RMS) frequency error under a fast chirp slop. A calibration-free retiming FFD architecture which is not sensitive to process, voltage and temperature (PVT) variations is proposed to avoid complex and slow calibration process. Implemented in 40-nm CMOS, the generator consumes 33.8 mW power and 0.32 mm 2 chip area. Measurement results show that the generator achieves 78 MHz/μs maximum chirp slope and 6.0 kHz RMS frequency error when 300 MHz frequency is swept in 2 ms. The phase noise from 12 GHz carrier is -113.6 dBc/Hz at 1 MHz offset.

关键词： Chirp Generators Frequency conversion Phase noise Bandwidth Linearity Frequency modulation

来源：评论

学校读者我要写书评

暂无评论

Implementation of Graph Convolution Network Based on Analog Rram

Implementation of Graph Convolution Network Based on Analog ...

引用

China Semiconductor Technology International Conference (CSTIC)

作者： Daqin Chen Zongwei Wang Shengyu Bao Yimao Cai Ru Huang Institute of Microelectronics Peking University Beijing China Key Laboratory of Microelectronic Devices and Circuits Peking University Beijing China Frontiers science center for nano-optoelectronics Peking University Beijing P. R. China

ISBN: (数字)9781728165585

ISBN: (纸本)9781728165592

In this work, the implementation of Graph Convolutional Network (GCN) based on resistive switching memory is demonstrated through simulation. After training, the RRAM-based GCN can process a semi-supervised graph classification task. Further, the impacts of read noises and circuit bit-precision on the performance of GCN are analyzed. Results show the proposed GCN can reach high accuracy when bit-precisions; 4-bit. Moreover, read noise can severely affect accuracy.

关键词： Training Knowledge engineering Convolution Switches Task analysis Integrated circuit modeling Analog-digital conversion

来源：评论

学校读者我要写书评

暂无评论

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案：

请选择收藏分类：

通借通还

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：