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Formation of Bi−Bi Dimers in Heavily Bi-Doped Lead Halide Perovskites: Origin of Carrier Density Saturation

Physical Review Applied 2022年第2期17卷 024024-024024页

作者： Shanshan Wang Menglin Huang Yu-Ning Wu Shiyou Chen Key Laboratory of Polar Materials and Devices (MOE) and Department of Electronics East China Normal University Shanghai 200241 China Key Laboratory for Computational Physical Sciences (MOE) State Key Laboratory of ASIC and System School of Microelectronics Fudan University Shanghai 200433 China Shanghai Qi Zhi Institute Shanghai 200030 China

Heterovalent Bi doping in lead halide perovskites (LHPs) is of particular interest in recent research to improve the electronic and optoelectronic properties. In experiments, the incorporation of Bi not only converts the conductivity type of crystals from p type to n type, leading to the significant enhancement of charge-carrier concentration, but also results in the appearance of near-infrared photoluminescence (NIR PL) along with the decrease of band-edge PL intensity. However, with a high concentration of Bi doping, the carrier concentration exhibits a saturated tendency and the intensity of NIR PL decreases abnormally. The origins behind these interesting phenomena are not yet well understood. Herein, based on first-principles calculations, we demonstrate that Bi dimers form n type and intrinsic LHPs with a high concentration of Bi doping. They act as effective n-type limiting defects, and hence, cause carrier saturation in experiments. Moreover, the NIR PL arising from the BiPb defect is suppressed due to the density conversion of isolated BiPb defects to Bi dimers when Bi is heavily doped. Meanwhile, nonradiative recombination is also promoted due to the deep charge-state transition level introduced by the Bi dimer. Our work not only reveals the mechanism of highly concentrated Bi limiting the electronic and optical properties of LHPs, but also suggests the precise control of Bi doping in electronic and photovoltaic applications.

关键词： Carrier generation & recombination Dopants Luminescence Optoelectronics Doped semiconductors Perovskites Photovoltaic absorbers Density functional calculations

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Semimetallization induced Hall anomaly in doped polymers

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Physical Review Research 2024年第4期6卷 043180-043180页

作者： Zean Guo Jiawei Wang Mengmeng Li Yawei Lv Nianduan Lu Chong Bi Yeliang Wang Ling Li Ming Liu State Key Lab of Fabrication Technologies for Integrated Circuits Institute of Microelectronics Chinese Academy of Sciences Beijing 100029 China University of Chinese Academy of Sciences Beijing 100049 China Key Laboratory for Micro-/Nano-Optoelectronic Devices of the Ministry of Education School of Physics and Electronics Hunan University Changsha 410082 China School of Information and Electronics MIIT Key Laboratory for Low-Dimensional Quantum Structure and Devices Beijing Institute of Technology Beijing 100081 China

Hall anomaly related to deviations in Hall carrier concentrations have always been recognized as signs of charge incoherence in organic semiconductors, which lack ordered lattices. In this paper, we show that the Hall carrier concentration anomaly in doped polymers might be a result of semimetallization. Based on the observation of semimetal-like states, a dual-channel model, in which electrons and holes compensate the Hall voltages of each other, is employed to account for the anomaly. Observations of possible nonlinear Hall effect and temperature dependent Hall signs further support the origin of Hall anomaly from semimetal states.

关键词： Anomalous Hall effect Hall effect Conducting polymers Density functional theory Electron spin resonance X-ray photoelectron spectroscopy

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A Spike-Event-Based Neuromorphic Processor with Enhanced On-Chip STDP Learning in 28nm CMOS

A Spike-Event-Based Neuromorphic Processor with Enhanced On-...

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IEEE International Symposium on circuits and Systems (ISCAS)

作者： Yi Zhong Xiaoxin Cui Yisong Kuang Kefei Liu Yuan Wang Ru Huang Key Laboratory of Microelectronics Devices and Circuits Institute of Microelectronics Peking University Beijing China

Event-based spiking neural network (SNN) has displayed a promising prospect to realize real-time, efficient and intelligent hardware platforms. Whereas great efforts are still being appealed to explore the possibility of introducing online learning abilities to neuromorphic systems. In this paper, a 28-nm CMOS neuromorphic processor is presented, fulfilling online learning by adopting counter and lookup table (LUT) based spike-timing-dependent plasticity (STDP) rule. Designed to work at high-precision scenarios, the presented processor integrates up to 1024 neurons and 256K signed 9-bit synapses. It also ensures chip array interconnection to fit large neural networks. Moreover, by utilizing the sparse property of spike events to minimize activity rate, the typical power consumption is further reduced to 3.348mW for training MNIST dataset.

关键词： Training Power demand Neuromorphics Table lookup System-on-chip Biological neural networks Synapses

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Switching at Less Than 60 mV/Decade with a “Cold” Metal as the Injection Source

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Physical Review Applied 2020年第6期13卷 064037-064037页

作者： Fei Liu Institute of Microelectronics and Key Laboratory of Microelectronics Devices and Circuits (MoE) Peking University Beijing 100871 China

Power dissipation is a great challenge for the continuous scaling down and performance improvement of CMOS technology, due to the thermionic-current switching limit of conventional MOSFETs. In this paper, we show that this problem can be overcome by using a “cold” metal as the injection source of a transistor; these metals are different from conventional metals and can filter out high-energy electrons to break the “Boltzmann tyranny.” It is proved that the subthreshold swing of the thermionic current of a transistor using a “cold”-metal contact can be much smaller than 60 mV/decade at room temperature. Specifically, the two-dimensional transition-metal-dichalcogenide (TMD) “cold” metals NbX2 and TaX2 (X=S,Se,Te) are proposed as injection sources for FETs. Quantum transport simulations indicate that a promising switching efficiency and on-state current can be achieved using TMD “cold”-metal injection sources, which is beneficial for energy efficiency.

关键词： Ballistic transport Band gap Thermionic emission Field-effect transistors Metals Transition metal dichalcogenides First-principles calculations

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A 256 Kbit Hf0.5Zr0.5O2-based FeRAM Chip with Scaled Film Thickness (sub-8nm), Low Thermal Budget (350oC), 100% Initial Chip Yield, Low Power Consumption (0.7 pJ/bit at 2V write voltage), and Prominent Endurance (>1012)

A 256 Kbit Hf0.5Zr0.5O2-based FeRAM Chip with Scaled Film Th...

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International Electron devices Meeting (IEDM)

作者： Pengfei Jiang Haijun Jiang Yang Yang Lu Tai Wei Wei Tiancheng Gong Yuan Wang Pan Xu Shuxian Lv Boping Wang Jianfeng Gao Junfeng Li Jun Luo Jianguo Yang Qing Luo Ming Liu State Key Laboratory of Fabrication Technologies for Integrated Circuits Institute of Microelectronics Chinese Academy of Sciences Beijing China Laboratory of Microelectronics Devices and Integrated Technology Institute of Microelectronics Chinese Academy of Sciences Beijing China Zhangjiang Lab Shanghai China School of Information Science and Engineering Shandong University Qingdao China

In this work, we successfully resolve the remanent polarization (P r ) degradation issue, which is caused by the thermal budget decreasing and the film thickness scaling of Hf 0.5 Zr 0.5 O 2 (HZO), and co-integrate the TiN/HZO/TiN capacitors with large initial P r and low operating voltage in the Back-End-of -Line (BEOL) of 130nm CMOS technology to provide a 256 Kbit 1T1C FeRAM chip. Firstly, we prove that the P r degradation is caused by the increasing component of anti-ferroelectric (AFE) phase. Then, utilizing the pre-crystallization engineering and O 3 treatment to the TiN bottom electrode (BE), not only the formation of t-phase is effectively suppressed, but also the required annealing temperature is reduced. The enhancement of ferroelectricity is related to the small thermal expansion of TiO 2 interface layer, which can induce large tensile stress to HZO during the annealing process. Moreover, the oxidization of TiN BE can prevent it absorbing oxygen from HZO, and the reduced oxygen vacancy (Vo) defects can improve both the retention and TDDB characteristics. Based on the above optimizations, the chip demonstrates 100% initial chip yield, >150mV sense margin after 10 12 write cycles, power consumption of 0.7 pJ/bit at 2V write voltage, over 10 12 endurance and 10 years retention.

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Two-dimensional materials for future information technology: status and prospects

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Science China(Information Sciences) 2024年第6期67卷 1-147页

作者： Hao QIU Zhihao YU Tiange ZHAO Qi ZHANG Mingsheng XU Peifeng LI Taotao LI Wenzhong BAO Yang CHAI Shula CHEN Yiqi CHEN Hui-Ming CHENG Daoxin DAI Zengfeng DI Zhuo DONG Xidong DUAN Yuhan FENG Yu FU Jingshu GUO Pengwen GUO Yue HAO Jun HE Xiao HE Jingyi HU Weida HU Zehua HU Xinyue HUANG Ziyang HUANG Ali IMRAN Ziqiang KONG Jia LI Qian LI Weisheng LI Lei LIAO Bilu LIU Can LIU Chunsen LIU Guanyu LIU Kaihui LIU Liwei LIU Sheng LIU Yuan LIU Donglin LU Likuan MA Feng MIAO Zhenhua NI Jing NING Anlian PAN Tian-Ling REN Haowen SHU Litao SUN Yue SUN Quanyang TAO Zi-Ao TIAN Dong WANG Hao WANG Haomin WANG Jialong WANG Junyong WANG Wenhui WANG Xingjun WANG Yeliang WANG Yuwei WANG Zhenyu WANG Yao WE... Department of Applied Physics The Hong Kong Polytechnic University Key Laboratory for Micro-Nano Physics and Technology of Hunan Province College of Materials Science and EngineeringHunan University College of Integrated Circuits Zhejiang University Shenzhen Geim Graphene Center Shenzhen Key Laboratory of Layered Materials for Value-Added ApplicationsTsinghua-Berkeley Shenzhen Institute & Institute of Materials ResearchTsinghua Shenzhen International Graduate SchoolTsinghua University State Key Laboratory of Extreme Photonics and Instrumentation College of Optical Science and EngineeringInternational Research Center for Advanced PhotonicsZijingang CampusZhejiang University National Key Laboratory of Materials for Integrated Circuits Shanghai Institute of Microsystem and Information TechnologyChinese Academy of Sciences CAS Key Laboratory of Nanophotonic Materials and Devices & Key Laboratory of Nanodevices and Applications i-LabSuzhou Institute of Nano-Tech and Nano-Bionics (SINANO)Chinese Academy of Sciences College of Chemistry and Chemical Engineering Hunan University Key Laboratory of Quantum State Construction and Manipulation (Ministry of Education) Department of PhysicsRenmin University of China School of Integrated Circuits Beijing National Research Center for Information Science and Technology (BNRist)Tsinghua University School of Electronic Science and Engineering Nanjing University The State Key Discipline Laboratory of Wide Band Gap Semiconductor Technology Shaanxi Joint Key Laboratory of GrapheneSchool of MicroelectronicsXidian University Key Laboratory of Artificial Micro- and Nano-Structures of Ministry of Education School of Physics and TechnologyWuhan University School of Integrated Circuits Huazhong University of Science and Technology Center for Nanochemistry (CNC) Beijing Science and Engineering Center for NanocarbonsBeijing National Laboratory for Molecular SciencesCollege of Chemistry and Molecular EngineeringPeking University State Key Laboratory for Artificial Microstruct

Over the past 70 years, the semiconductor industry has undergone transformative changes,largely driven by the miniaturization of devices and the integration of innovative structures and materials. Two-dimensional(2D) materials like transition metal dichalcogenides(TMDs) and graphene are pivotal in overcoming the limitations of silicon-based technologies, offering innovative approaches in transistor design and functionality, enabling atomic-thin channel transistors and monolithic 3D integration. We review the important progress in the application of 2D materials in future information technology, focusing in particular on microelectronics and optoelectronics. We comprehensively summarize the key advancements across material production, characterization metrology, electronic devices, optoelectronic devices, and heterogeneous integration on silicon. A strategic roadmap and key challenges for the transition of 2D materials from basic research to industrial development are outlined. To facilitate such a transition, key technologies and tools dedicated to 2D materials must be developed to meet industrial standards, and the employment of AI in material growth, characterizations, and circuit design will be essential. It is time for academia to actively engage with industry to drive the next 10 years of 2D material research.

关键词： two-dimensional (2D) materials information technology production technology standardization of characterization microelectronic devices optoelectronic devices multi-functional integration

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A 28-nm 0.34-pJ/SOP Spike-Based Neuromorphic Processor for Efficient Artificial Neural Network Implementations

A 28-nm 0.34-pJ/SOP Spike-Based Neuromorphic Processor for E...

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IEEE International Symposium on circuits and Systems (ISCAS)

作者： Yisong Kuang Xiaoxin Cui Yi Zhong Kefei Liu Chenglong Zou Zhenhui Dai Dunshan Yu Yuan Wang Ru Huang Key Laboratory of Microelectronics Devices and Circuits Peking University Beijing China

ISBN: (纸本)9781728192017;9781728192024

Neuromorphic hardware platforms inspired by human brain have emerged as novel non von Neumann computing architectures. They were proved excellent platforms for spiking neural network (SNN) implementations. However, implementing artificial neural networks (ANNs) on existing neuromorphic hardware platforms is still a daunting task because of critical limitations on coding scheme, maximum of fan-in, and highest weight precision in them. In this paper, we introduce a neuromorphic processor developed for various neural networks implementations including ANNs and SNNs. We employ spatio-temporal coding scheme based on spike events. By combining low-precision dendrites, the chip can implement weight precision between 1 bit and 8 bits and scalable fan-in. The 3.66-mm² chip fabricated in 28-nm CMOS with a maximum fan-in of 72 K per neuron demonstrates unprecedented compatibility with ANN applications compared to previously-proposed neuromorphic chips.

关键词： Neuromorphics Neurons Artificial neural networks Hardware Encoding Task analysis Biological neural networks

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Single-Electron Transistor Based on Cobalt Oxide

Single-Electron Transistor Based on Cobalt Oxide

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IEEE International Symposium on circuits and Systems

作者： Muchan Li Zhongzheng Tian Xuemin Yu Dacheng Yu Zhongyang Ren Liming Ren Yunyi Fu Key Laboratory of Microelectronic Devices and Circuits (MOE) Institute of Microelectronics Peking University Beijing P. R. China

In this paper, we propose and implement a single-electron transistor (SET) based on cobalt oxide for the first time. The SETs were fabricated through nanofabrication process compatible with the CMOS technology. A cobalt oxide (Co1-yO) on the surface of the source (S) and drain (D) Co electrodes is utilized to act as a quantum dot (QD). The diameter of QD is calculated to be 2.3 nm. The interface between Co1-yO and Co thin films (S/D electrodes) is used as tunneling junctions. The SET based on CoO exhibits typical single electron transport characteristics. Owing to the high Coulomb blockade energy (～180 meV), the Coulomb blockade regions still remain at room temperature (300 K), revealing the nanometer scale CoO-based SETs have great potential to operate at room temperature.

关键词： Electrodes Temperature Quantum dots Tunneling Cobalt Junctions Single electron transistors

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High-Speed, Low-Voltage, Small-Pitch and Robust Otft-Based Integrated Gate Driver for Active-Matrix Displays

SSRN

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SSRN 2023年

作者： Wu, Wanming Geng, Di Chen, Chuanke Chuai, Xichen Li, Shuai Lu, Nianduan Li, Ling State key Lab of Fabrication Technologies for Integrated Circuits Institute of Microelectronics Chinese Academy of Sciences Beijing100029 China Laboratory of Microelectronics Devices and Integrated Technology Institute of Microelectronics Chinese Academy of Sciences Beijing100029 China University of Chinese Academy of Sciences Beijing100049 China

We design and fabricate a high-speed, low-voltage, small-pitch and robust integrated gate driver with organic thin-film transistors (OTFTs). The dual-gate OTFT devices have a field effect mobility of 0.78cm2/Vs, and on/off current ratio of above 108. A single stage of the gate driver consists of ten TFTs and two capacitors, with small pitch of 244μm. The fabricated circuit can output minimum pulse width of 5μs, which is compatible to full-high definition (FHD, 1,920×1,080) active-matrix displays with 60Hz frame rate. It can work at input swing of as low as 10V, with VGH2, VGH1 and VGL of 5V, 0V and -10V respectively. With the threshold voltage shift under positive and negative bias stress, the driver shows output signals without significant degradation and demonstrates its high reliability through simulation. © 2023, The Authors. All rights reserved.

关键词： Thin film transistors

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A Gm-Compensated 46-101 GHz Broadband Power Amplifier for High-Resolution FMCW Radars

A Gm-Compensated 46-101 GHz Broadband Power Amplifier for Hi...

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IEEE International Symposium on circuits and Systems

作者： Dong Wang Zhengkun Shen Xiaolei Su Zexue Liu Yi Tan Chen Xu Junhua Liu Huailin Liao Key Laboratory of Microelectronic Devices and Circuits (MOE) Peking University Beijing China

A Gm-compensated 46-101 GHz broadband power amplifier (PA) for high-resolution FMCW radars is presented in this paper. For bandwidth (BW) expanding, a Gm compensator-based negative feedback chain is applied to the PA, compensating the large gain ripple caused by a high-k transformer (TF)-based ultra-wideband interstage matching network (IMN). Based on the proposed Gm-compensated technique, a flat and ultra-wideband power gain of the PA can be obtained with the high-k TF-based IMN. The proposed PA achieves a 55-GHz BW without additional area overhead and efficiency loss. 74.8% of the fractional BW is obtained with <;0.3 dB gain ripple in 53-92 GHz. The PA reaches 17.1 dBm Psat and 27% peak PAE respectively, and the core area of the proposed PA in TSMC 40nm CMOS process is 0.1mm~2.

关键词： Negative feedback Broadband amplifiers Power amplifiers Radar imaging High-k dielectric materials Gain Ultra wideband technology

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