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A 6.6-GHz Dual-Path Reference-Sampling PLL With 139.6-fs RMS Jitter and −75.2-dBc Spur in 28-nm CMOS

Electronics Letters 2025年第1期61卷

作者： Kang, Yanzhe Ren, Hongyu Yang, Zunsong Huang, Yunbo Cheng, Kai Chen, Tianle Zhan, Yongzheng Zhang, Zhao Luo, Jiajun Li, Bo Institute of Microelectronics of the Chinese Academy of Sciences Beijing China University of Chinese Academy of Sciences Beijing China Key Laboratory of Science and Technology on Silicon Devices Chinese Academy of Sciences Beijing China Shandong Yunhai Guochuang Cloud Computing Equipment Industry Innovation Co. Ltd. Jinan China Institute of Semiconductors Chinese Academy of Sciences Beijing China

This paper presents a dual-path reference-sampling phase-locked loop (RSPLL) with low RMS jitter, low reference spur, and compact area. To suppress the high in-band phase noise from the GM, an octuple-sampling phase detector is used to enhance the phase detection gain. To lower the loop filter area in the conventional single-path type-II RSPLL, a dual-path loop architecture is introduced to greatly reduce the integrating capacitor. In addition, by combining a low-power retimer-less multi-modulus divider and clock generator, the overall power efficiency of the RSPLL is improved. The proposed RSPLL is implemented in a 28-nm CMOS process. With a 100-MHz input reference, the prototype achieves 139.6-fs root-mean-square (RMS) jitter (1 kHz-100 MHz), −75.2-dBc reference spur and −250.5-dB figures-of-merit (FOM). © 2025 The Author(s). Electronics Letters published by John Wiley & Sons Ltd on behalf of The Institution of Engineering and technology.

关键词： CMOS integrated circuits

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Broad-band direct QPSK modulator/demodulator for wireless gigabit communication

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Chinese Science Bulletin 2013年第3期58卷 427-432页

作者： CAO YuXiong WU DanYu LIU XinYu JIN Zhi Institute of Microelectronics Chinese Academy of Sciences Key Laboratory of Microelectronics Devices & Integrated Technology Institute of MicroelectronicsChinese Academy of Sciences

The design and measured results of a broad-band direct quadrature phase shift keying(QPSK) modulator and demodulator are described in this *** circuits are fabricated using 1-m GaAs HBT *** suppress the local oscillator(LO) leakage,the double-balanced mixer is selected as the core unit in the modulator/*** embedded four-way quadrature divider which includes a Lange coupler and two Baluns is utilized in the system to generate quadrature-phase LO *** results of a back-to-back test,the system can operate at data rates in excess of 2 Gb/s(1 Gb/s per I and Q channels) at 30 *** supplies of the modulator and demodulator are 5.0 V and 4.5 V with size of 1.35 mm×3.5 mm and 1.36 mm×3.4 mm,respectively.

关键词： QPSK调制器解调器正交相移键控无线宽带双平衡混频器本地振荡器平衡转换器

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Fabrication and Characterization of Si Nanocrystals Synthesized by Electron Beam Evaporation of Si and SiO2 Mixture

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中国物理快报（英文版） 2009年第4期26卷 182-185页

作者： LI Wei-Long JIA Rui LIU Ming CHEN Chen XIE Chang-Qing ZHU Chen-Xin LI Hao-Feng ZHANG Pei-Wen YE Tian-Chun Key Laboratory of Nanofabrication and Novel Devices Integrated Technology Institute of MicroelectronicsChinese Academy of SciencesBelting 100029

Silicon nanocrystals synthesized by electron beam (e-beam) evaporation of Si and SiO2 mixture are studied. Rutherford backscattering spectrometry of the as-deposited Si-rich silicon dioxide or oxide (SRO) thin film shows that after evaporation, the Si and SiO2 concentration is well kept, indicating that the e-beam evaporation is suitable for evaporating mixtures of Si and SiO2. The SRO thin films are annealed at different temperatures for two hours to synthesize silicon nanocrystals. For the sample annealed at 1050℃, silicon nanocrystals with different sizes and the mean diameter of 4.5 nm are evidently observed by high resolution transmission electron microscopy (HRTEM). Then the Raman scattering and photoluminescence spectra arising from silicon nanocrystals are further confirmed the above results.

关键词： Silica

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Gate-Recessed AlGaN/GaN MOSHEMTs with the Maximum Oscillation Frequency Exceeding 120 GHz on Sapphire Substrates

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Chinese Physics Letters 2012年第7期29卷 280-283页

作者： KONG Xin WEI Ke LIU Guo-Guo LIU Xin-Yu Microwave Devices and Integrated Circuits Department Key Laboratory of Microelectronics Device and Integrated TechnologyInstitute of MicroelectronicsChinese Academy of SciencesBeijing 100029

Gate-recessed AlGaN/GaN metal-oxide-semiconductor high electron mobility transistors (MOSHEMTs) on sapphire substrates are *** devices with a gate length of 160nm and a gate periphery of 2 × 75μmexhibit two orders of magnitude reduction in gate leakage current and enhanced off-state breakdown characteristics,compared with conventional ***,the extrinsic transconductance of an MOSHEMT is 237.2mS/mm,only 7% lower than that of Schottky-gate *** extrinsic current gain cutoff frequency fT of 65 GHz and a maximum oscillation frequency fmax of 123 GHz are deduced from rf small signal *** high fmax demonstrates that gate-recessed MOSHEMTs are of great potential in millimeter wave frequencies.

关键词： AlGaN/GaN MOSHEMT millimeter

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A portable, low-cost real-time imaging slab gel electrophoresis system for rapid separation of nucleic acids

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Sensors and Actuators B: Chemical 2025年 440卷

作者： Luo, Kan Chen, Yu Fan, Min Li, Jianxing Wang, Wu School of electronic Electrical engineering and Physics Fujian University of Technology Fuzhou350118 China Fuzhou Industrial Integration Automation Technology Innovation Center Fuzhou350118 China School of Mechanical and Automotive Engineering Fujian University of Technology Fuzhou350118 China Fujian Provincial Key Laboratory for Advanced Micro-nano Photonics Technology and Devices Institute for Photonics Technology Quanzhou Normal University Quanzhou362000 China College of Electrical Engineering and Automation Fuzhou University Fuzhou350108 China

Background: Slab gel electrophoresis (SGE) remains fundamental to biomedical research but faces limitations for point-of-care testing due to its large footprint, operational inefficiencies, and lack of real-time imaging capabilities. Methods: We developed a portable, real-time imaging SGE system featuring a compact and modular design. The system integrates a 3D-printed SGE tank with embedded quartz glass plates that facilitate fluorescence imaging and efficient heat dissipation, ensuring stable operation under high electric fields without significant temperature rise. A uniform LED panel provides consistent, high-quality excitation, while a smartphone-based detection module with an optical filter enables real-time monitoring of fluorescent bands across a large imaging area (100 × 60 mm²). Results: The SGE system offers efficient passive heat dissipation and enables sensitive fluorescence-based DNA detection, with a detection limit as low as 0.07 ng/μL and a linear range of 0.08–10.00 ng/μL. It supports a throughput of 12 samples per run. Its compact size (108 × 108 × 60 mm3), light weight (0.7 kg), and low cost (∼ $65) ensure both portability and affordability. We have successfully applied the prototype to screen genes (CERK1 and CEBiP), achieving a reduced electrophoresis runtime of 12 min at 100 V while enabling real-time band tracking. Significance: Our portable SGE system addresses critical limitations of traditional systems through its integrated design, large imaging area, high efficiency, and cost effectiveness. The open source platform enables both accessibility in developing regions and extensibility to diverse molecular detection applications. The established engineering approaches offer a generalizable reference for developing similar devices. © 2025 Elsevier B.V.

关键词： Molecular imaging

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High-Mobility P-Type MOSFETs with Integrated Strained-Si_(0.73)Ge_(0.27) Channels and High-κ/Metal Gates

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Chinese Physics Letters 2016年第11期33卷 127-130页

作者：毛淑娟朱正勇王桂磊朱慧珑李俊峰赵超 Integrated Circuit Advanced Process Center Institute of MicroelectronicsChinese Academy of Sciences Key Laboratory of Microelectronics Devices & Integrated Technology Institute of MicroelectronicsChinese Academy of Sciences

Strained-Si0.73Ge0.27 channels are successfully integrated with high-R/metal gates in p-type metai-oxide- semi- conductor field effect transistors （pMOSFETs） using the replacement post-gate process. A silicon cap and oxide inter layers are inserted between Si0.73Ge0.27 and high-κ dielectric to improve the interface. The fab- ricated Si0.73Ge0.27 pMOSFETs with gate length of 3Onto exhibit good performance with high drive current （~428μA/μm at VDD = 1 V） and suppressed short-channel effects （DIBL^77mV/V and SS^90mV/decade）. It is found that the enhancement of effective hole mobility is up to 200% in long-gate-length Si0.73Ge0.27-channel pMOSFETs compared with the corresponding silicon transistors. The improvement of device performance is reduced due to strain relaxation as the gate length decreases, while 26% increase of the drive current is still obtained for 30-nm-gate-length Si0.73Ge0.27 devices.

关键词： with is Channels and High Metal Gates High-Mobility P-Type MOSFETs with Integrated Strained-Si Ge of in

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Physical investigation of subthreshold swing degradation behavior in negative capacitance FET

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Science China(Information Sciences) 2022年第6期65卷 241-246页

作者： Mengxuan YANG Qianqian HUANG Kaifeng WANG Chang SU Liang CHEN Yangyuan WANG Ru HUANG Key Laboratory of Microelectronic Devices and Circuits (MOE) Institute of MicroelectronicsPeking University Beijing Laboratory of Future IC Technology and Science Peking University

Power consumption has become one of the bottlenecks limiting the future development of integrated circuits. Tunnel FETs(TFETs) and negative capacitance FETs(NCFETs) can break the subthreshold swing limitation(60 mV/dec at room temperature) of conventional metal-oxide-semiconductor field-effect transistor(MOSFET) to reduce the operating voltage and thus power consumption. However, induced by the band-to-band tunneling mechanism, TFETs have a subthreshold swing degradation issue and relatively low ON current. Although NCFETs with ferroelectric/dielectric gate stack can theoretically maintain a high ON current comparable to conventional MOSFET, the physical origin of sub-60 SS is controversial and the mechanism of switching behavior in NCFET is still not clear. In this work, by experimentally investigating the whole negative differential capacitance process and its gate voltage amplification coefficient, an intrinsic issue of SS degradation with increased gate voltage is also found in NCFET for the first time. Based on the physical investigation and simulation results, it is shown that the intrinsic SS degradation in NCFET is resulting from the instant dielectric polarization response. Both the decrease of dielectric thickness and the increase of dielectric constant may lead to the severer SS degradation, which is not favorable for scaled NCFETs.

关键词： ferroelectric negative differential capacitance effect polarization low power voltage amplification

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Ultra high-speed InP/InGaAs SHBTs with f_t and f_(max) of 185 GHz

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Journal of Semiconductors 2010年第9期31卷 41-44页

作者：周磊金智苏永波王显泰常虎东徐安怀齐鸣 Institute of Microelectronics Chinese Academy of Sciences Key Laboratory of Microelectronics Devices & Integrated Technology Institute of MicroelectronicsChinese Academy of Sciences Shanghai Institute of Microsystem and Information Technology Chinese Academy of Sciences

An InP/InGaAs single heterojunction bipolar transistor（SHBT） with high maximum oscillation frequency （fmax） and high cutoff frequency（ft） is *** have been made to maximize f（max） and ft simultaneously including optimizing the epitaxial structure,base-collector mesa over-etching and base surface *** measured ft and fmax both reached 185 GHz with an emitter size of 1×20μm^2,which is the highest f_（max） for SHBTs in China's *** device is suitable for ultra-high speed digital circuits and low power analog applications.

关键词： InP single heterojunction bipolar transistor maximum oscillation frequency

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Hysteresis analysis of graphene transistor under repeated test and gate voltage stress

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Journal of Semiconductors 2014年第9期35卷 45-49页

作者：杨杰贾昆鹏粟雅娟陈阳赵超 Key Laboratory of Microelectronics Devices and Integrated Technology Institute of Microelectronics Chinese Academy of Sciences College of Science China University of Petroleum

The current transport characteristic is studied systematically based on a back-gate graphene field effect transistor, under repeated test and gate voltage stress. The interface trapped charges caused by the gate voltage sweep process screens the gate electric field, and results in the neutral point voltage shift between the forth and back sweep direction. In the repeated test process, the neutral point voltage keeps increasing with test times in both forth and back sweeps, which indicates the existence of interface trapped electrons residual and accumulation. In gate voltage stress experiment, the relative neutral point voltage significantly decreases with the reducing of stress voltage, especially in -40 V, which illustrates the driven-out phenomenon of trapped electrons under negative voltage stress.

关键词： graphene FET interface trap electrical measurement repeated test stress

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Hetero-Epitaxy and Self-Adaptive Stressor Based on Freestanding Fin for the 10 nm Node and Beyond

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Chinese Physics Letters 2017年第7期34卷 279-282页

作者：万光星王桂磊朱慧珑 Key Laboratory of Microelectronics Devices and Integrated Technology Institute of Microelectronics Chinese Academy of Sciences Beijing 100029 University of Chinese Academy of Sciences Beijing 100049

A promising technology named epitaxy on nano-scale freestanding fin （ENFF） is firstly proposed for hetero- epitaxy. This technology can effectively release total strain energy and then can reduce the probability of gener- ating mismatch dislocations. Based on the calculation, dislocation defects can be eliminated completely when the thickness of the Si freestanding fin is less than 10nm for the epitaxial Ge layer. In addition, this proposed ENFF process can provide sufficient uniaxial stress for the epitaxy layer, which can be the major stressor for the SiGe or Ge channel fin field-effect transistor or nanowire at the 10nm node and beyond. According to the results of technology computer-aided design simulation, nanowires integrated with ENFF show excellent electrical perfor- mance for uniaxial stress and band offset. The ENFF process is compatible with the state of the art mainstream technology, which has a good potential for future applications.

关键词： Hetero-Epitaxy and Self-Adaptive Stressor Based on Freestanding Fin for the 10 nm Node and Beyond

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