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2011 International Symposium on Integrated circuits, ISIC 2011

作者： Wen, Jincai Lou, Jia Sun, Lingling Key Laboratory for RF Circuits and Systems of Ministry of Education Hangzhou Dianzi University Hangzhou 310018 China

ISBN: (纸本)9781612848648

This paper presents a vertical-ground-plane coplanar waveguide (VGP-CPW) line with P implant, and compared the characteristic parameters of transmission line with the general VGP-CPW structures. The ground plane connected to the substrate makes the proposed CPW line have higher isolation and lower characteristic impedance. The physical model of the VGP-CPW with P+ implant is presented as well as the general VGP-CPW line. Two different structures of transmission lines are fabricated in 65 nm 1P8M rf CMOS process and models are verified by the measured S-parameters up to 50 GHz. © 2011 IEEE.

关键词： Coplanar waveguides

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Small-signal modeling and parameter extraction method for a multigate GaAs pHEMT switch

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Journal of Semiconductors 2020年第3期41卷 7-12页

作者： Lin Luo Jun Liu Guofang Wang Yuxing Wu Key Laboratory of RF Circuits and Systems Ministry of Education Hangzhou Dianzi University

This paper presents an accurate small-signal model for multi-gate GaAs pHEMTs in *** extraction method for the proposed model is developed.A 2-gate switch structure is fabricated on a commercial 0.5μm AlGaAs/GaAs pHEMT technology to verify the proposed *** agreement has been obtained between the measured and simulated results over a wide frequency range.

关键词： GaAs pHEMTs switch small-signal model parameter extraction

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A study of the effect of shallow trench isolation technology on MOSFET DC characteristic

A study of the effect of shallow trench isolation technology...

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2011 International Symposium on Integrated circuits, ISIC 2011

作者： Fang, Xia Sun, Lingling Liu, Jun Wang, Huang Key Laboratory for RF Circuits and Systems of Ministry of Education Hangzhou Dianzi University Hangzhou 310037 China

ISBN: (纸本)9781612848648

An investigation of the effect of Shallow trench isolation (STI) technology on DC characteristic is presented. STI parameter of SA/SB impact on device characteristic is mainly considered, and discovered the small width device has different variation trench. Through comparing Agilent ICCAP simulation data with experimental data wafers fabricated using SMIC 0.13μm technology find that BSIM4 STI model is very well to fit all size devices except small width device. We design eight active lengths (i.e. SA = 0.4μm, 0.8μm, 1.2μm, 1.6μm, 2.0μm, 2.4μm, 2.8μm and 3.2μm, and SA=SB) both PMOS and NMOS. Dependence of threshold voltage (Vth) on SA/SB is shown. © 2011 IEEE.

关键词： Threshold voltage

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A 80∼101GHz Amplifier in 65nm CMOS process 11

A 80∼101GHz Amplifier in 65nm CMOS process

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11th UK-Europe-China Workshop on Millimeter Waves and Terahertz Technologies, UCMMT 2018

作者： Su, Zemin Su, Guodong Liu, Xiandong Lei, Yuchao Su, Zeqi Qiu Jiangtao Sun, Lingling Key Laboratory for RF Circuits and Systems Hangzhou Dianzi University Ministry of Education Hangzhou310018 China

ISBN: (纸本)9781538674970

This paper presents an 80∼101GHz low-noise amplifier (LNA) with 65-nm CMOS process. The first stage of the proposed low noise amplifier employs a novel amplifier structure to improve the noise figure and gain, which consists of a cascode amplifier and a feedback loop. The other stages are employed the cascode amplifier with gain improvement technique to improve the gain. The simulation results show that the LNA can provide a gain of 17dB with a 3 dB bandwidth of 21 GHz. With 1.2-V power supply, the LNA consumes 24-mW power consumption. Furthermore, the LNA achieves minimum noise figure (NF) of 6.5 dB at 90 GHz and NF of 6.5∼8.0 dB within a 3 dB gain bandwidth. © 2018 IEEE.

关键词： Low noise amplifiers

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A variable gain and output power CMOS PA with combination switch controls

A variable gain and output power CMOS PA with combination sw...

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2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology

作者： Wen, Jin-Cai Sun, Ling-Ling Key Laboratory of RF Circuits and Systems Ministry of Education Hangzhou Dianzi University Hangzhou 310018 China

ISBN: (纸本)9781424457984

A variable gain and output power CMOS power amplifier is presented in this paper. With combination switch controls of three cascode devices in the driver stage, the power amplifier can achieve a variable power gain and output power (seven types). The power amplifier was fabricated in 0.35-μm standard CMOS process, and is able to deliver a power gain of 10.5-27 dB and an output P1dB (1-dB compression point) of 9.3-20.3dBm together with a PAE (power-added- efficiency) of 4.1-36.5% at 915MHz frequency and 3.3V supply respectively. ©2010 IEEE.

关键词： Power amplifiers

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Scalable Gummel-Poon model for high-speed SiGe HBTs

Scalable Gummel-Poon model for high-speed SiGe HBTs

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Asia Pacific Conference on Postgraduate Research in Microelectronics & Electronics (PrimeAsia)

作者： Zhou, Weijian Cheng, Zhiqun Liu, Jun Key Laboratory of RF Circuits and Systems Ministry of Education Hangzhou Dianzi University Hangzhou 310018 China

ISBN: (纸本)9781424467372

A scalable Gummel-Poon model for high-speed SiGe HBTs is developed based on Gummel-Poon model in this paper. This model is well applied to simulation software of ADS and Hspice. The scaling is mainly based on different physical dimension of individual devices, all the scaling parameters in the scaling equations are extracted directly from the measurement data of various dimension. The correctness of this scalable model is further verified by the quite good fit between measured and simulated results on DC, CV, Ft and S parameters at the frequency up to 30 GHz.

关键词： Scattering parameters

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A 4-9 GHz LNA With Out-of-Band Gain Rejection Method 16

A 4-9 GHz LNA With Out-of-Band Gain Rejection Method

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16th UK-Europe-China Workshop on Millimetre Waves and Terahertz Technologies, UCMMT 2023

作者： Sun, Dengbao Wang, Xiang Huang, Yonkang Su, Guodong Liu, Jun Hangzhou Dianzi University Key Laboratory for RF Circuits and Systems Ministry of Education Hangzhou310018 China

ISBN: (纸本)9798350339406

This paper proposed a 4-9GHz Low noise amplifier (LNA) which is based on 0.25-μm GaAs pHEMT process. The proposed LNA adopts a method to achieve better out-of-band gain rejection performance. This method is realized by adjusting the reactance characteristic of the inductor used in the matching network. The post-layout simulation results show that the 3dB bandwidth is 2.9-10.6GHz. In the design band (4-9GHz), the gain is of 26.5±0.4 dB, the noise figure is of 0.91 ~ 1.22 dB, and the output P-1dB is of 13.7 ~ 17 dBm respectively. The proposed LNA has a compact chip size of only 1.44 mm2, including all DC and rf pads. © 2023 IEEE.

关键词： Low noise amplifiers

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A sample-and-hold circuit for 10-bit 100MS/s pipelined ADC

A sample-and-hold circuit for 10-bit 100MS/s pipelined ADC

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2011 IEEE 9th International Conference on ASIC, ASICON 2011

作者： Wang, Haitao Hong, Hui Sun, Lingling Yu, Zhiping Key Laboratory for RF Circuits and Systems of Ministry of Education Hangzhou Dianzi University Hangzhou 310037 China

ISBN: (纸本)9781612841908

In this paper a fully differential sample-and-hold (S/H) circuit for the pipelined analog-to-digital converter (ADC) was presented. The S/H circuit is based on capacitor flip-around S/H architecture with gain-boosted differential folded cascode operational transconductance amplifier (OTA), which can achieve high DC gain and large bandwidth. Bootstrapped switch and bottom plate sampling techniques are used to reduce the nonlinear distortion. The entire S/H circuit was designed in CSMC 1.8V/3.3V 0.18μm 1P6M CMOS technology. Simulation results show the S/H circuit achieves SNDR of 84dB, ENOB of 13.7, THD of -85dB, and SFDR of 85.4dB at the input frequency 9.86328125M Hz, which is suitable for a 10bit 100MS/s pipelined ADC. © 2011 IEEE.

关键词： Operational amplifiers

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Estimation of Drain-Induced Barrier Lowering Variation Due to Random Dopant Fluctuation Effect in Nanometer MOSFETs by Gamma Distribution 13

Estimation of Drain-Induced Barrier Lowering Variation Due t...

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13th International Conference on Electronics, Communications and Networks, CECNet 2023

作者： Lyu, Weifeng Han, Ying Zhang, Caiyun Wei, Weijie Chen, Dengke Key Laboratory for RF Circuits and Systems of Ministry of Education Hangzhou Dianzi University Hangzhou310018 China

ISBN: (纸本)9781643684802

Drain-induced barrier lowering (DIBL) and its variations are regarded as significant challenges in nanometer semiconductor device and circuit analysis, design as well as fabrication. This paper investigates the statistical characteristic of DIBL due to random dopant fluctuation (RDF) effect in MOSFETs. The results exhibit that the DIBL variation is more suitably described by a gamma distribution than a Gaussian distribution, based on validation by Monte Carlo simulations. The average error and mean square error of a gamma approximation are -0.14987 and 0.42591, respectively, for the probability density function, and 0.13523 and 0.50584, respectively, for the cumulative density function, which are much smaller than the equivalent measures of a Gaussian approximation. Our study also reveals that DIBL dispersion due to RDF effect in nanometer MOSFET channels is asymmetric with a long tail, which should be described with higher moments such as skewness and kurtosis. © 2024 The authors and IOS Press.

关键词： Monte Carlo methods

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Ballistic effect and application in circuit design of wide band-gap semiconductor

Ballistic effect and application in circuit design of wide b...

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International Conference on Machine Tool Technology and Mechatronics Engineering, ICMTTME 2014

作者： Lian, Xin Xiang Cheng, Zhi Qun Jia, Min Shi Key Laboratory of RF Circuits and Systems of Ministry of Education Hangzhou Dianzi University HangzhouZhejiang China

ISBN: (纸本)9783038352464

With manufacturing technology innovation and progress of electronic devices of semiconductors, dimensions of electronic devices get smaller nowadays. There has been processing of 90nm and 20nm in production. With in-depth research, scientists are more and more interested in molecular devices. Since the size of molecular devices is small, electrons transfer by ballistic transport. In semiconductor devices, when the transport distance is at micrometer or smaller sizes, the ballistic transport phenomena of electrons and holes of carriers occur. This transfer form is not affected by lattice defects, doping, and interaction of crystal interfaces. Since there is no interference of these interactions, carrier’s velocity can be faster several times than common electronic devices, resulting in the doubled operating speed of these devices. Although it is difficult to achieve pure ballistic transport, when the size of semiconductor devices is close to the mean free path of carriers, the speed of carriers will still be greatly improved. © (2014) Trans Tech Publications, Switzerland.

关键词： Timing circuits

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