检索结果-内蒙古大学图书馆

A comparative study of methodologies for designing IDSSs

EUROPEAN JOURNAL OF OPERATIONAL RESEARCH 1997年第2期103卷 277-295页

作者： Blair, A Debenham, J Edwards, J Intelligent Decision Support System Laboratory Key Centre for Advanced Computing Studies School of Computing Sciences University of Technology P.O. Box 123 Broadway N.S.W. 2007 Australia

In this paper, we describe a comprehensive study conducted to understand the methodologies which are being used to design Intelligent Decision Support systems (IDSSs) and to identify the key methodological problems and benefits with using these methodologies. This comprehensive study consists of two parts. The first part is two surveys which together identify the design methodologies being used by a group of IDSS developers and how acceptable they believe their methodologies were for designing their IDSSs. The second part is a comparison of six major formal IDSS design methodologies recently published in the literature and which are not yet known to many developers. This paper is presented to assist IDSS developers in understanding what support can be gained from using existing design methodologies and hence choose the correct one for their project. Furthermore, the paper may be used by IDSS developers to compare the way that they work with the approach proposed by other developers. (C) 1997 Elsevier Science B.V.

关键词： decision support systems knowledge based systems intelligent decision support systems

来源：评论

学校读者我要写书评

暂无评论

Verifying a Carry Look-Ahead Adder with Propositional Projection Temporal Logic

引用

电子学报(英文版) 2013年第1期22卷 21-24页

作者： ZHANG Nan DUAN Zhenhua TIAN Cong Institute of Computing Theory and Technology Xidian University Xi'an 710071 China National Key Laboratory on Integrated Services Network Xidian University Xi'an 710071 China

This paper presents a case study for veri- fying a carry look-ahead adder using the axiom system of Propositional projection temporal logic (PPTL). To this end, the syntax, semantics and axiom system of PPTL are briefly introduced. Further, functions and architectures of the carry look-ahead adder are presented. In addition, four lemmas are proved with the axiom system of PPTL. Fi- nally, the correctness of the adder is verified based on the lemmas and the axiom system of PPTL. The case study shows that the axiom system for PPTL is workable.

关键词：时序逻辑加法器进位验证投影命题公理系统体系结构

来源：评论

学校读者我要写书评

暂无评论

Fault Tolerance Mechanism in Chip Many-Core Processors

引用

Tsinghua Science and technology 2007年第S1期12卷 169-174页

作者：张磊韩银和李华伟李晓维 Key Laboratory of Computer System and Architecture Institute of Computing TechnologyChinese Academy of Sciences Graduate University of Chinese Academy of Sciences Beijing 100080China

As semiconductor technology advances, there will be billions of transistors on a single chip. Chip many-core processors are emerging to take advantage of these greater transistor densities to deliver greater performance. Effective fault tolerance techniques are essential to improve the yield of such complex chips. In this paper, a core-level redundancy scheme called N+M is proposed to improve N-core processors’ yield by providing M spare cores. In such architecture, topology is an important factor because it greatly affects the processors’ performance. The concept of logical topology and a topology reconfiguration problem are introduced, which is able to transparently provide target topology with lowest performance degradation as the presence of faulty cores on-chip. A row rippling and column stealing (RRCS) algorithm is also proposed. Results show that PRCS can give solutions with average 13.8% degradation with negligible computing time.

关键词： chip many-core processors yield fault tolerance reconfiguration network-on-chip

来源：评论

学校读者我要写书评

暂无评论

A New ETL Approach Based on Data Virtualization

引用

Journal of Computer Science & technology 2015年第2期30卷 311-323页

作者：郭树盛袁子牧孙傲冰岳强 State Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing 100190 China University of Chinese Academy of Sciences Beijing 100190 China Cloud Computing Center Chinese Academy of Sciences Dongguan 523808 China

ETL （Extract-Transform-Load） usually includes three phases： extraction, transformation, and loading. In building data warehouse, it plays the role of data injection and is the most time-consuming activity. Thus it is necessary to improve the performance of ETL. In this paper, a new ETL approach, TEL （Transform-Extract-Load） is proposed. The TEL approach applies virtual tables to realize the transformation stage before extraction stage and loading stage, without data staging area or staging database which stores raw data extracted from each of the disparate source data systems. The TEL approach reduces the data transmission load, and improves the performance of query from access layers. Experimental results based on our proposed benchmarks show that the TEL approach is feasible and practical.

关键词： cloud computing big data ETL heterogeneous database data virtualization

来源：评论

学校读者我要写书评

暂无评论

A reconfigurable index FLASH memory tailored to seed-based genomic sequence comparison algorithms

引用

Journal of VLSI Signal Processing systems for Signal, Image, and Video technology 2007年第3期48卷 255-269页

作者： Lavenier, D. Georges, G. Liu, X. IRISA/CNRS Campus de Beaulieu Rennes 35042 France Key Laboratory of Computer System and Architecture Institute of Computing Technology CAS Beijing China

Genomic sequence comparison algorithms represent the basic toolbox for processing large volume of DNA or protein sequences. They are involved both in the systematic scan of databases, mostly for detecting similarities with an unknown sequence, and in preliminary processing before advanced bioinformatics analysis. Due to the exponential growth of genomic data, new solutions are required to keep the computation time reasonable. This paper presents a specific hardware architecture to speed-up seed-based algorithms which are currently the most popular heuristics for detecting alignments. The architecture regroups FLASH and FPGA technologies on a common support, allowing a large amount of data to be rapidly accessed and quickly processed. Experiments on database search and intensive sequence comparison demonstrate a good cost/performance ratio compared to standard approaches. © 2007 Springer Science + Business Media, LLC.

关键词： Flash memory

来源：评论

学校读者我要写书评

暂无评论

A VLIW Architecture Stream Cryptographic Processor for Information Security

引用

China Communications 2019年第6期16卷 185-199页

作者： Longmei Nan Xuan Yang Xiaoyang Zeng Wei Li Yiran Du Zibin Dai Lin Chen ASIC&System State Key Laboratory of Fudan University Shanghai 201203China Institute of Information Science and Technology Zhengzhou 450001China Jiangnan Institute of Computing Technology WuXi 214083China

As an important branch of information security algorithms,the efficient and flexible implementation of stream ciphers is *** implementation methods,such as FPGA,GPP and ASIC,provide a good support,but they could not achieve a better tradeoff between high speed processing and high *** has fast processing speed,but its flexibility is poor,GPP has high flexibility,but the processing speed is slow,FPGA has high flexibility and processing speed,but the resource utilization is very *** paper studies a stream cryptographic processor which can efficiently and flexibly implement a variety of stream cipher *** analyzing the structure model,processing characteristics and storage characteristics of stream ciphers,a reconfigurable stream cryptographic processor with special instructions based on VLIW is presented,which has separate/cluster storage structure and is oriented to stream cipher *** proposed instruction structure can effectively support stream cipher processing with multiple data bit widths,parallelism among stream cipher processing with different data bit widths,and parallelism among branch control and stream cipher processing with high instruction level parallelism;the designed separate/clustered special bit registers and general register heaps,key register heaps can satisfy cryptographic *** the proposed processor not only flexibly accomplishes the combination of multiple basic stream cipher operations to finish stream cipher *** has been implemented with 0.18μm CMOS technology,the test results show that the frequency can reach 200 MHz,and power consumption is 310 *** kinds of stream ciphers were realized in the *** key stream generation throughput of Grain-80,W7,MICkey,ACHTERBAHN and Shrink algorithm is 100 Mbps,66.67 Mbps,66.67 Mbps,50 Mbps and 800 Mbps,*** test result shows that the processor presented can achieve good tradeoff between high performance and flexibili

关键词： stream cipher VLIW architecture processor reconfigurable application-specific instruction-set

来源：评论

学校读者我要写书评

暂无评论

Macro liveness graph and liveness of ω-independent unbounded nets

引用

Science China(Information Sciences) 2015年第3期58卷 132-141页

作者： WANG ShouGuang GAN MengDi ZHOU MengChu School of Information and Electronic Engineering Zhejiang Gongshang University Key Laboratory of Embedded System and Service Computing Ministry of EducationTongji University Department of Electrical and Computer Engineering New Jersey Institute of Technology

Liveness is a basic property of a system and the liveness issue of unbounded Petri nets remains one of the most difficult problems in this *** work proposes a novel method to decide the liveness of a class of unbounded generalized Petri nets calledω-independent unbounded nets,breaking the existing limits to one-place-unbounded *** algorithm to construct a macro liveness graph(MLG)is developed and a critical condition based on MLG deciding the liveness ofω-independent unbounded nets is *** are provided to demonstrate its effectiveness.

关键词： discrete event system(DES) Petri nets complex systems liveness property analysis

来源：评论

学校读者我要写书评

暂无评论

Finite-Time Synchronization of Nonlinearly Coupled systems With Delay 35

Finite-Time Synchronization of Nonlinearly Coupled Systems W...

引用

第35届中国控制会议

作者： LIU Xiwei LI Ping Department of Computer Science and Technology Tongji University Key Laboratory of Embedded System and Service Computing Ministry of Education

ISBN: (纸本)9789881563910

In this paper, we consider a general and practical complex network model, in which there exist couplings with and without time delays, and the coupled functions among nodes are also nonlinear. For this network model, we investigate its finite-time synchronization by designing some general static and adaptive controllers respectively. Using the finite-time stability theory, some useful finite-time synchronization criteria are derived. Finally, numerical simulations are given to demonstrate the correctness of our theoretical results.

关键词： Synchronization Finite-time Nonlinear Coupling Time Delay

来源：评论

学校读者我要写书评

暂无评论

Synchronization of nonlinearly coupled complex networks under periodically intermittent pinning control

Synchronization of nonlinearly coupled complex networks unde...

引用

第25届中国控制与决策会议

作者： Xiwei Liu Cheng Cheng Department of Computer Science and Technology Tongji University and the Key Laboratory of Embedded System and Service Computing Ministry of Education

ISBN: (纸本)9781467355339

In this paper, we investigate the synchronization problem for nonlinearly coupled networks under periodically intermittent pinning control, where the coupling matrix denoting network topology is assumed to be symmetric. A sufficient condition to guarantee global synchronization is presented. Moreover, a centralized adaptive intermittent control is designed and its validity is rigorously proved. Finally, some numerical examples are presented to demonstrate the correctness of obtained theoretical results.

关键词： Synchronization, Consensus, Complex networks, Nonlinearly coupled, Periodically, Intermittent pinning, Adaptive control.

来源：评论

学校读者我要写书评

暂无评论

Cluster synchronization of nonlinearly coupled networks via periodically intermittent pinning control

Cluster synchronization of nonlinearly coupled networks via ...

引用

第三十二届中国控制会议

作者： LIU Xiwei CHENG Jiujun Department of Computer Science and Technology Tongji Universityand the Key Laboratory of Embedded System and Service ComputingMinistry of Education

ISBN: (纸本)9781479900305

In this paper,the cluster synchronization problem for nonlinearly coupled networks under periodically intermittent pinning control is *** first,a sufficient condition to guarantee cluster synchronization is ***,an adaptive intermittent control algorithm is designed to the control strength and its validity is rigorously ***,some numerical examples are presented to demonstrate the correctness of obtained theoretical results.

关键词： Cluster synchronization Adaptive Nonlinearly coupled Periodically Intermittent pinning.

来源：评论

学校读者我要写书评

暂无评论

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案：

请选择收藏分类：

通借通还

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：