This article consists of a collection of slides from the author's conference presentation. Some of the specific conclusions presented/discussed include: Rebalanced architecture to workload trends; Scaled from 128 ...
详细信息
This article consists of a collection of slides from the author's conference presentation. Some of the specific conclusions presented/discussed include: Rebalanced architecture to workload trends; Scaled from 128 to 240 processors; Hardware manages thousands of threads; Zero software overhead; Hides huge latencies; High achieved utilization; Natively Scalar; No swizzling or vectorization overhead; Coalescing for high bandwidth memory I/O; Software architecture allows 2X scaling on customer C code with no modification.
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