Convolutional code and Viterbi decoding is one of the methods used for channel coding. Convolutional coding is widely used in many aspects because of its excellent performance. However, both the coding algorithm and h...
详细信息
Convolutional code and Viterbi decoding is one of the methods used for channel coding. Convolutional coding is widely used in many aspects because of its excellent performance. However, both the coding algorithm and hardware implementation are very complex. Along with the continuous deepening of SOC design, hardware-software co-design technology has become more and more important as one part of SOC design. A hardware-software platform used for the design of the Viterbi decoder is proposed in this paper. The platform includes embedded software, hardware acceleration, and peripheral interface. Good practicality and powerful verification functions are proved, and optimum design for the Viterbi decoder can be achieved by using the platform.
The paper describes a four-order delta-sigma modulation (DSM) with 15 levels quantizer which is used in a 24-bit 44.1-kHz sample-rate audio digital-to-analog converter (DAC). An odd level quantizer has been chosen ins...
详细信息
The paper describes a four-order delta-sigma modulation (DSM) with 15 levels quantizer which is used in a 24-bit 44.1-kHz sample-rate audio digital-to-analog converter (DAC). An odd level quantizer has been chosen instead of an even level to reduce quantization noise. The noise transfer function (NTF) is designed to have the zeros optimally in order to increase DR. The peak SNR of the DSM is about 130 dB, which is enough for an audio DAC designed with a 0.35 um CMOS technology.
Multi-core processor is widely used on the server and desktop computer nowadays. This paper describes the structure of a cache crossbar which used in the multi-core processor SPARC T2. The cores can use the cache cros...
详细信息
Multi-core processor is widely used on the server and desktop computer nowadays. This paper describes the structure of a cache crossbar which used in the multi-core processor SPARC T2. The cores can use the cache crossbar to exchange the data in the L2 cache banks. The multi cores can communicate among each other core by sharing the data in the L2 cache banks. And with the analysis of the CCX, this paper provides a protocol for connecting multi cores and cache banks. The cache crossbar is implemented in SMIC 0.13 mum with design compiler and can run at 200 MHz.
The electron mobility of 4,7-diphyenyl-1,10-phenanthroline (BPhen) at various thicknesses (50-300 nm) has been estimated by using space-charge-limited current measurements. The measured bulk mobility is in excellent a...
详细信息
This paper presents an efficient pulse width modulation (EPWM) drive method, which is used to implement the driving controller for TFT-LCD with high gray scale. To solve the time redundancy issues in the traditional p...
详细信息
Organic light emitting diodes (OLEDs) incorporating an n-doping transport layer comprised of 8-hydroxy-quinolinato lithium (Liq) doped into 4'7-diphyenyl-1, 10-phenanthroline (BPhen) as ETL and a p-doping transpor...
详细信息
Organic light emitting diodes (OLEDs) incorporating an n-doping transport layer comprised of 8-hydroxy-quinolinato lithium (Liq) doped into 4'7-diphyenyl-1, 10-phenanthroline (BPhen) as ETL and a p-doping transport layer that includes tetrafluro-tetracyano-quinodimethane (F4-TCNQ) doped into 4, 4′, 4″-tris (3-methylphenylphenylamono) triphe-nylamine (m-MTDATA) are demonstrated. In order to examine the improvement in the conductivity of transport layers, hole-only and electron-only devices are fabricated. The current and power efficiency of organic light-emitting diodes are improved significantly after introducing an n-doping (BPhen: 33wt% Liq) layer as an electron transport layer (ETL) and a p-doping layer composed of m-MTDATA and F4-TCNQ as a hole transport layer (HTL). Compared with the control device (without doping), the current efficiency and power efficiency of the most efficient device (device C) are enhanced by approximately 51% and 89%, respectively, while driving voltage is reduced by 29%. This improvement is attributed to the improved conductivity of the transport layers that leads to efficient charge balance in the emission zone.
This paper describes a new drive method of TFT-LCD for high gray scale display. The method is based on Rotating Ordered dithering algorithm and frame modulating technology. This method can use low-bit gray scale TFT-L...
详细信息
This paper describes a new drive method of TFT-LCD for high gray scale display. The method is based on Rotating Ordered dithering algorithm and frame modulating technology. This method can use low-bit gray scale TFT-LCD panel to realize a high gray scale display. This method is applied to a 1280*1024 dots RGB 6-bit TFT-LCD panel which can display 256-level gray scale.
CMOS image sensor has experienced explosive growth in recent years. As increasing of number of pixel scale and complexities of circuit, testability of image sensor chip has become an important problem that must be dea...
详细信息
CMOS image sensor has experienced explosive growth in recent years. As increasing of number of pixel scale and complexities of circuit, testability of image sensor chip has become an important problem that must be dealt with by both design and test engineers. A systematic approach to handle testability of CMOS image sensor circuits is urgently needed, because current test methods less address this domain. In this paper, a uniform and systematic approach is explored to the testability problem of CMOS image sensor, and it covers the image sensor defect analysis, fault model definition and test system design. The experimental data shows the fault coverage can be up to 99.3%.
With the rapid development of mixed-signal system-on-chip (SOC), the verification before tape-out is a critical phase during the design flow in order to guarantee the products yield. A design flow based on mixed-signa...
详细信息
With the rapid development of mixed-signal system-on-chip (SOC), the verification before tape-out is a critical phase during the design flow in order to guarantee the products yield. A design flow based on mixed-signal verification is proposed. Exemplified with the design of a mixed MCU (MV06), this paper proposes the verification precept and introduces the simulation principle and method of mixed signals in the synopsys simulation environment, and then describes the simulation process with the discovery AMS and presents the verification result. This methodology is implemented in our tape-out, the feasibility and efficiency of the method has been verified.
This paper describes a novel TFT-LCD drive method for high gray scale display based on Genetic Algorithm optimization. The method can optimize scanning drive topology structure and improve the efficiency of scanning. ...
详细信息
This paper describes a novel TFT-LCD drive method for high gray scale display based on Genetic Algorithm optimization. The method can optimize scanning drive topology structure and improve the efficiency of scanning. This method uses the traditional DAC to drive the low-bit gray scale while the high-bit gray scale is generated by applying the new topology structure. This method is applied to a 1280*1024 dots RGB TFT-LCD panel which can display 256-level gray scale with 6-bit DAC source driver.
暂无评论