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2009 International Conference on Information Processing in Sensor Networks, IPSN 2009

作者： Beutel, Jan Gruber, Stephan Hasler, Andreas Lim, Roman Meier, Andreas Plessl, Christian Talzi, Igor Thiele, Lothar Tschudin, Christian Woehrle, Matthias Yuecel, Mustafa Computer Engineering and Networks Lab. ETH Zurich Zurich Switzerland Physical Geography Division Department of Geography University of Zurich Switzerland Paderborn Center for Parallel Computing University of Paderborn Germany Computer Science Department University of Basel Switzerland

ISBN: (纸本)9781424451081

Sensor networks deployed in remote locations require easy to use but also extremely expressive tools for reliable operation. The PermaSense project has developed a platform based on a number of proven COTS components and integrated with the GSN based data backend. All tools are accessible from a single location in a web browser. This demo will present the monitoring and control tools in live operation with deployments on real field sites in the Swiss Alps.

关键词： Sensor networks

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Preface

Workshop Proceedings - 32nd Annual Conference on Artificial ...

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Workshop Proceedings - 32nd Annual Conference on Artificial Intelligence, KI 2009 - Workshop on Planning, Scheduling, Design, and Configuration, PuK 2009 2009年 78-78页

作者： Brinkmann, André Eikerling, Heinz-Josef Aziz, M. Zaheer Paderborn Center for Parallel Computing Germany Siemens AG SIS C-LAB Germany GET Lab. Paderborn University Germany

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Memory Access Complexity Analysis of SpMV in RAM (h) Model

Memory Access Complexity Analysis of SpMV in RAM (h) Model

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10th IEEE International Conference on High Performance computing and Communications

作者： Yuan E Zhang Yun-quan Sun Xiangzheng Lab. of Parallel Computing ISCAS 100190 China Graduate University of Chinese Academy of Sciences 100190 China State Key Lab. of Computer Science CAS 100190 China

ISBN: (纸本)9780769533520

Sparse Matrix-Vector Multiplication is an important computational kernel in scientific applications, and CSR storage algorithm often performs poorly on modern computer systems. But the register-level blocking algorithm can optimize memory hierarchy access, reduce memory access time, and then improve the performance. RAM (h) is a computation model that has h-level memory hierarchies. It indicates that different implementation forms of the same algorithm can have different memory access complexity. In this paper, we try to analyze memory access compelxity of two implementation forms of SpMV(which are CSR storage algorithm and register-level blocking algorithm) and to predict the performance of SpMV through combining the memory access complexity analysis and the data movement/floating point operation ratio analysis. The performance data of two forms and Statistical results of miss number of L1, L2 and TLB on Pentium IV platform are listed. Model analytical results matched well with experimental results.

关键词： SpMV sparse matrix-vector multiplication RAM (h) model memory access complexity

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EvAnT: Analysis and checking of event traces for wireless sensor networks

EvAnT: Analysis and checking of event traces for wireless se...

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2008 IEEE International Conference on Sensor Networks, Ubiquitous, and Trustworthy computing, SUTC 2008

作者： Woehrle, Matthias Plessl, Christian Lim, Roman Beutel, Jan Thiele, Lothar ETH Zurich Computer Engineering and Networks Lab. 8092 Zurich Switzerland University of Paderborn Paderborn Center for Parallel Computing 33102 Paderborn Germany

ISBN: (纸本)9780769531588

Testing and verification methodologies for Wireless Sensor Networks (WSN) systems in pre-deployment are vital for a successful deployment. Increased visibility of the internal state of a WSN application is established by instrumenting the application for logging execution traces at runtime. While the interpretation of the event traces is application-specific, a common method for analysis can be devised. This method should allow for a concise formulation of explorative queries to determine the occurrence and the cause of functional or performance problems. The contribution of this paper is an event analysis methodology that is implemented in the EvAnT framework. EvAnT allows for specifying queries that are executed on the collected traces. EvAnT is specifically tailored to WSN testing and debugging. We demonstrate the applicability of EvAnT by a case study in a building monitoring project. © 2008 IEEE.

关键词： Wireless sensor networks

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Memory Access Complexity Analysis of SpMV in RAM (h) Model

Memory Access Complexity Analysis of SpMV in RAM (h) Model

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IEEE International Conference on High Performance computing and Communications (HPCC)

作者： E Yuan Yun-quan Zhang Xiangzheng Sun ISCAS Lab. of Parallel Computing China Graduate University of Chinese Academy of Sciences China CAS State Key Lab. of Computer Science China

Sparse matrix-vector multiplication is an important computational kernel in scientific applications, and CSR storage algorithm often performs poorly on modern computer systems. But the register-level blocking algorithm can optimize memory hierarchy access, reduce memory access time, and then improve the performance. RAM (h) is a computation model that has h-level memory hierarchies. It indicates that different implementation forms of the same algorithm can have different memory access complexity. In this paper, we try to analyze Memory access complexity of two implementation forms of SpMV(which are CSR storage algorithm and register- level blocking algorithm) and to predict the performance of SpMV through combining the memory access complexity analysis and the data movement/floating point operation ratio analysis. The performance data of two forms and Statistical results of miss number of II, 12 and TIB on Pentium IV platform are listed. Model analytical results matched well with experimental results.

关键词： Complexity theory Random access memory Sparse matrices Algorithm design and analysis Signal processing algorithms Registers Prediction algorithms

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Transmission power levels Prediction for Distributed Topology Control Protocols within parameterized scenarios

Transmission power levels Prediction for Distributed Topolog...

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International Conference on Telecommunications (ICT)

作者： S. Kostin L.B. de Pinho C.L. de Amorim Parallel Computing Laboratory COPPE Systems Engineering Program Federal University of Rio de Janeiro Rio de Janeiro Brazil Parallel Comput. Lab. - COPPE Syst. Eng. Program Fed. Univ. of Rio de Janeiro Rio de Janeiro

Distributed topology control protocols (DTCP) for wireless sensor networks (WSN) coordinate nodespsila decisions regarding their transmission ranges, in order to set up a network with a certain connectivity, while reducing nodespsila energy consumption and/or increasing network capacity. The key issue in DTCP is to choose the most suitable transmission power level (TPL) among those available for each sensor node in a distributed manner. We present a method to predict the TPLs for DTCP in realistic scenarios, which takes into account several propagation phenomena, such as barriers and multipath interference. To evaluate the effectiveness of our approach, we simulated the radio propagation pattern of a WSN in a scenario of multiple rooms. Our results suggested that our method allows to predict, with reasonable accuracy, the approximate TPLs distribution achieved by different DTCP approaches within a given parameterized scenario.

关键词： Wireless sensor networks Receivers Transmitters Topology Protocols Computational modeling Network topology

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EDGE-ORIENTED HEXAGONAL ELEMENTS

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Journal of Computational Mathematics 2007年第4期25卷 430-439页

作者： Chao Yang Jiachang Sun Parallel Computing Lab. Institute of Software Chinese Academy of Sciences Beijing 100080 China

In this paper, two new nonconforming hexagonal elements are presented, which are based on the trilinear function space Q1^（3） and are edge-oriented, analogical to the case of the rotated Q1 quadrilateral element. A priori error estimates are given to show that the new elements achieve first-order accuracy in the energy norm and second-order accuracy in the L^2 norm. This theoretical result is confirmed by the numerical tests.

关键词： Nonconforming finite element method Hexagonal element Q1 element.

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Models of parallel computation :a survey and classification

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中国高等学校学术文摘·计算机科学 2007年第2期1卷 156-165页

作者： ZHANG Yunquan CHEN Guoliang SUN Guangzhong MIAO Qiankun Laboratory of Parallel Computing Institute of SoftwareChinese Academy of SciencesBeijing 100080China State Key Laboratory of Computer Science Institute of SoftwareChinese Academy of SciencesBeijing 100080China Anhui Province-MOST Key Co-Lab of High Performance Computing and Its Applications Department of Computer Science and TechnologyUniversity of Science and Technology of ChinaHefei 230027China

In this paper,the state-of-the-art parallel computational model research is *** will introduce various models that were developed during the past *** to their targeting architecture features,especially memory organization,we classify these parallel computational models into three *** models and their characteristics are discussed based on three generations *** believe that with the ever increasing speed gap between the CPU and memory systems,incorporating non-uniform memory hierarchy into computational models will become *** the emergence of multi-core CPUs,the parallelism hierarchy of current computing platforms becomes more and more *** this complicated parallelism hierarchy in future computational models becomes more and more important.A semi-automatic toolkit that can extract model parameters and their values on real computers can reduce the model analysis complexity,thus allowing more complicated models with more parameters to be *** memory and hierarchical parallelism will be two very important features that should be considered in future model design and research.

关键词： parallel computational models hierarchicalmemory hierarchical parallelism three generations memorymodel

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Optimizing compiler for shared-memory multiple SIMD architecture 06

Optimizing compiler for shared-memory multiple SIMD architec...

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LCTES 2006 - 2006 ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems

作者： Zhang, Weihua Qian, Xinglong Wang, Ye Zang, Binyu Zhu, Chuanqi Parallel Processing Institute Fudan University Shanghai China Architecture Key Lab. Institute of Computing Technology Chinese Academy of Sciences China

ISBN: (纸本)159593362X

With the rapid growth of multimedia and game, these applications put more and more pressure on the processing ability of modern processors. Multiple SIMD architecture is widely used in multimedia processing field as a multimedia accelerator. With the consideration of power consumption and chip size, shared memory multiple SIMD architecture is mainly used in embedded SOCs. In order to further fit mobile environment, there is the constraint of limited register number as well. Although shared memory multiple SIMD architecture simplify the chip design, these constraints are the major obstacles to map the real multimedia applications to these architectures. Until now, to our best knowledge, there is little research on the optimizing techniques for shared memory multiple SIMD architecture. In this paper, we present a compiler framework, which aims at automatically generating high performance codes for shared memory multiple SIMD architecture. In this framework, we reduce the competition of shared data bus through Increasing the register locality, improve the utilization of data bus by read-only data vector replication and solve the problem of limited register number through a resource allocation algorithm. The framework also handlers the issues concerning on data transformation. As the experimental results shown, this framework is successful in mapping real multimedia applications to shared memory multiple SIMD architecture. It leads to an average speedup by a factor of 3.19 and an average utilization of SM-SIMD architecture with 8 SIMD units by a factor of 52.6%. Copyright © 2006 ACM.

关键词： Data storage equipment

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Study on parallel computing

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Journal of Computer Science & Technology 2006年第5期21卷 665-673页

作者：陈国良孙广中张云泉莫则尧 Anhui Province-MOST Key Co-Lab of High Performance Computing and Its Applications Department of Computer Science and Technology University of Science and Technology of China Hefei 230027 P.R. China Laboratory of Parallel Computing Institute of Software Chinese Academy of Sciences Beijing 100080 P.R. China Laboratory of Computational Physics Institute of Applied Physics and Computational Mathematics Beijing 100088 P.R. China

In this paper, we present a general survey on parallel computing. The main contents include parallel computer system which is the hardware platform of parallel computing, parallel algorithm which is the theoretical base of parallel computing, parallel programming which is the software support of parallel computing. After that, we also introduce some parallel applications and enabling technologies. We argue that parallel computing research should form an integrated methodology of ＂architecture algorithm programming application＂. Only in this way, parallel computing research becomes continuous development and more realistic.

关键词： parallel computing parallel architecture parallel programming parallel algorithm parallel application

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