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Physically based distributed ray tracing algorithm for high resolution imaging based on PBRT

Journal of computational Information Systems 2013年第16期9卷 6381-6390页

作者： Wu, Changmao Zhang, Yunquan Yang, Congli University of Chinese Academy of Sciences Beijing 100049 China Lab. of Parallel Software and Computational Science Institute of Software Chinese Academy of Sciences Beijing 100190 China

Ray tracing, one of the core algorithms in computer graphics, is a technique for image synthesis: creating a photorealistic picture of a 3-D world. Ray tracing technique for image rendering has produced some of the most realistic images to date. It is also slow because the process of tracing a ray is computationally intensive and because there are hundreds of thousands of rays to be traced. Its expensive computational cost becomes a bottleneck for application, especially in the case of large and complex scenes. In this paper, we offer a novel parallel ray tracing algorithm for multi-core platform and a distributed parallel ray tracing algorithm for computer cluster with the purpose of resolving the bottleneck. Experiments on Dawning 6000 Super Computer show that when using CPU cores from 32 to 320, the corresponding speedup reached to a perfect speedup, which is close to theoretic linear speedup. The proposed algorithm is effective and highly scalab.e with respect to Stanford University's PBRT. This method can be applied to ray tracing process effectively to accelerate the efficiency of rendering. © 2013 Binary Information Press.

关键词： Ray tracing

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High performance two-dimensional phase unwrapping on gpus 14

High performance two-dimensional phase unwrapping on gpus

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11th ACM International Conference on Computing Frontiers, CF 2014

作者： Wu, Zhenhua Ma, Wenjing Long, Guoping Li, Yucheng Tang, Qiuyan Wang, Zhongjie Lab. of Parallel Software and Computational Science Institute of Software University of Chinese China Science and Technology on Integrated Information System Laboratory Institute of Software Chinese Academy of Sciences China

ISBN: (纸本)9781450328708

Phase unwrapping is an important procedure in digital im-age and signal processing, and has been widely used in many elds, such as optical and microwave interferometry, mag-netic resonance imaging, synthetic aperture radar, adaptive optics. Phase unwrapping is a time consuming process with large amount of calculations and complicated data depen-dency. A number of algorithms with different features have been developed to solve this problem. Among all of them, Goldstein's algorithm is one of the most widely used algo-rithms, and has been included in some standard libraries (such as MATlab.. In this paper we propose an innovative implementation of Goldstein's algorithm on GPU. Several important approaches and optimizations are proposed for the GPU algorithm. For example, by introducing a local-matching step, we were able to parallelize the branchcut step effciently, getting much better performance than ex-isting work. With a cascaded propagation model, another important operation in the algorithm, floodfill, is able to make good use of the computing power of GPU. We tested our GPU algorithm on NVIDIA C2050 and K20 GPUs, and achieved speedup of up to 781 and 896 over the CPU imple-mentation respectively. To the best of our knowledge, this is the best performance of unwrap ever achieved on GPUs. © 2014 ACM.

关键词： MATlab

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Heterogeneous multi-core parallel SGEMM performance testing and analysis on Cell/B.E processor

Heterogeneous multi-core parallel SGEMM performance testing ...

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IEEE International Conference on Networking, Architecture and Storage

作者： Li, Yan Zhang, Yunquan Wang, Ke Guan, Wenhua Lab. of Parallel Software and Computational Science ISCAS Beijing China State Key Lab. of Computer Science CAS Beijing China Graduate University Chinese Academy of Sciences Beijing China

ISBN: (纸本)9780769541341

Matrix multiplication is one of the most common and vital numerical operations in the field of scientific computing, which is the kernel routine of Level 3 BLAS. The STI CELL processor is a heterogeneous multiprocessor with a unique design to achieve peak floating point performance. As matrix multiplication operation is essential for a wide range of numerical algorithms and single improvement to the GEMM routine immediately can benefits the entire algorithm. In this paper, we provide a new way to utilize the hardware features of Cell to achieve better performance on the single precision general matrix multiplication (SGEMM), by using both of heterogeneous PPEs and SPEs parallelization, our method gain speedup over the Cell SDK. © 2010 IEEE.

关键词： Cells

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Optimizing SpMV for diagonal sparse matrices on GPU

Optimizing SpMV for diagonal sparse matrices on GPU

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40th International Conference on parallel Processing, ICPP 2011

作者： Sun, Xiangzheng Zhang, Yunquan Wang, Ting Zhang, Xianyi Yuan, Liang Rao, Li Lab. of Parallel Software and Computational Science Institute of Software Chinese Academy of Sciences Beijing China State Key Lab. of Computer Science Institute of Software Chinese Academy of Sciences Beijing China Graduate University of Chinese Academy of Sciences Beijing China

ISBN: (纸本)9780769545103

Sparse Matrix-Vector multiplication (SpMV) is an important computational kernel in scientific applications. Its performance highly depends on the nonzero distribution of sparse matrices. In this paper, we propose a new storage format for diagonal sparse matrices, defined as Compressed Row Segment with Diagonal-pattern (CRSD). In CRSD, we design diagonal patterns to represent the diagonal distribution. As the Graphics Processing Units (GPUs) have tremendous computation power and OpenCL makes them more suitable for the scientific computing, we implement the SpMV for CRSD format on the GPUs using OpenCL. Since the OpenCL kernels are complied at runtime, we design the code generator to produce the codelets for all diagonal patterns after storing matrices into CRSD format. Specifically, the generated codelets already contain the index information of nonzeros, which reduces the memory pressure during the SpMV operation. Furthermore, the code generator also utilizes property of memory architecture and thread schedule on the GPUs to improve the performance. In the evaluation, we select four storage formats from prior state-of-the-art implementations (Bell and Garland, 2009) on GPU. Experimental results demonstrate that the speedups reach up to 1.52 and 1.94 in comparison with the optimal implementation of the four formats for the double and single precision respectively. We also evaluate on a two-socket quad-core Intel Xeon system. The speedups reach up to 11.93 and 12.79 in comparison with CSR format under 8 threads for the double and single precision respectively. © 2011 IEEE.

关键词： Graphics processing unit

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Sleep scheduling method based on half-sleep state in the distributed sensor network 9

Sleep scheduling method based on half-sleep state in the dis...

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9th International ICST Conference on Testbeds and Research Infrastructures for the Development of Networks and Communities, TridentCom 2014

作者： Deng, Pan Chen, Feng Yan, Biying Zhang, Jianwei Zhao, Long Wan, Jiafu Lab. of Parallel Software and Computational Science Institute of Software Chinese Academy of Sciences Beijing China State Key Laboratory of Software Development Environment Beihang University Beijing China College of Electrical Engineering and Automation Jiangxi University of Science and Technology Ganzhou China

ISBN: (纸本)9783319133256

In order to extend the sensor’s lifetime, this paper researched deeply into the sleep scheduling mechanism in the distributed sensor network. Now, the commonly used sleep scheduling methods based on the coverage have the problem of response delay, so we proposed a sleep scheduling method based on the half-sleep state to overcome this shortcoming. Under the control of regional agent node, this method adopts a minimum coverage algorithm based on the approximate solution to select the minimum coverage node set. Experimental results show that the proposed scheduling method can both reduce power consumption of the whole network effectively and extend the lifetime of the sensor noticeably. © Institute for Computer sciences, Social Informatics and Telecommunications Engineering 2014.

关键词： Sensor networks

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CLSIFT: An optimization study of the scale invariance feature transform on GPUs

CLSIFT: An optimization study of the scale invariance featur...

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15th IEEE International Conference on High Performance Computing and Communications, HPCC 2013 and 11th IEEE/IFIP International Conference on Embedded and Ubiquitous Computing, EUC 2013

作者： Wang, Weiyan Zhang, Yunquan Guoping, Long Yan, Shengen Jia, Haipeng Lab. of Parallel Software and Computational Science Institute of Software Chinese Academy of Sciences China State Key Laboratory of Computing Science Institute of Software Chinese Academy of Sciences China School of Computer and Control Engineering University of Chinese Academy of Sciences Beijing China

ISBN: (纸本)9780769550886

Scale Invariance Feature Transform (SIFT) is quite suitable for image matching because of its invariance to image scaling, rotation and slight changes in illumination or viewpoint. However, due to high computation complexity it's technically challenging to deploy SIFT in real time application situations. To address this problem, we propose CLSIFT, an OpenCL based highly speeded up and performance portable SIFT solution. Important optimization techniques employed in CLSIFT such as: (1) For less global memory traffic, independent logical functions are merged into the same kernel to reuse data.(2) loop buffers are introduced in for data and intermediate results reusing.(3)Task queue used to schedule threads in the same branch to remove branch divergences. (4) Data partition is based on the statics patterns for workload balance among workgroups. (5) Overlap of CPU time and better parallel strategies are used too. With all mentioned efforts, CLSIFT processes lena. jpg at 74.2 FPS and 43.4FPS respectively on NVidia and AMD GPUS, much higher than CPU's nearly 10 FPS and the known fastest SIFTGPU's 39.8 FPS and 13FPS. Moreover in a quantitative comparison approach we analyze those successful strategies beating SIFTGPU, a famous existing GPU implementation. Additionally, we observe and conclude that NVidia GPU achieves better occupancy and performance due to some factors. Finally, we summarize some techniques and empirical guiding principles that may be shared by other applications on GPU. © 2013 IEEE.

关键词： Graphics processing unit

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Modeling the locality in graph traversals

Modeling the locality in graph traversals

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41st International Conference on parallel Processing, ICPP 2012

作者： Yuan, Liang Ding, Chen Štefankovič, Daniel Zhang, Yunquan Lab. of Parallel Software and Computational Science Institute of Software Chinese Academy of Sciences China State Key Laboratory of Computer Science Institute of Software Chinese Academy of Sciences China Graduate University of Chinese Academy of Sciences China Computer Science Department University of Rochester United States

ISBN: (纸本)9780769547961

An increasing number of applications in physical and social sciences require the analysis of large graphs. The efficiency of these programs strongly depends on their memory usage especially the locality of graph data access. Intuitively, the locality in computation should reflect the locality in graph topology. Existing locality models, however, operate either at program level for regular loops and arrays or at trace level for arbitrary access streams. They are not sufficient to characterize the relation between locality and connectivity. This paper presents a new metrics called the vertex distance and uses it to model the locality in breadth-first graph traversal (BFS). It shows three models that use the average node degree and the edge distribution to predict the number of BFS levels and the reuse distance distribution of BFS. Finally, it evaluates the new models using random and non-random graphs. © 2012 IEEE.

关键词： Graph theory

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An evaluation of negative selection algorithm with constraint-based detectors 44

An evaluation of negative selection algorithm with constrain...

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44th Annual ACM Southeast Conference, ACMSE 2006

作者： Hou, Haiyu Dozier, Gerry Applied Computational Intelligence Lab. Dept. Computer Science and Software Engineering Auburn University

ISBN: (纸本)1595933158

The Negative Selection Algorithm is an immunology-inspired algorithm for anomaly detection application. This algorithm has been implemented with different pattern representations and various matching rules and successfully applied to a broad range of problems. Recent research shows serious problems with this algorithm in terms of both efficiency and effectiveness. In this paper we evaluated the performance of the algorithm constraint-based representation. We argue that the algorithm and problem representations should be considered separately, and that best performance of the algorithm may be obtained by choosing a proper representation.

关键词： Algorithms

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An insightful program performance tuning chain for GPU computing

An insightful program performance tuning chain for GPU compu...

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12th International Conference on Algorithms and Architectures for parallel Processing, ICA3PP 2012

作者： Jia, Haipeng Zhang, Yunquan Long, Guoping Yan, Shengen Lab. of Parallel Software and Computational Science Institute of Software Chinese Academy of Sciences China College of Information Science and Engineering Ocean University of China China State Key Laboratory of Computing Science Chinese Academy of Sciences China Graduate University of Chinese Academy of Sciences China

ISBN: (纸本)9783642330773

It is challenging to optimize GPU kernels because this progress requires deep technical knowledge of the underlying hardware. Modern GPU architectures are becoming more and more diversified, which further exacerbates the already difficult problem of performance optimization. This paper presents an insightful performance tuning chain for GPUs. The goal is to help non-expert programmers with limited knowledge of GPU architectures implement high performance GPU kernels directly. We achieve it by providing performance information to identify GPU program performance bottlenecks and decide which optimization methods should be adopted, so as to facilitate the best match between algorithm features and underlying hardware characteristics. To demonstrate the usage of tuning chain, we optimize three representative GPU kernels with different compute intensity: Matrix Transpose, Laplace Transform and Integral on both NVIDIA and AMD GPUs. Experimental results demonstrate that under the guidance of our tuning chain, performance of those kernels achieves 7.8~42.4 times speedup compared to their naïve implementations on both NVIDIA and AMD GPU platforms. © 2012 Springer-Verlag.

关键词： Chains

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Study on parallel Computing

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Journal of Computer science & Technology 2006年第5期21卷 665-673页

作者：陈国良孙广中张云泉莫则尧 Anhui Province-MOST Key Co-Lab of High Performance Computing and Its Applications Department of Computer Science and Technology University of Science and Technology of China Hefei 230027 P.R. China Laboratory of Parallel Computing Institute of Software Chinese Academy of Sciences Beijing 100080 P.R. China Laboratory of Computational Physics Institute of Applied Physics and Computational Mathematics Beijing 100088 P.R. China

In this paper, we present a general survey on parallel computing. The main contents include parallel computer system which is the hardware platform of parallel computing, parallel algorithm which is the theoretical base of parallel computing, parallel programming which is the software support of parallel computing. After that, we also introduce some parallel applications and enabling technologies. We argue that parallel computing research should form an integrated methodology of ＂architecture algorithm programming application＂. Only in this way, parallel computing research becomes continuous development and more realistic.

关键词： parallel computing parallel architecture parallel programming parallel algorithm parallel application

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