A trainable VLSI neuroprocessor for adaptive vector quantization based upon the frequency-sensitive competitive learning algorithm has been developed for high-speed high-ratio image compression applications. Simulatio...
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A trainable VLSI neuroprocessor for adaptive vector quantization based upon the frequency-sensitive competitive learning algorithm has been developed for high-speed high-ratio image compression applications. Simulation results show that such an algorithm is capable of producing good-quality reconstructed image at compression ratios of more than 20. This design includes a fully parallel vector quantizer and a pipelined codebook generator which obtains a time complexity O(1) for each quantization vector. A 5*5-dimensional vector quantizer prototype chip has been designed, fabricated and tested. It contains 64 inner-product neural units and an extendable winner-take-all block. This mixed-signal chip occupies a compact Si area of 4.6*6.8 mm/sup 2/ in 2.0- mu m scalable CMOS technology.< >
Several algorithms for segmenting multifrequency synthetic aperture radar (SAR) complex data into regions of similar and homogeneous backscattering characteristics are presented. The image model is composed of two mod...
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Several algorithms for segmenting multifrequency synthetic aperture radar (SAR) complex data into regions of similar and homogeneous backscattering characteristics are presented. The image model is composed of two models, one for the multifrequency complex amplitudes (i.e., speckle), and the other for the region labels. The speckle model is derived from SAR physics. The corresponding analysis illustrates the importance of having a good knowledge of the characteristics of the SAR imaging and processing systems to correctly model the high order statistics of speckle. The region model, on the other hand, uses a multilevel Ising model (a Markov random field) to represent the grouping of pixels into regions. The two models are combined using Bayes' rule to define an optimal region labeling of the scene given the multifrequency complex amplitudes. Two alternatives are presented that can be implemented on an optimization network. The performance of the segmentation technique is illustrated.< >
An adaptive VLSI neuroprocessor based on vector quantization algorithm has been developed for real-time high-ratio image compression applications. This VLSI neural-network-based vector quantization (NNVQ) module combi...
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An adaptive VLSI neuroprocessor based on vector quantization algorithm has been developed for real-time high-ratio image compression applications. This VLSI neural-network-based vector quantization (NNVQ) module combines a fully parallel vector quantizer with a pipelined codebook generator for a broad area of data compression applications. The NNVQ module is capable of producing good-quality reconstructed data at high compression ratios more than 20. The vector quantizer chip has been designed, fabricated, and tested. It contains 64 inner-product neural units and a high-speed extendable winner-take-all block. This mixed-signal chip occupies a compact silicon area of 4.6*6.8 mm/sup 2/ in a 2.0- mu m scalable CMOS technology. The throughput rate of the 2- mu m NNVQ module is 2 million vectors per second and its equivalent computation power is 3.33 billion connections per second.< >
The frequency-sensitive competitive learning (FSCL) algorithm and its associated VLSI neuroprocessor have been developed for adaptive vector quantisation (AVQ). Simulation results show that the FSCL algorithm is capab...
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The frequency-sensitive competitive learning (FSCL) algorithm and its associated VLSI neuroprocessor have been developed for adaptive vector quantisation (AVQ). Simulation results show that the FSCL algorithm is capable of producing a good-quality codebook for AVQ at high compression ratios of more than 20 in real time. This VLSI neural-network-based vector quantization design includes a fully parallel vector quantizer and a pipelined codebook generator to provide an effective data compression scheme. It provides a computing capability as high as 3.33 billion connections per second. Its performance can achieve a speedup of 750 compared with SUN-3/60 and a compression ratio of 33 at a signal-to-noise ratio of 23.81 dB.< >
The convergence behavior of type-0 through type-3 stack filters is investigated. It is shown that stack filters of type-0 through type-2 all possess the convergence property; that is, they filter any input signal to a...
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The convergence behavior of type-0 through type-3 stack filters is investigated. It is shown that stack filters of type-0 through type-2 all possess the convergence property; that is, they filter any input signal to a root after consecutive passes of the filter under any appending strategy. A counterexample is given to show that not all type-3 stack filters have this convergence property. The rate of convergence for convergent stack filters is also shown. It is shown that stack filters of type-0 will take at most a single pass to filter any input signal to a root. The rate of convergence of type-1 and type-2 stack filters is shown to be linear in the length of the input signal.< >
作者:
NARAYANAN, VMANELA, MLADE, RKSARKAR, TKDepartment of Electrical and Computer Engineering
Syracuse University Syracuse New York 13244-1240 Viswanathan Narayanan was born in Bangalore
India on December 14 1965. He received the BE degree in Electronics and Communications from B.M.S. College of Engineering Bangalore in 1988. He joined the Department of Electrical Engineering at Syracuse University for his graduate studies in 1989 where he is currently a research assistant. His research interests are in microwave measurements numerical electromagnetics and signal processing. Biographies and photos are not available for M. Manela and R. K. Lade.Tapan K. Sarkar (Sf69-M'76-SM'X1) was born in Calcutta. India
on August 2 1948. He received the BTech degree from the Indian Institute of Technology Kharagpur India in 1969 the MScE degree from the University of New Brunswick Fredericton Canada in 1971. and the MS and PhD degrees from Syracuse University. Syracuse NY in 1975. From 1975-1976 he was with the TACO Division of the General Instruments Corporation. He was with the Rochester Institute of Technology (Rochester NY) from 1976-1985. He was a Research Fellow at the Gordon Mckay Laboratory Harvard University Cambridge MA from 1977 to 1978. He is now a Professor in the Department of Electrical and Computer Engineering Syracuse University. His current research interests deal with numerical solutions of operator equations arising in electromagnetics and signal processing with application to system design. He obtained one of the “ best solution” awards in May 1977 at the Rome Air Development Center (RADC) Spectral Estimation Workshop. He has authored or coauthored more than 154 journal articles and conference papers and has written chapters in eight books. Dr. Sarkar is a registered professional engineer in the state of New York. He received the Best Paper Award of the IEEE Transactions on Electromagnetic Compatibility in 1979. He was an Associate Editor for feature articles of the lEEE Antennas arid Propagation Sociefy Newsletter and was
Dynamic analysis of waveguide structures containing dielectric and metal strips is presented. The analysis utilizes a finite difference frequency domain procedure to reduce the problem to a symmetric matrix eigenvalue...
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Dynamic analysis of waveguide structures containing dielectric and metal strips is presented. The analysis utilizes a finite difference frequency domain procedure to reduce the problem to a symmetric matrix eigenvalue problem. Since the matrix is also sparse, the eigenvalue problem can be solved quickly and efficiently using the conjugate gradient method resulting in considerable savings in computer storage and time. Comparison is made with the analytical solution for the loaded dielectric waveguide case. For the microstrip case, we get both waveguide modes and quasi-TEM modes. The quasi-TEM modes in the limit of zero frequency are checked with the static analysis which also uses finite difference. Some of the quasi-TEM modes are spurious. This article describes their origin and discusses how to eliminate them. Numerical results are presented to illustrate the principles.
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