It is known that functional refinement does not preserve the security properties of a system. The authors propose a trace-based method for specifying the security properties of a system and a method which ensures that...
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It is known that functional refinement does not preserve the security properties of a system. The authors propose a trace-based method for specifying the security properties of a system and a method which ensures that this security is preserved under refinement. They include an example to illustrate the use of the definitions and make use of non-interference (as defined in their notation).< >
A hybrid architecture for machine vision is described. The primary components of the architecture are a Datacube pipelined image processor, a configurable network of 32 T800 transputers, a Sun-4 workstation and a spec...
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A hybrid architecture for machine vision is described. The primary components of the architecture are a Datacube pipelined image processor, a configurable network of 32 T800 transputers, a Sun-4 workstation and a special-purpose interface connecting the Datacube to the transputer network. The implementation of a 3D structure-from-motion vision algorithm (Droid) on this architecture is described. This algorithm reconstructs 3D structure by analysing image sequences obtained from a moving camera. The Datacube handles the image digitisation, storage and display; the transputer network performs the feature extraction (corner points) in parallel and the Sun-4 computes the 3D-isation. In this application, which was demonstrated live during a recent ESPRIT conference in Brussels, the architecture delivers a performance of greater than 1 frame per second-17 times the performance of a Sun-4 alone.< >
A novel process algebra is presented;algebraic expressions specify delay-insensitive circuits in terms of voltage-level transitions on wires. The approach appears to have several advantages over traditional state-grap...
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KING, JFBARTON, DEJ. Fred King:is the manager of the Advanced Technology Department for Unisys in Reston
Virginia. He earned his Ph.D. in mathematics from the University of Houston in 1977. He has been principal investigator of research projects in knowledge engineering pattern recognition and heuristic problem-solving. Efforts include the development of a multi-temporal multispectral classifier for identifying graincrops using LANDSAT satellite imagery data for NASA. Also as a member of the research team for a NCI study with Baylor College of Medicine and NASA he helped develop techniques for detection of carcinoma using multispectral microphotometer scans of lung tissue. He established and became technical director of the AI Laboratory for Ford Aerospace where he developed expert scheduling modeling and knowledge acquisition systems for NASA. Since joining Unisys in 1985 he has led the development of object-oriented programming environments blackboard architectures data fusion techniques using neural networks and intelligent data base systems. Douglas E. Barton:is manager of Logistics Information Systems for Unisys in Reston
Virginia. He earned his B.A. degree in computer science from the College of William and Mary in 1978 and did postgraduate work in London as a Drapers Company scholar. Since joining Unisys in 1981 his work has concentrated on program management and software engineering of large scale data base management systems and design and implementation of knowledge-based systems in planning and logistics. As chairman of the Logistics Data Subcommittee of the National Security Industrial Association (NSIA) he led an industry initiative which examined concepts in knowledge-based systems in military logistics. His responsibilities also include evaluation development and tailoring of software engineering standards and procedures for data base and knowledge-based systems. He is currently program manager of the Navigation Information Management System which provides support to the Fleet Ballistic Missile Progr
A valuable technique during concept development is rapid prototyping of software for key design components. This approach is particularly useful when the optimum design approach is not readily apparent or several know...
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A valuable technique during concept development is rapid prototyping of software for key design components. This approach is particularly useful when the optimum design approach is not readily apparent or several known alternatives need to be rapidly evaluated. A problem inherent in rapid prototyping is the lack of a "target system" with which to interface. Some alternatives are to develop test driver libraries, integrate the prototype with an existing working simulator, or build one for the specific problem. This paper presents a unique approach to concept development using rapid prototyping for concept development and scenario-based simulation for concept verification. The rapid prototyping environment, derived from artificial intelligence technology, is based on a blackboard architecture. The rapid prototype simulation capability is provided through an object-oriented modeling environment. It is shown how both simulation and blackboard technologies are used collectively to rapidly gain insight into a tenacious problem. A specific example will be discussed where this approach was used to evolve the logic of a mission controller for an autonomous underwater vehicle.
Four methods for generating systolic band-matrix multipliers with different degrees of pipelining are presented. The tradeoffs in complexity and performance of the resulting designs are analysed.
Four methods for generating systolic band-matrix multipliers with different degrees of pipelining are presented. The tradeoffs in complexity and performance of the resulting designs are analysed.
This paper formalises and examines a method that is supposed to highlight the absence or otherwise of unknown channels in a system. The method uses separability and cutting channels. Separability has been formalised e...
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This paper formalises and examines a method that is supposed to highlight the absence or otherwise of unknown channels in a system. The method uses separability and cutting channels. Separability has been formalised elsewhere; formalising cutting channels is a main contribution of this paper. Another contribution is determining an important property of the method.
A mathematical model of reconfigurability. We restrict is presented. The study is restricted to reconfigurations that can be implemented by connecting and disconnecting the wires that link nodes;these wires could be p...
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A mathematical model of reconfigurability. We restrict is presented. The study is restricted to reconfigurations that can be implemented by connecting and disconnecting the wires that link nodes;these wires could be physical or logical.
Two collaborative projects, the European ESPRIT BRA ProCoS project and the UK IED safemos project, are currently investigating methods to prove software and hardware systems correct at a number of different levels of ...
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Two collaborative projects, the European ESPRIT BRA ProCoS project and the UK IED safemos project, are currently investigating methods to prove software and hardware systems correct at a number of different levels of abstraction. Both projects intend to concentrate on subsets of Occam, and the transputer instruction set. The projects will aim to use the same machine language so that results obtained on both projects will be compatible. The initial selection of the projects (a simple subset of the transputer) is presented using the specification language Z. The role of the specification in the two projects is explained and the benefits and drawbacks of such a specification are discussed.
A scheme is presented which transforms systolic programs with a two-dimensional structure to one dimension. The elementary steps of the transformation are justified by theorems in the theory of communicating sequentia...
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The authors consider the use of a nonstandard interpretation to analyze parametrized circuit descriptions, in particular for array based architectures. Various metrics are employed to characterize the performance trad...
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The authors consider the use of a nonstandard interpretation to analyze parametrized circuit descriptions, in particular for array based architectures. Various metrics are employed to characterize the performance tradeoffs for generic designs. The objective is to facilitate the comparison of feasible design alternatives at an early stage of development. The research centers on techniques for extracting various performance attributes, such as critical path and latency, from a single generic design representation. The features of this approach include-uniformity, modularity, reusability, flexibility, and computerized support.< >
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