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27th ACM International Conference on Supercomputing, ICS 2013

作者： Alvanos, Michail Tanase, Gabriel Farreras, Montse Tiotto, Ettore Amaral, José Nelson Martorell, Xavier Programming Models Barcelona Supercomputer Center Barcelona Spain IBM TJ Watson Research Center Yorktown Heights NY United States Dep. of Computer Architecture Universitat Politècnica de Catalunya Barcelona Spain Static Compilation Technology IBM Toronto Laboratory Toronto ON Canada Dep. of Computing Science University of Alberta Edmonton AB Canada IBM Canada CAS Research Markham ON Canada

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ISBN: (纸本)9781450321303

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关键词： unified parallel c partitioned global address space performance evaluation one-sided communication

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Improving communication in PGAS environments: Static and dynamic coalescing in UPC 13

Improving communication in PGAS environments: Static and dyn...

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27th ACM International Conference on Supercomputing, ICS 2013

作者： Alvanos, Michail Farreras, Montse Tiotto, Ettore Amaral, José Nelson Martorell, Xavier Programming Models Barcelona Supercomputer Center Barcelona Spain Department of Computer Architecture Universitat Politecnica de Catalunya Cr. Jordi Girona 1-3 08034 Barcelona Spain Static Compilation Technology IBM Toronto Laboratory Toronto ON Canada Dep. of Computing Science University of Alberta Edmonton AB Canada Barcelona Supercomputing Center Cr. Jordi Girona 29 08034 Barcelona Spain IBM Canada CAS Research Markham ON Canada

ISBN: (纸本)9781450321303

The goal of Partitioned Global Address Space (PGAS) languages is to improve programmer productivity in large scale parallel machines. However, PGAS programs may have many fine-grained shared accesses that lead to performance degradation. Manual code transformations or compiler optimizations are required to improve the performance of programs with fine-grained accesses. The downside of manual code transformations is the increased program complexity that hinders programmer productivity. On the other hand, most compiler optimizations of fine-grain accesses require knowledge of physical data mapping and the use of parallel loop constructs. This paper presents an optimization for the Unified Parallel C language that combines compile time (static) and runtime (dynamic) coalescing of shared data, without the knowledge of physical data mapping. Larger messages increase the network efficiency and static coalescing decreases the overhead of library calls. The performance evaluation uses two microbenchmarks and three benchmarks to obtain scaling and absolute performance numbers on up to 32768 cores of a Power 775 machine. Our results show that the compiler transformation results in speedups from 1.15X up to 21X compared with the baseline versions and that they achieve up to 63% the performance of the MPI versions. © 2013 ACM.

关键词： Dynamics

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Scalable detection of MPI-2 remote memory access inefficiency patterns

Scalable detection of MPI-2 remote memory access inefficienc...

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作者： Hermanns, Marc-André Geimer, Markus Mohr, Bernd Wolf, Felix Laboratory for Parallel Programming German Research School for Simulation Sciences GmbH 52425 Jülich Germany Forschungszentrum Jülich Jülich Supercomputing Centre Germany Department of Computer Science RWTH Aachen University Germany

Wait states in parallel applications can be identified by scanning event traces for characteristic patterns. In our earlier work we defined such inefficiency patterns for MPI-2 one-sided communication, although still based on a serial trace-analysis scheme with limited scalability. In this article we show how wait states in one-sided communications can be detected in a more scalable fashion by taking advantage of a new scalable trace-analysis approach based on a parallel replay, which was originally developed for MPI-1 point-to-point and collective communication. Moreover, we demonstrate the scalability of our method and its usefulness for the optimization cycle with applications running on up to 32,768 cores. © The Author(s) 2012.

关键词： Scalability

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A dynamic accelerator-cluster architecture

A dynamic accelerator-cluster architecture

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41st International Conference on Parallel Processing Workshops, ICPPW 2012

作者： Rinke, Sebastian Becker, Daniel Lippert, Thomas Prabhakaran, Suraj Westphal, Lidia Wolf, Felix Laboratory for Parallel Programming German Research School for Simulation Sciences 52062 Aachen Germany Department of Computer Science RWTH Aachen University 52062 Aachen Germany Corporate Technology Siemens AG 81739 München Germany Jülich Supercomputing Centre 52428 Jülich Germany MAGMA Giessereitechnologie GmbH 52072 Aachen Germany

ISBN: (纸本)9780769547954

Accelerators such as graphics processing units (GPUs) provide an inexpensive way of improving the performance of cluster systems. In such an arrangement, the individual nodes of the cluster are directly connected to one or more accelerator devices via PCI Express. This results in a static mapping of accelerators onto compute nodes, where each accelerator can only be accessed from exactly one compute node. While this static mapping enables efficient data transfers between a given accelerator and the compute node it belongs to, differing computational demands across jobs may, however, produce either underutilized accelerators or nodes whose computational demands cannot be satisfied with the number of accelerators available to them. In particular, smaller numbers of GPUs available per node may enforce explicit MPI parallelism across compute nodes where it is not necessary. To address this limitation, we propose a novel accelerator-cluster architecture in which network-attached accelerators are dynamically assigned to compute nodes. This allows not only their optimal utilization but also a more precise match between application requirements and accelerator hardware. We outline the general concept of our dynamic architecture and show that it can offer substantial benefits to certain classes of applications without significantly harming the performance of others. © 2012 IEEE.

关键词： Memory architecture

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Analysis of streaming social networks and graphs on multicore architectures

Analysis of streaming social networks and graphs on multicor...

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International Conference on Acoustics, Speech, and Signal Processing (ICASSP)

作者： Jason Riedy Henning Meyerhenke David A. Bader David Ediger Timothy G. Mattson Georgia Institute of Technology Atlanta GA USA Institute for Theoretical Informatics Karlsruhe Institute of Technology Karlsruhe Germany Microprocessor and Programming Research Laboratory Intel Corporation DuPont WA USA

Analyzing static snapshots of massive, graph-structured data cannot keep pace with the growth of social networks, financial transactions, and other valuable data sources. We introduce a framework, STING (Spatio-Temporal Interaction Networks and Graphs), and evaluate its performance on multicore, multisocket Intel ® -based platforms. STING achieves rates of around 100 000 edge updates per second on large, dynamic graphs with a single, general data structure. We achieve speedups of up to 1000× over parallel static computation, improve monitoring a dynamic graph's connected components, and show an exact algorithm for maintaining local clustering coefficients performs better on Intel-based platforms than our earlier approximate algorithm.

关键词： Social network services Approximation algorithms Heuristic algorithms Kernel Monitoring Data structures Algorithm design and analysis

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Modeling and Performance Evaluation of TSO-Preserving Binary Optimization

Modeling and Performance Evaluation of TSO-Preserving Binary...

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International Conference on Parallel Architecture and Compilation Techniques (PACT)

作者： Cheng Wang Youfeng Wu Programming Systems Lab Microprocessor and Programming Research INTEL Research Laboratory Santa Clara CA USA

Program optimization on multi-core systems must preserve the program memory consistency. This paper studies TSO-preserving binary optimization. We introduce a novel approach to formally model TSO-preserving binary optimization based on the formal TSO memory model. The major contribution of the modeling is a sound and complete algorithm to verify TSO-preserving binary optimization with O(N 2 ) complexity. We also developed a dynamic binary optimization system to evaluate the performance impact of TSO-preserving optimization. We show in our experiments that, dynamic binary optimization without memory optimizations can improve performance by 8.1%. TSO-preserving optimizations can further improve the performance by 4.8% to a total 12.9%. Without considering the restriction for TSO-preserving optimizations, the dynamic binary optimization can improve the overall performance to 20.4%.

关键词： Optimization Instruction sets Load modeling Memory management Heuristic algorithms

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LAR-CC: Large atomic regions with conditional commits 11

LAR-CC: Large atomic regions with conditional commits

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International Symposium on Code Generation and Optimization (CGO)

作者： Edson Borin Youfeng Wu Mauricio Breternitz Cheng Wang Institute of Computing State University of Campinas-UNICAMP Brazil Programming Systems Laboratory INTEL Research Laboratory USA

ISBN: (纸本)9781612843568

HW/SW Co-designed systems rely on dynamic binary translation and optimizations for efficient execution of binary code. Due to memory ordering properties and other architectural constraints, most binary optimizations are applied to regions of code that are atomically executed. To ensure that the underlying hardware has enough speculative resources to execute the whole atomic region, these systems typically form short atomic regions, with only 20 to 30 instructions. However, the shorter is the atomic region the smaller is the scope for optimizations. We present LAR-CC, a novel technique that enables HW/SW co-designed systems to optimize large atomic regions and dynamically fit them into the available speculative hardware resources by means of conditional commits. The LAR-CC technique consists of two major components: 1) conditional branch instructions to conditionally skip commit operations; 2) code transformations that replace commit operations by conditional commits and enable optimizations to be applied on the large atomic regions. Our experiments show that LAR-CC can effectively achieve dynamic atomic region sizes larger than 1000 instructions, providing sufficiently large scope to apply many advanced optimizations on HW/SW co-designed systems.

关键词： Optimization Hardware Program processors Buffer storage Gears Runtime

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Correlation Between Circulating Tumor Cells (CTCS), PET/CT Response And Pathological Complete Response (PCR) in Primary HER2-Positive (HER2+) Breast Cancer Patients: A Sub-Study From the Neoaltto Trial

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Annals of Oncology 2012年 23卷 ix98-ix98页

作者： H.A. Azim F. Rothe C.M. Aura M. Bavington M. Maetens G. Rouas E. De Azambuja C. Sotiriou S. Di Cosimo M. Ignatiadis Breast Cancer Translational Research Laboratory Institute Jules Bordet Brussels BELGIUM Molecular Pathology Laboratory VHIO Barcelona SPAIN Programming Frontier Science Kincraig UNITED KINGDOM Breast Data Centre Institute Jules Bordet Brussels BELGIUM Medical Oncology Istituto Nazionale Tumori Milan ITALY

Background Although CTC detection has been studied in patients receiving preoperative chemotherapy, fewer data exist for preoperative chemotherapy combined with anti-HER2 agents. Here, we report a sub-study of CTC detection within the NeoALTTO trial. Methods NeoALTTO is a randomized phase III trial in which patients with primary HER2+ breast cancer were randomized to trastuzumab, lapatinib or their combination for 6 weeks followed by the addition of paclitaxel for 12 weeks prior to surgery. Participation in the CTC sub-study was optional. Blood samples were prospectively collected at baseline, after 2 weeks of anti-HER2 treatment alone and prior to surgery. A total of 22.5mL of blood was reduced to 7.5mL using a modified ficoll procedure that was then processed using CellSearch®. Evaluation of HER2 expression in CTCs was performed using the CellSearch® HER2 profiling kit. CTCs with HER2 staining intensity of 2 + /3+ were considered as HER2+. Associations between CTC detection and primary tumor characteristics, pCR and PET/CT response (at week 2 & 6) were assessed using the chi-square test. Results Out of 455 patients randomized, samples for CTC analysis were available for 51 (11%) patients from 16 sites, of whom 11 (21%) had ≥ 1 CTC/22.5ml in at least one time point (Table 1). At baseline, week 2 and surgery, we detected ≥1 CTC/22.5ml in 5/46 (11%), 4/41 (10%), and 5/31 (16%) patients with evaluable samples respectively. HER2+ CTCs were still detectable after 18 weeks of preoperative treatment with anti-HER2 agents plus paclitaxel in 3/31 (10%) patients. No significant association was observed between CTC detection (either at baseline or week 2 or surgery), and clinicopathologic characteristics, pCR (p = 0.36) or PET/CT response at week 2 (p = 0.34) or week 6 (p = 0.90). Conclusion CTC detection does not appear to be associated with pCR in patients receiving preoperative anti-HER2 agents plus paclitaxel, acknowledging the lack of power within our study. Patient Trea

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A HW/SW co-designed heterogeneous multi-core virtual machine for energy-efficient general purpose computing 11

A HW/SW co-designed heterogeneous multi-core virtual machine...

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International Symposium on Code Generation and Optimization (CGO)

作者： Youfeng Wu Shiliang Hu Edson Borin Cheng Wang Programming Systems Laboratory INTEL Research Laboratory Santa Clara CA USA Institute of Computing State University of Campinas-UNICAMP Campinas Brazil

ISBN: (纸本)9781612843568

It is increasingly challenging to improve single thread performance because power/energy consumption becomes a major barrier to achieve significantly higher performance for general purpose cores. General purpose processors are designed to perform well in a wide variety of market segments, at the cost of having significantly lower performance-per-watt than special purpose processors targeting limited applications or market segments. In this paper, we propose a HW/SW co-designed heterogeneous multi-core virtual machine, called TwinPeaks, which integrates a set of less general but power efficient cores and uses dynamic binary optimization to schedule code regions to run on the most efficient cores. Our experiment and analysis indicate that TwinPeaks with a wide in-order core and a narrow out-of-order core may achieve 108% performance at ~71% energy of a big 4-wide out-of-order core.

关键词： Switches Multicore processing Virtual machining Optimization Out of order Energy consumption

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12-OR

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Human Immunology 2012年 73卷 10-10页

作者： Melinda V. Rastrou Cherie L. Holcomb Tim C. Williams Damian Goodridge Ana M. Lazaro Marcel Tilanus Henry A. Erlich Research Human Genetics Roche Molecular Systems Inc. Pleasanton CA USA Research Children’s Hospital and Research Center Oakland CA USA Programming Conexio Genomics Perth Australia C. W. Bill Young/Department of Defense Georgetown University Washington DC USA Transplantation Immunology Tissue Typing Laboratory Maastricht University Medical Center Maastricht Netherlands

Aim Genotyping of DRB1 and DRB3/4/5 is performed in our lab using generic DRB PCR primers, followed by sequencing on the 454 GS FLX and use of Conexio Genomics software. During genotyping homozygous cell lines, we detected additional sequences at about 7% of the read depth of the reported true allele. These artifacts appeared to be PCR crossovers between the DRB1 and DRB3/4/5 sequences. The crossovers usually had one or more mismatches with the IMGT database but occasionally matched a very rare allele (e.g. DRB1 ∗ 03:42). We performed a study to determine if these sequences were in vitro artifacts and to determine if some rare DRB alleles in the IMGT database might, in fact, be in vitro artifacts that had been submitted. Methods To test for in vitro artifact formation during late cycles of genomic PCR, we amplified the DRB loci from 21 homozygous cells lines under both our standard PCR conditions (35 cycles) and a reduced number of cycles (28), followed by 454 sequencing. Using the same PCR conditions, we also sequenced the DRB loci of four samples, each of which had previously been identified as having a novel DRB allele that was subsequently submitted to the IMGT database. Results For all homozygous 21 cell lines, amplification for 35 cycles gave low abundance sequences as possible “second alleles.” In 36% of the cases, these artifactual sequences corresponded to named alleles. Such sequences were not detected with amplification for 28 cycles. In the case of 4 samples with rare alleles previously submitted to the IMGT, we found that 3 were true alleles. The fourth, while not a crossover product, contained a sequencing error which was revealed by our 454 HLA genotyping assay. Conclusions Formation of in vitro crossover products of the DRB loci can occur in late cycles of PCR. PCR conditions have been identified that minimize generation of these in vitro artifacts. Clonal sequencing on the 454 GS FLX is a valuable method for revealing both these artifacts and tradit

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