The genetic elitism and double string coding were used to solve the optical component problem. For the first time, two constraints were applied where both were combined together using a merging function. The results s...
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The genetic elitism and double string coding were used to solve the optical component problem. For the first time, two constraints were applied where both were combined together using a merging function. The results show that the algorithm maintains feasibility of the constraints while it converges to the steady state value.
The increasing complexity, heterogeneity and dynamism of networks, systems, services applications have made our computational/information infrastructure brittle, unmanageable and insecure. This has necessitated the in...
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The increasing complexity, heterogeneity and dynamism of networks, systems, services applications have made our computational/information infrastructure brittle, unmanageable and insecure. This has necessitated the in...
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The increasing complexity, heterogeneity and dynamism of networks, systems, services applications have made our computational/information infrastructure brittle, unmanageable and insecure. This has necessitated the investigation of a new paradigm for design, development and deployment based on strategies used by biological systems to deal with complexity, heterogeneity, and uncertainty, i.e. autonomic computing. This paper introduces the AutoMate project and describes its key components. The overall objective of AutoMate is to investigate key technologies to enable the development of autonomic grid applications that are context aware and are capable of self-configuring, self-composing, self-optimizing and self-adapting. Specifically, it will investigate the definition of autonomic components, the development of autonomic applications as dynamic composition of autonomic components, and the design of key enhancements to existing grid middleware and runtime services to support these applications.
The Level 1 Muon Trigger subsystem for BTeV will be implemented using the same architectural building blocks as the BTeV Level 1 Pixel Trigger: pipelined field programmable gate arrays feeding a farm of dedicated proc...
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The Level 1 Muon Trigger subsystem for BTeV will be implemented using the same architectural building blocks as the BTeV Level 1 Pixel Trigger: pipelined field programmable gate arrays feeding a farm of dedicated processing elements. The muon trigger algorithm identifies candidate tracks, and is sensitive to the muon charge (sign);candidate dimuon events are identified by complementary charge track-pairs. To insure that the trigger is operating effectively, the trigger development team is actively collaborating in an independent multi-university research program for reliable, self-aware, fault adaptive behavior in real-time embedded systems (RTES). Key elements of the architecture, algorithm, performance, and engineered reliability are presented.
This paper proposes a novel approach for the parallel execution of tiled iteration spaces onto a cluster of SMP PC nodes. Each SMP node has multiple CPUs and a single memory mapped PCI-SCI network interface card. We a...
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This paper proposes a novel approach for the parallel execution of tiled iteration spaces onto a cluster of SMP PC nodes. Each SMP node has multiple CPUs and a single memory mapped PCI-SCI network interface card. We apply a hyperplane-based grouping transformation to the tiled space, so as to group together independent neighboring tiles and assign them to the same SMP node. In this way, intranode (intragroup) communication is annihilated. Groups are atomically executed inside each node. Nodes exchange data between successive group computations. We schedule groups much more efficiently by exploiting the inherent overlapping between communication and computation phases among successive atomic group executions. The applied non-blocking schedule resembles a pipelined datapath where group computation phases are overlapped with communication ones, instead of being interleaved with them. Our experimental results illustrate that the proposed method outperforms previous approaches involving blocking communication or conventional grouping schemes.
This paper describes the performance benefits attained using enhanced network interfaces to achieve low latency communication. We make use of DMA communication mode, to send data to other nodes, while the CPU performs...
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ISBN:
(纸本)9780769515823
This paper describes the performance benefits attained using enhanced network interfaces to achieve low latency communication. We make use of DMA communication mode, to send data to other nodes, while the CPU performs useful calculations. Zero-copy communication is achieved through pinned-down physical memory regions, provided by NIC's driver modules. Our testbed concerns the parallel execution of tiled nested loops onto a Linux PC cluster with PCI-SCI NICs (Dolphin D330). Tiles are essentially exchanging data and should also have large Computational grain, so that their parallel execution becomes beneficial. We schedule tiles much more efficiently by exploiting the inherent overlapping between communication and computation phases among successive, atomic tile executions. The applied nonblocking schedule resembles a pipelined data-path where computation phases are overlapped with communication ones, instead of being interleaved with them. Experimental evaluation illustrates that when using enhanced communication features such as DMA transfers, memory-mapped interfaces and zero-copy mechanisms, overall performance is considerably improved compared to using conventional, CPU and kernel bounded, communication primitives.
A rule based expert system (ES) has been implemented, which acts as a tutor to measurement scientists and technicians (metrologists) in the calculation of the uncertainty of measurements according to the methodology o...
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