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International Symposium on Parallel and Distributed Processing (IPDPS)

作者： G. Goumas A. Sotiropoulos N. Koziris Department of Electrical and Computer Engineering Computing Systems Laboratory National and Technical University of Athens Greece

ISBN: (纸本)0769509908

This paper proposes a new method for the problem of minimizing the execution time of nested for-loops using a tiling transformation. In our approach, we are interested not only in tile size and shape according to the required communication to computation ratio, but also in overall completion time. We select a time hyperplane to execute different tiles much more efficiently by exploiting the inherent overlapping between communication and computation phases among successive, atomic tile executions. We assign tiles to processors according to the tile space boundaries thus considering the iteration space bounds. Our schedule considerably reduces overall completion time under the assumption that some part from every communication phase can be efficiently overlapped with atomic, pure tile computations. The overall schedule resembles a pipelined datapath where computations are not anymore interleaved with sends and receives to non-local processors. Experimental results in a cluster of Pentiums by using various MPI send primitives show that the total completion time is significantly reduced.

关键词： Tiles Processor scheduling Shape Parallel processing Delay Vectors systems engineering and theory Laboratories Parallel architectures Automatic control

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Geometric scheduling of 2-D uniform dependence loops

Geometric scheduling of 2-D uniform dependence loops

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International Conference on Parallel and Distributed systems (ICPADS)

作者： I. Drositis T. Andronikos A. Kokorogiannis G. Papakonstantinou N. Koziris Computing Systems Laboratory Computer Science Division Department of Electrical and Computer Engineering National and Technical University of Athens Athens Greece

ISBN: (纸本)0769511538

One of the primary tasks in the area of uniform dependence loops, is predicting the execution propagation, as well as finding an optimal time schedule. In this work, the problem of scheduling using wavefront prediction is presented. The geometric concepts of time instance subspaces and execution pattern are introduced. A quite simple and low complexity scheduling algorithm is presented. The index space is split into geometric subspaces and any point can be located in them. Each point is then scheduled according to the subspace where it belongs.

关键词： Processor scheduling Delay effects Shape Terminology Laboratories computer science Polynomials Costs

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Differentially secure multicasting and its implementation methods

Differentially secure multicasting and its implementation me...

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International Conference on computer Communications and Networks (ICCCN)

作者： S. Holeman G. Manimaran J. Davis Dependable Computing & Networking Laboratory Department of Electrical and Computer Engineering Iowa State University Ames IA USA Information Systems Security Laboratory Department of Electrical and Computer Engineering Iowa State University Ames IA USA

Though the areas of secure multicast group architecture, key distribution and sender authentication are under scrutiny, one topic that has not been explored is how to integrate these with multilevel security. Multilevel security is the ability to distinguish subjects according to classification levels, which determines to what degree they can access confidential objects. In the case of groups, this means that some members can exchange messages at a higher sensitivity level than others. The Bell-La Padula model outlines the rules of these multilevel accesses (see Bell, D. and La Padula, L., MITRE Report, M74-244, MTR 2547 v2, 1973). In multicast groups that employ multilevel security, some of these rules are not desirable, so a modified set of rules is developed and is termed differential security. Also, this paper proposes three methods to set up a differentially secure multicast group: (1) naive approach, (2) multiple tree differential security (DiffSec) approach, and (3) single DiffSec tree approach. Our simulation studies show that both single and multiple DiffSec tree approaches offer similar performance in terms of bandwidth consumption, which is significantly better than that of the naive approach. We also discuss the suitability of the schemes, taking into account scalability and implementation issues.

关键词： Multilevel systems Security Cryptography computer networks Distributed computing Laboratories Bandwidth Scalability Multicast communication Information systems

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Exploiting Locality in Single Assignment Data Structures Updated Through Split-Phase Transactions

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Cluster computing 2001年第4期4卷 281-293页

作者： Amaral, José Nelson Lin, Wen-Yen Gaudiot, Jean-Luc Gao, Guang R. Department of Computing Science University of Alberta Edmonton Canada Tia Mobile Inc. Pasadena USA Department of Electrical Engineering University of Southern California Los Angeles USA Computer Architecture and Parallel Systems Laboratory Department of Electrical and Computer Engineering University of Delaware Newark USA

We present the design, implementation, and evaluation of single assignment data structures and of a software controlled cache in an existing multi-threaded architecture platform – the Efficient Architecture for Running Threads (EARTH). The I-Structure Software-Controlled Cache (ISSC) exploits temporal and spatial locality of EARTH split-phased memory transactions for single-assignment memory references. Our experimental evaluation indicates that the caching mechanism for single-assignment storage makes the EARTH memory system more robust to variations in the latency of memory operations. As a consequence the system can be ported to a wider range of machine platforms and deliver speedup for both regular and irregular application.

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A reliable LZ data compressor on reconfigurable coprocessors

A reliable LZ data compressor on reconfigurable coprocessors

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IEEE Symposium on Field-Programmable Custom computing Machines, FCCM 2000

作者： Huang, Wei-Je Saxena, Nirmal McCluskey, Edward J. CENTER for Reliable Computing Computer Systems Laboratory Department of Electrical Engineering Stanford University StanfordCA94305 United States

ISBN: (纸本)0769508715

Data compression techniques based on Lempel-Ziv (LZ) algorithm are widely used in a variety of applications, especially in communications and data storage. However, since the LZ algorithm involves a considerable amount of parallel comparisons, it may be difficult to achieve a very high throughput using software approaches on general-purpose processors. In addition, error propagation due to single-bit transient errors during LZ compression causes a data integrity problem. In this paper, we present an implementation of LZ data compression on reconfigurable hardware with concurrent error detection for high performance and reliability. Our approach achieves 100Mbps throughput using four Xilinx 4036XLA FPGA chips. We have also presented an inverse comparison technique for LZ compression to guarantee data integrity with less area overhead than traditional systems based on duplication. The resulting execution time overhead and compression ratio degradation due to concurrent error detection is also minimized. © 2000 IEEE.

关键词： Digital storage

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Evaluation of loop grouping methods based on orthogonal projection spaces

Evaluation of loop grouping methods based on orthogonal proj...

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International Conference on Parallel Processing (ICPP)

作者： I. Drositis G. Goumas N. Koziris P. Tsanakas G. Papakonstantinou Department of Electrical and Computer Engineering Computing Systems Laboratory National and Technical University of Athens Zografou Greece

This paper compares three similar loop-grouping methods. All methods are based on projecting the n-dimensional iteration space J/sup n/ onto a k-dimensional one, called the projected space, using (n-k) linear independent vectors. The dimension k is selected differently in each method giving various results. The projected space is divided into discrete groups of related iterations, which are assigned to different processors. Two of the methods preserve optimal time completion, by scheduling loop iterations according to the hyperplane method. The theoretical analysis of the experimental results indicates the appropriate method, for specific iteration spaces and target architectures.

关键词： Vectors Processor scheduling Character generation systems engineering and theory Laboratories Cost function Terminology

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Transient errors and rollback recovery in LZ compression

Transient errors and rollback recovery in LZ compression

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Pacific Rim International Symposium on Dependable computing

作者： Wei-Je Huang E.J. McCluskey Center For Reliable Computing Computer Systems Laboratory Department of Electrical Engineering University of Stanford Stanford CA USA

This paper analyzes the data integrity of one of the most widely used lossless data compression techniques, Lempel-Ziv (LZ) compression. In this algorithm, because the data reconstruction from compressed codewords relies on previously decoded results, a transient error during compression may propagate to the decoder and cause a significant corruption in the reconstructed data. To recover the system from transient faults, we designed two rollback error recovery schemes for the LZ compression hardware, the "reload-retry" and "direct-retry" schemes. Statistical analyses show that the "reload-retry" scheme can recover the LZ compression process from transient faults in one dictionary reload cycle with a small amount of hardware redundancy. The "direct-retry" scheme can recover normal operations with a shorter latency but with a small degradation in the compression ratio.

关键词： Decoding Hardware Data analysis Data compression Statistical analysis Transient analysis Dictionaries Redundancy Delay Degradation

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A reliable LZ data compressor on reconfigurable coprocessors

A reliable LZ data compressor on reconfigurable coprocessors

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Annual IEEE Symposium on Field-Programmable Custom computing Machines (FCCM)

作者： W.-J. Huang N. Saxena E.J. McCluskey Center For Reliable Computing Computer Systems Laboratory Department of Electrical Engineering University of Stanford Stanford CA USA

ISBN: (纸本)0769508715

Data compression techniques based on the Lempel-Ziv (LZ) algorithm are widely used in a variety of applications, especially in communications and data storage. However, since the LZ algorithm involves a considerable amount of parallel comparisons, it may be difficult to achieve a very high throughput using software approaches on general-purpose processors. In addition, error propagation due to single-bit transient errors during LZ compression causes a data integrity problem. We present an implementation of LZ data compression on reconfigurable hardware with concurrent error detection for high performance and reliability. Our approach achieves 100 Mbps throughput using four Xilinx 4036XLA FPGA chips. We also present an inverse comparison technique for LZ compression to guarantee data integrity with less area overhead than traditional systems based on duplication. The resulting execution time overhead and compression ratio degradation due to concurrent error detection is also minimized.

关键词： Coprocessors Data compression Dictionaries Throughput computer architecture Hardware Field programmable gate arrays Application specific integrated circuits Application software Degradation

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Developing a real-time, robust, video tracker

Developing a real-time, robust, video tracker

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OCEANS

作者： K. Plakas E. Trucco Computer Vision Group and Ocean Systems Laboratory Department of Computing and Electrical Engineering Heriot-Watt University UK

Tracking targets robustly in video sequences is a basic component for several image processing applications, including mosaicing, stabilisation and shape/structure reconstruction from motion. The authors present recent developments of their work on a real-time video tracker, capable of tracking 30-50 feature points at 10-20 frames per second (depending on parameter settings) on a standard PC platform. Examples of tracking results with real mission sequences as well as laboratory tank data are shown. They also illustrate some applications where their real-time tracker has been successfully embedded in larger systems.

关键词： Robustness Feature extraction Target tracking computer vision Underwater tracking Laboratories Application software Oceans Shape Image reconstruction

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An efficient algorithm for the physical mapping of clustered task graphs onto multiprocessor architectures

An efficient algorithm for the physical mapping of clustered...

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Euromicro Workshop on Parallel and Distributed Processing

作者： N. Koziris M. Romesis P. Tsanakas G. Papakonstantinou Department of Electrical and Computer Engineering Computer Science Division Computing Systems Laboratory National and Technical University of Athens Zografou Greece

The most important issue in sequential program parallelisation is the efficient assignment of computations into different processing elements. In the past, too many approaches were devoted in efficient program parallelization considering various models for the parallel programs and the target architectures. The most widely used parallelism description model is the task graph model with precedence constraints. Nevertheless, as far as physical mapping of tasks onto parallel architectures is concerned little research has given practical results. It is well known that the physical mapping problem is NP-hard in the strong sense, thus allowing only for heuristic approaches. Most researchers or tool programmers use exhaustive algorithms, or the classical method of simulated annealing. This paper presents an alternative approach onto the mapping problem. Given the graph of clustered tasks, and the graph of the target distributed architecture, our heuristic finds a mapping by first placing the highly communicative tasks on adjacent nodes of the processor network. Once these "backbone" tasks are mapped there is no backtracking, thus achieving low complexity. Therefore, the remaining tasks are placed beginning from those close to the "backbone" tasks. The paper concludes with performance and comparison results which reveal the method's efficiency.

关键词： Clustering algorithms Processor scheduling Network topology computer networks Application software Costs computer architecture computer science Laboratories Electronic mail

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