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Address Register Allocation in Digital Signal Processors

Address Register Allocation in Digital Signal Processors

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International Conference on Embedded Software and Systems

作者： Jinpyo Hong J. Ramanujam School of Internet Media Korea University of Technology and Education Cheonan South Korea Department of Electrical and Computer Engineering Louisiana State University Baton Rouge LA USA

ISBN: (纸本)9780769532875

It is important in signal processing to optimize a code inside loops. In most programs, addressing computation accounts for a large fraction of an execution time. From the fact that typical DSP programs access massive amounts of data, it is easy to conclude that handling addressing computation properly in DSP domain is a more important subject than in general purpose computing in order to achieve a compact code with real-time performance. In this paper, we develop an algorithm that can eliminate an explicit use of address register instructions in a loop and find a lower bound on the number of ARs by finding strongly connected components (SCCs) of an extended graph.

关键词： Registers Resource management Distance measurement Digital signal processing Arrays Upper bound Indexing

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Scheduling DAGs for Fixed-point DSP Processors by Using Worm Partitions

Scheduling DAGs for Fixed-point DSP Processors by Using Worm...

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International Conference on Embedded Software and Systems

作者： Jinpyo Hong J. Ramanujam School of Internet-Media Korea University of Technology and Education Cheonan South Korea Department of Electrical and Computer Engineering Louisiana State University Baton Rouge LA USA

ISBN: (纸本)9780769532875

This paper concerns a code generation for directed acyclic graphs (DAGs). The set of edges that connect consecutively scheduled operations along with the nodes that correspond to the consecutively scheduled operations constitutes a worm. We propose an algorithm to construct a partitioning of a DAG into a collection of worms. This is done by finding the longest worm at the moment and maintaining the legality of worm partitioning. We characterize a legality of worm partitioning by introducing a simple set notation and proving its property. Based on that notation and its property, we prove that our algorithm correctly works. We also show that our algorithm works even in a DAG which contains interleaved sharing. Experimental results on several DAGS show that our technique generates worm partitioning of DAGs with small cardinality.

关键词： Grippers Registers Law Legal factors Processor scheduling Digital signal processing Schedules

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Supporting end-to-end resource virtualization for web 2.0 applications using service oriented architecture

Supporting end-to-end resource virtualization for web 2.0 ap...

引用

2008 IEEE Globecom Workshops, GLOBECOM 2008

作者： Papagianni, C. Karagiannis, G. Tselikas, N.D. Sfakianakis, E. Chochliouros, I.P. Kabilafkas, D. Cinkler, T. Westberg, L. SjÖdin, P. Hidell, M. De Groot, S. Heemstra Kontos, T. Katsigiannis, C. Pappas, C. Antonakopoulou, A. Venieris, I.S. School of Electrical and Computer Engineering National Technical University of Athens Greece CTIT and Department of Electrical Engineering Mathematics and Computer Science University of Twente Enschede Netherlands Department of Telecommunications Science and Technology University of Peloponnese Greece Research Programs Section Labs and New Technologies Division ellenic Telecommunications Organization S.A. Switching and Services Laboratory Labs and New Technologies Division Hellenic Telecommunications Organization S.A. Greece Department of Telecommunications and Media Informatics Budapest University of Technology and Economics Hungary Ericsson Research Stockholm Sweden School of Information and Communication Technology Royal Institute of Technology Stockholm Sweden Twente Institute for Wireless and Mobile Communication Enschede Netherlands Siemens IT Solutions and Services Athens Greece

ISBN: (纸本)9781424430628

In recent years, technologies have been introduced offering a large amount of computing and networking resources. New applications such as Google AdSense and BitTorrent can profit from the use of these resources. An efficient way of discovering and reserving these resources is by using the Service Oriented Architecture (SOA) concept. SOA can be considered as a philosophy or paradigm in organizing and utilizing services and capabilities that may be under the control of different ownership domains. This paper presents an architecture that can be used to support end-to-end resource virtualization for Web 2.0 applications and in particular for peer-to-peer applications by using the Service Oriented Architecture concept. © 2008 IEEE.

关键词： Information services

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Robust multichannel sampling

Robust multichannel sampling

引用

IEEE International Conference on Image Processing

作者： Ha T. Nguyen Minh N. Do Media Processing Technology Lab Sony Electronics Inc. San Jose CA USA Department of Electrical and Computer Engineering University of Illinois Urbana-Champaign Urbana-Champaign IL USA

A conventional wisdom is that a bandlimited signal can be sampled at twice its maximum frequency to prevent any loss of information. For signals having high frequency components, sampling them requires fast analog-to-digital converters (ADC) that are difficult to design without increasing their cost and noise. In this paper, we show that high-resolution samples of any signal, bandlimited or unband limited, can be accurately approximated using multiple sequences of low-resolution samples taken from the same analog signal, probably with fractional delays, using slow ADCs. The approximation is enabled by designing a set of synthesis filters, without any knowledge of the signals to be sampled, to minimize an induced error system in the minimax sense. The approximation performance is guaranteed to be robust even when using estimates of the system parameters (such as antialiasing filters and fractional delays). We present experiments to confirm the potential of our approach.

关键词： Sampling methods Signal design Filters Delay estimation Noise robustness Frequency conversion Analog-digital conversion Costs 1f noise Signal synthesis

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Better learning of neural networks using functional graph for analysis of wireless network

Better learning of neural networks using functional graph fo...

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International Conference on computer and Communication engineering, ICCCE

作者： V. Joseph Raj Heren Chellam G. Stella Morris Department of Computer Engineering Faculty of Architecture and Engineering European University of Lefke North Cyprus Mersin 10 TURKEY Department of Computer Science Government Arts College for Women Alagappa University INDIA 3Department of Electrical and Computer Engineering Manukau Institute of Technology (M.I.T) Auckland NEW ZEALAND

Neural networks have been used as an effective method for solving many problems in a wide range of application areas. As neural networks are being more and more widely used in recent years, the need for their more formal definition becomes increasingly apparent. This paper presents a novel architecture of neural network models using the functional graph. The network creates a graph representation by dynamically allocating nodes to code local form attributes and establishing arcs to link them. In this paper application of functional graph in the architecture of electronic neural network, opto-electronic neural network and genetic neural network are detailed with experimental results. Learning is defined in terms of functional graph. The proposed architectures are applied in evaluating 3G wireless network performance.

关键词： Neural networks Wireless networks Artificial neural networks Biological neural networks Neurons Genetic algorithms computer networks computer architecture computer science Government

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A Novel Technique for Input Vector Compression in System-on-Chip Testing

A Novel Technique for Input Vector Compression in System-on-...

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International Conference on Information technology (ICIT)

作者： Satyendra N. Biswas Sunil R. Das Mansour H. Assaf Department of Electrical Engineering Technology Georgia Southern University Statesboro GA USA School of Information Technology and Engineering Faculty of Engineering University of Ottawa Ottawa ONT Canada Department of Computer and Information Science College of Arts and Sciences Troy University Montgomery AL USA University of Trinidad and Tobago Arima Trinidad and Tobago

A software based hybrid test vector compression technique for testing system-on-chip integrated circuits using an embedded processor core was previously discussed by the authors. In this approach, a software program is loaded into the on-chip processor memory along with the compressed test data sets. To minimize on-chip storage besides testing time, the test data volume is first reduced by compaction in a hybrid manner before downloading into the processor. The proposed method utilizes a set of adaptive coding techniques for realizing lossless compression. The compaction program need not be loaded into the embedded processor, as only the decompression of test data is required for the automatic test equipment. The developed scheme necessitates minimal hardware overhead, while the on-chip embedded processor can be reused for normal operation on completion of testing. As an extension of this prior work, this paper reports further results on studies of the problem based on the use of Limpel-Ziv-Walsh coding besides Burrows-Wheeler transformation and demonstrates the feasibility of the suggested methodology with simulation results on ISCAS 85 combinational and ISCAS 89 full-scan sequential benchmark circuits.

关键词： System-on-a-chip System testing Circuit testing Software testing Integrated circuit testing Compaction Embedded software Hybrid integrated circuits Adaptive coding Automatic testing

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Connecting artists and scientists in multimedia research 08

Connecting artists and scientists in multimedia research

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16th ACM International Conference on Multimedia, MM '08

作者： Kerne, Andruid Wakkary, Ron Nack, Frank Steggell, Amanda Candan, Selcuk Bimbo, Alberto Del Jennings, Pamela Dulic, Aleksandra Jaimes, Alejandro Interface Ecology Lab Dept of Computer Science Texas A and M University United States School of Interactive Arts and Technology Simon Fraser University Canada Informatics Institute University of Amsterdam Netherlands Free Artist Norway Department of Computer Science and Engineering Arizona State University United States Dipartimento di Sistemi e Informatica Univ. degli Studi di Firenze Italy School of Art / HCI Institute Carnegie Mellon Univ. United States Media and Graphics Interdisciplinary Centre University of British Columbia United States Telefonica R and D Spain

ISBN: (纸本)9781605583037

Historically, the ACM Multimedia Conference is split into a "technical" program and an "arts" program. These programs sometimes seem completely separate from one another, victims of a "semantic gap" between disciplines. The goal of this panel is to create a space in which scientists learn from artists, and arts from science. We need to discover new connections between modalities of research. In order to create the most exciting and powerful future forms of interactive multimedia systems, the ones that will create the most beneficial broader impact on humanity, we need to foster new collaborations between artists and scientists. This panel seeks to bridge the great divide of language and communities that has fragmented us, creating a new space for developing connections between the arts and sciences of multimedia research, as embodied through the artists and scientists of ACM Multimedia. The goal is to make this conference a premier site for catalyzing emergent connections. Among the ancient Greeks, the techne, which included the sciences, were based in the arts. Our modes of knowledge production have since separated and grown alienated. "What weird stuff are those people doing?" To bridge the divide, we must understand and acknowledge differences, and use this as a basis for discovering common ground. In the sciences, knowledge is constructed empirically, through hypotheses and validations. Aesthetics and concepts play essential roles in how works of art are formulated to stimulate experiences. Where do these aims intersect and how might they inform each other? In this conference, one track develops pattern recognition methods for content analysis and retrieval. Another develops network and system techniques. Applications invoke these methods in usable systems. Human-centered multimedia serves as a bridge connecting human experiences with algorithmic methods. The interactive art program develops new concepts of how multimedia can function culturally, amidst society,

关键词： Multimedia systems

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Semantic video annotation using background knowledge and similarity-based video retrieval

Semantic video annotation using background knowledge and sim...

引用

TREC Video Retrieval Evaluation, TRECVID 2008

作者： Llorente, Ainhoa Zagorac, Srdan Little, Suzanne Hu, Rui Kumar, Anuj Shaik, Suhail Ma, Xiang Rüger, Stefan Knowledge Media Institute The Open University Walton Hall Milton Keynes MK7 6AA United Kingdom INFOTECH Unit ROBOTIKER-TECNALIA Parque Tecnológico Edificio 202 Zamudio E-48170 Bizkaia Spain Indian Institute of Information Technology and Management Gwalior India Global Research Center for Consulting Wipro Consulting Services India Btech-IT Indian Institute Of Information Technology Allahabad U.P-211012 India Department of Electrical and Computer Engineering University of Illinois at Chicago Chicago IL 60607 United States

We describe our experiments for the High-level Feature Extraction (FE) and Search (SE) tasks. We submitted two automatic runs to the FE task, the first one (MMIS alexei) was based on a probabilistic approach while the second (MMIS ainhoa) was an enhanced version that used background knowledge in the form of statistical co-occurrence of annotation keywords. While previous applications of this approach to other datasets have performed quite well, our results in TRECVID 2008 are not so good. In particular, the performance of the second run was limited by the small vocabulary. For the SE task we submitted two runs: a similarity-based media search (MMIS media) and the required text-only search (MMIS text). The similarity search, using media content, had better precision than the text-only search but had difficulties with some types of queries (e.g., motion-based). Overall, participation in the TRECVID evaluation was a valuable learning experience for our group.

关键词： Semantics

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Improved Test Efficiency in Cores-Based System-on-Chips Using ModelSim Verification Tool

Improved Test Efficiency in Cores-Based System-on-Chips Usin...

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2008 IEEE Instrumentation and Measurement technology Conference (I2MTC 2008), vol.4

作者： Sunil R. Das Jun-Feng Li Altaf Hossain Amiya R. Nayak Emil M. Petriu Satyendra Biswas Wen-Ben Jone School of Information Technology and Engineering Faculty of Engineering University of Ottawa Ottawa ONT Canada Department of Computer and Information Science College of Arts and Sciences Troy University Montgomery AL USA Department of Electrical Engineering Technology Georgia Southern University Statesboro GA USA Department of Electrical and Computer Engineering University of Cincinnati Cincinnati OH USA

Due to paradigm shift from system-on-board to designs embracing embedded cores-based system-on-chips (SOCs), the complexity of digital circuits has enormously increased in recent times. This growing complexity has created a huge challenge in developing their appropriate and efficient fault testing environment. Despite enormous efforts directed towards effective testing of very large scale integrated (VLSI) circuit chips with reasonable cost, new frontiers emerged with advances in technology. The subject paper plans to develop a method to test verify circuit architecture under a hardware software co-design environment, specifically targeting embedded cores-based system-on-chips (SOCs). The concept of design-for-testability (DFT) is utilized in the paper together with ModelSim simulation and verification tool to test simulate the entire design. Some simulation results on ISCAS 85 combinational benchmark circuits are also included with a comparison of the results with some earlier works.

关键词： Built-in self-test (BIST) embedded cores-based system-on-chips (SOCs) fault injection fault simulation module under test (MUT) test pattern generator (TPG) Verilog HDL

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Inferring the stability of LIFE through Brain Machine Interfaces

Inferring the stability of LIFE through Brain Machine Interf...

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Annual International Conference of the IEEE engineering in Medicine and Biology Society (EMBC)

作者： Jack DiGiovanna Luca Citi Ken Yoshida Jacopo Carpaneto Jose C. Principe Justin C. Sanchez Silvestro Micera Department of Biomedical Engineering University of Florida Gainesville FL USA Scuola Superiore Sant'Anna ARTS Laboratory Pisa Italy Department of Biomedical Engineering Indiana University-Purdue University Indianapolis IN USA Departments. of Electrical and Computer Engineering and Biomedical Engineering University of Florida Gainesville FL USA Department of Pediatrics Division of Neurology University of Florida Gainesville FL USA Institute for Automation Swiss Federal Institute of Technology Zurich Switzerland

We examine neural signals from Longitudinally implanted Intra-Fascicular Electrodes (LIFE) in a chronic, rabbit model. Translation-invariant wavelet de-noising methods are used to improve S%R. Then traditional template-based spike sorting is applied to discriminate single units. We investigate the effect of discriminating between identified units on Brain Machine Interface (BMI) decoding performance. We infer the stability of LIFE based on decoding performance with and without current BMI methods to counter-act electrode neural signal degradation.

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