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Real-Time Systems Symposium (RTSS)

作者： Byung Kook Kim K.G. Shin Department of Electrical Engineering Korea Advanced Institute of Science and Technology Taejon South Korea Real Time Computing Laboratory Department of Electrical Engineering and Computer Science University of Michigan Ann Arbor MI USA

A fast, scalable hardware earliest deadline first (EDF) link scheduler for ATM switching network is developed. This EDF scheduler is a fast hardware solution suitable for real time scheduler on nodes in ATM switching networks up to 2.5 Gbps switching speed (scheduling within 0.17 /spl mu/s), capable of performing simultaneous input and output operations within two clock cycles (mostly in one clock cycle). The designed hardware is efficient since the architecture employs the minimum size EDF priority queue, combined with variable size FIFO queues for channels implemented with a two port memory buffer. Early traffic can be simply checked and delayed. Also, it is scalable with respect to the number of channels C and the total number of buffers N. Moreover, deadline folding technique eliminates the need to extend the deadline resolution. Simulation studies and layout design demonstrate the efficiency and utility of the proposed architecture.

关键词： Hardware Asynchronous transfer mode Communication switching Delay Traffic control Switches Bandwidth Processor scheduling Clocks Telecommunication traffic

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Optical Coherence Tomography for Biomedical Imaging and Diagnostics 12

Optical Coherence Tomography for Biomedical Imaging and Diag...

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12th International Conference on Optical Fiber Sensors, OFS 1997

作者： Fujimoto, J.G. Bouma, B.E. Tearney, G.J. Boppart, S.A. Pitris, C. Herrmann, J. Swanson, E.A. Southern, J.F. Brezinski, M.E. Department of Electrical Engineering and Computer Science Research Laboratory of Electronics Massachusetts Institute of Technology CambridgeMA02139 United States MIT Lincoln Laboratory LexingtonMA02173 United States Massachusetts General Hospital Harvard Medical School BostonMA02114 United States

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Adaptive blocks: A high performance data structure 97

Adaptive blocks: A high performance data structure

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1997 ACM/IEEE Conference on Supercomputing, SC 1997

作者： Stout, Quentin F. De Zeeuw, Darren L. Gombosi, Tamas I. Groth, Clinton P. T. Marshall, Hal G. Powell, Kenneth G. Electrical Engineering and Computer Science Center for Parallel Computing University of Michigan Ann Arbor MI 48109-2122 United States Space Physics Research Laboratory Department of Atmospheric Oceanic and Space Sciences University of Michigan Ann Arbor MI 48109-2143 United States Laboratory for Scientific Computation Center for Parallel Computing University of Michigan Ann Arbor MI 48109-2094 United States Department of Aerospace Engineering University of Michigan Ann Arbor MI 48109-2118 United States

ISBN: (纸本)0897919858

We examine a data structure which uses flexible "adaptivity" to obtain high performance for both serial and parallel computers. The data structure is an adaptive grid which partitions a given region into regular cells. Its closest relatives are cell-based tree decompositions, but there are several important differences which lead to significant performance advantages. Using this block data structure to support adaptive mesh refinement (AMR), we were able to sustain 17 GFLOPS in ideal magnetohydrodynamic (MHD) simulations of the solar wind emanating from the base of the solar corona, using a 512 processor Cray T3D at NASA Goddard. © 1997 ACM.

关键词： Magnetohydrodynamics

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Exact and efficient analysis of schedulability in fixed-packet networks: a generic approach

Exact and efficient analysis of schedulability in fixed-pack...

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IEEE Annual Joint Conference: INFOCOM, IEEE computer and Communications Societies

作者： S. Gorinsky S. Baruah T.J. Marlowe A.D. Stoyenko Real Time Computing Laboratory Department of Computer and Information Science New Jersey Institute of Technology Newark NJ USA Department of Computer Science and Electrical Engineering University of Vermont Burlington VT USA Department of Mathematics and Computer Science Seton Hall University South Orange NJ USA Real Time Computing Laboratory Department of Computer and Information Science New Jersey Institute of Technology Newark NJ USA

A general model for traffic flows on packet-switched, virtual-circuit based, fixed-packet networks is introduced, and an exact schedulability test is obtained for systems of such flows. Rules are derived that make the evaluation of this schedulability test feasible and efficient under certain circumstances. The practical relevance of this approach is demonstrated by applying it to a number of standard traffic models.

关键词： Intelligent networks Processor scheduling Telecommunication traffic Traffic control computer networks Delay Laboratories Information science computer science Real time systems

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An architecture-independent workload characterization model for parallel computer architectures

An architecture-independent workload characterization model ...

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Aizu International Symposium on Parallel Algorithms/Architecture Synthesis

作者： A.I. Meajil T. El-Ghazawi T. Sterling Electrical Engineering & Computer Science Department George Washington University USA Center for Advanced Computing Research California Institute of Technology NASA Jet Propulsion Laboratory USA

A model is presented for representing and comparing workloads, based on the way they would exercise parallel machines. This workload characterization is derived from parallel instruction centroid and parallel workload similarity. The centroid is a simple measure that aggregates average parallelism instruction mix, and critical path length. When captured with abstracted information about communication requirements, the result is a powerful tool in understanding the requirements of workloads and their potential performance on target machines. The workload similarity is based on measuring the normalized Euclidean distance (ned) between workload centroids. It is shown that this workload representation method outperforms comparable ones in accuracy, as well as in time and space requirements. Analysis of the NAS Parallel Benchmarks and their performance is presented to demonstrate some of the applications, such as performance prediction with good accuracy, and insight provided by this model.

关键词： Concurrent computing computer architecture Parallel processing Euclidean distance Parallel architectures Design for experiments Benchmark testing Extraterrestrial measurements Multidimensional systems Propulsion

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Scalable hardware priority queue architectures for high-speed packet switches

Scalable hardware priority queue architectures for high-spee...

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Real-Time Technology and Applications Symposium

作者： S.-W. Moon K.G. Shin J. Rexford Real-Time Computing Laboratory Department of Electrical Engineering and Computer Science University of Michigan Ann Arbor MI USA Network Mathematics Research Networking and Distributed Systems AT and T Research Laboratories Murray Hill NJ USA

In packet-switched networks, queueing of packets at the switches can result when multiple connections share the same physical link. To accommodate a large number of connections, a switch can employ link-scheduling algorithms to prioritize the transmission of the queued packets. Due to the high-speed links and small packet sizes, a hardware solution is needed for the priority queue in order to make the link schedulers effective. But for good performance, the switch should also support a large number of priority levels (P) and be able to buffer a large number of packets (N). So a hardware priority queue design must be both fast and scalable (with respect to N and P) in order to be implemented effectively. In this paper we first compare four existing hardware priority queue architectures, and identify scalability limitations on implementing these existing architectures for large N and P. Based on our findings, we propose two new priority queue architectures, and evaluate them using simulation results from Verilog HDL and Epoch implementations.

关键词： Packet switching Switches Traffic control Scheduling algorithm Asynchronous transfer mode Hardware design languages Communication system traffic control computer architecture Moon Real time systems

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Pulse-echo field distribution measurement technique for high-frequency ultrasound sources

Pulse-echo field distribution measurement technique for high...

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IEEE Symposium (IUS) Ultrasonics

作者： K. Raum D. O'Brien Institute of Medical Physics and Biophysic Martin-Luther-University Saale Germany Bioacoustics Research Laboratory Beckman Instituttoer Advanced Science and Technology Department of Electrical and Computer Engineering University of Illinois Urbana IL USA

A simple technique for the determination of the spatial and temporal transmit-receive field distribution of spherically focused high-frequency transducers is described. In this study tungsten wires were used as echo-targets. Based on the scattering of sound on a rigid cylinder the transmit-receive field projection of spherical sources measured with a wire target was compared with both, theoretical pressure distributions and hydrophone measurements in the frequency range from 3 to 17 MHz. It was demonstrated that both techniques yielded comparable results for the low-frequency transducer, whereas only the results of the wire target technique were also in agreement with theory for the higher frequency transducers.

关键词： Pulse measurements Measurement techniques Ultrasonic imaging Wire Acoustic beams Biomedical transducers Acoustic transducers Acoustic waves Ultrasonic transducers Focusing

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PRIAM: Polite rescheduler for intelligent automated manufacturing

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IEEE TRANSACTIONS ON ROBOTICS AND AUTOMATION 1996年第2期12卷 235-245页

作者： Tsukada, TK Shin, KG Real-Time Computing Laboratory Department of Electrical Engineering and Computer Science University of Michigan Ann Arbor MI USA

This paper considers the problem of rescheduling in a decentralized manufacturing system, Flexible manufacturing systems must be able to respond to unexpected disruptions, including schedule disruptions, However, when a cell controller in a decentralized system responds to a disruption, it may disrupt some other cell, because the actions taken at one cell may have some consequence at another cell, In the approach we propose, a controller at a disrupted cell tries to respond in a way which is likely to be least disruptive to other cells, through negotiation with controllers at other cells, This approach, which we call ''polite replanning,'' has the advantage of retaining much of any original distributed plan, while avoiding wide propagation of the disruption through the rest of the system, We apply this concept to the domain of distributed factory rescheduling, and describe PRIAM (polite rescheduler for intelligent automated manufacturing), a ''polite'' rescheduling architecture which is currently under development, Simulation results show that the use of negotiation in ''polite'' rescheduling prevents the wide propagation of disruption from an initial local disruption.

关键词： Manufacturing automation Job shop scheduling Manufacturing systems Control systems Production facilities Flexible manufacturing systems Pulp manufacturing Automatic control computer architecture Computational modeling

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Centralized wireless MAC protocols using slotted ALOHA and dynamic TDD transmission

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PERFORMANCE EVALUATION 1996年 27-8卷 331-346页

作者： Choi, SY Shin, KG Real-Time Computing Laboratory Department of Electrical Engineering and Computer Science The University of Michigan Ann Arbor MI 48109-2122 USA

ALOHA scheme with dynamic Time Division Duplexed (TDD) transmission is designed and analyzed. A centralized (i.e., star) network is adopted as the topology of a cell which consists of a base station and a number of mobile clients. In dynamic TDD transmission mode, a channel is time-shared for downlink and uplink transmissions under the dynamic access control of the base station. We first propose two MAC protocols (called TDD1 and TDD2) depending on how downlink and uplink transmissions are multiplexed. We then analyze throughput and average delay of TDD1 and an alternative ALOHA scheme using Frequency Division Duplexed (FDD) transmission. Finally, we evaluate the performance of these schemes, and compare TDD1 (calculations), TDD2 (simulations), and FDD (calculations). TDD schemes are found to always work as good as, or better than, FDD. TDD2 is observed to outperform TDD1 with respect to the downlink delay in the presence of light uplink and heavy downlink traffic loads while they work almost the same in other cases.

关键词： wireless LANs and MAC protocol star topology slotted ALOHA dynamic Time Division Duplexing (TDD)

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EMERALDS: A microkernel for embedded real-time systems

EMERALDS: A microkernel for embedded real-time systems

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1996 IEEE Real-Time Technology and Applications Symposium, RTAS 1996

作者： Zuberi, Khawar M. Shin, Kang G. Real-Time Computing Laboratory Department of Electrical Engineering and Computer Science University of Michigan Ann Arbor MI 48109-2122 United States

EMERALDS (Extensible Microkernel for Embedded Real Time Distributed Systems) is a real time microkernel designed for cost conscious small to medium size embedded systems. It not only offers standard OS services like multi threaded processes, real time scheduling, protected address spaces, message passing, semaphores, and timers, but does so in an efficient manner while keeping the kernel size to just tens of kilobytes. For efficiency, EMERALDS uses the novel approach of mapping the kernel into each user level address space, so even with full memory protection, system calls do not need context switches unless a user level server is involved. EMERALDS also provides the flexibility for users to add communication protocol stacks and device drivers as user level servers without modifying the kernel. We have completed a uniprocessor version of EMERALDS for the Motorola 68040 processor whose size is under 13 KBytes. Context switch takes under 12 /spl mu/s and system calls have overhead just 1.8 /spl mu/s more than that of simple subroutine calls. © 1996 IEEE.

关键词： Message passing

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