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检索条件"机构=Microelectronics System Design Lab"

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MOS fully analog reinforcement neural network chip

MOS fully analog reinforcement neural network chip

引用

IEEE International Symposium on Circuits and systems (ISCAS 2001)

作者： Al-Nsour, M. Abdel-Aty-Zohdy, H.S. Microelectronics System Design Lab. Oakland University Rochester MI 48309 United States

ISBN: (纸本)0780366859

This paper addresses the design and implementation of an analog MOS, reinforcement neural network by compact and novel subcircuits. system implementation was optimized for minimum silicon area and maximum input signal swing. The chip, consisting of two three-input neurons, is designed and implemented using 1.5 μm CMOS n-well technology and occupied 0.114mm2. Due to the limited number of pads on a TinyChip, only two neurons were implemented. The ANN system is to be used for gas recognition applications, with present off-chip learning. Learning through digital genetic algorithms implementation is successfully achieved, and will be further implemented in silicon for integrated system-on-a-chip.

关键词： Neural networks

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Analog multiplexing in time domain for biochemical measurement processing

Analog multiplexing in time domain for biochemical measureme...

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2002 45th Midwest Symposium on Circuits and systems

作者： Patel, Apurva Terry, Tara Abdel-Aty-Zohdy, H.S. Microelectronics System Design Lab Oakland University Electrical Engineering Department Rochester MI 48309 United States

Digital Multiplexers and Analog multiplexers, through the use of filters and their applications implemented in frequency domain, which requires extensive hardware and is costly have seen substantial amount of research compared to an analog multiplexer in time domain. This Paper Presents design, Simulation, Implementation and Evaluation of a four-to-one analog multiplexer. The analog multiplexer is implemented with the help of four buffers and four transmission gates using 0.35 μm CMOS Technology with optimum linear ranges that covers 60% of total input supply voltage. The analog multiplexer is developed for a biochemical preprocessing unit to multiplex time-varying analog input signals coming from real-time sensor arrays and to connect the selected input to one A/D converter for digital implementation of a bio-inspired intelligent signal detection system or to an analog implemented biochemical detection system.

关键词： Multiplexing equipment

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Optimal-weights sensors-measurement fusion using genetic algorithms

Optimal-weights sensors-measurement fusion using genetic alg...

引用

2001 Midwest Symposium on Circuits and systems (MWSCAS 2001)

作者： Sharawi, Mohammad S. Abdel-Aty-Zohdy, Hoda S. Ewing, Robert L. Microelectronics System Design Lab. Electrical and Systems Engineering Oakland University Rochester MI 48309 United States

Although there are many simulated Genetic Algorithms (GAs) in applications, less research has been directed toward their practical hardware implementations. In this paper we present a GA for optimum sensors-measurement fusion and characteristics weights. A multilevel verification of the GA is performed via the Mentor Graphics design Architect (DA) and ModelSim CAD tools. In particular the design of efficient universal multipliers, dividers, and their integrated circuits is addressed. Effective mutation and crossover apprache has been implemented in the GA system operation. It requires 960 clock cycles for complete iteration of 64 chromosomes, each with 3 genes of two binary-bits. This requires only 12 μsec when implemented in the 0.25 μm CMOS technology. The GA system is developed for a preprocessing unit to select optimal weights from real-time sensors measurement, and for fused measurements as in electronic nose, integrated accelerometer systems, and for performance enhancement of recurrent dynamic neural networks in noisy environments. The proposed approach, simulation results, and possible experimental results will be presented.

关键词： Genetic algorithms

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Intelligent information processing using neural networks and genetic algorithms

Intelligent information processing using neural networks and...

引用

43rd Midwest Circuits and systems Conference (MWSCAS-2000)

作者： Abdel-Aty-Zohdy, Hoda S. Ewing, Robert L. Microelectronics System Design Lab. Electrical and Systems Engineering Oakland University Rochester MI 48309 United States

Intelligent Information Processing (IIP) or the smart processing of signals in communication systems and data measurements from multi-sensor systems are needed for advanced micro autonomous applications. A balanced combination of efficient algorithms, fast networks, and collaboration of the different technologies are required for smaller, faster, and more efficient system-on-a-chip applications. In this paper we present guidelines/approach for intelligent information processing using Neural Networks (NNs) and Genetic Algorithms (GAs) which are capable of learning through discovery and/or reinforcement with features optimization through chromosome mutations of GAs. Specific details about a special application for Electronic-Nose (EN) implementation to discriminate among four chemicals, using reinforcement NN implemented tiny-chip and a GA system implementation is presented with test results.

关键词： Intelligent agents

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Formal verification and performance evaluation of logic integrated systems based on hierarchical analysis

Formal verification and performance evaluation of logic inte...

引用

2001 Midwest Symposium on Circuits and systems (MWSCAS 2001)

作者： El-Licy, Fatma A. Abdel-Aty-Zohdy, Hoda S. Microelectronics System Design Lab. Department of Elec. and Syst. Eng. Oakland University Rochester MI 48309 United States

Formal verification of Very Large Scale Integrated Circuit (VLSIC) involves the formal correctness of the functionality of a given design, while circuit validation involves the reliability and efficiency of the design. A hierarchical approach for computation of ICs design efficiency is proposed and implemented using figures of merit. The work has been motivated to partially complete an ICs formal verification tool. The implemented system is integrated into a formal verification environment to reflect the performance of the verified system. The system is capable of analizing the power dissipation and figures of merit using equivalent R and C components. The hierarchical analysis and evaluation of figures of merit general factors obtained at different system levels represent performance evaluation of each gate. An illustrative example of a 6×6 carry look-a-head adder is given and worst case conditions have been determined. The system performance may thus be improved.

关键词： VLSI circuits

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A resonance enhanced 5.2-GHz-band monolithic CMOS LNA with 0.7-V supply

A resonance enhanced 5.2-GHz-band monolithic CMOS LNA with 0...

引用

ICSICT-2006: 2006 8th International Conference on Solid-State and Integrated Circuit Technology

作者： Jing, Yi-Ou Li, Yong Shen, Yi-Hao Lai, Zong-Sheng Jing, Wei-Ping Institute of Microelectronics Circuits and System East China Normal University Shanghai 200062 China Jiangsu Provincial Key Lab of ASIC Design Nantong University Nantong 226007 China

ISBN: (纸本)1424401615

A resonance enhancement technology for low-noise amplifier (LNA) design is investigated in this paper. In this proposed architecture, the character of series/parallel LC resonant tank is used for input and output networks. The LNA is operating at 5.2 GHz, which consumes 8 mW from a 0.7 V supply with a voltage gain of 17.9 dB. It shows good IIP3 of +1.8mW and low noise figure of 2.9 dB. The balanced performance is good at this level of power consumption. © 2006 IEEE.

关键词： CMOS integrated circuits

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Wavelet based RDNN for software reliability estimation

Wavelet based RDNN for software reliability estimation

引用

11th IEEE Symposium on Computers and Communications, ISCC 2006

作者： Smiarowski, Adam Abdel-Aty-Zohdy, Hoda S. Sherif, Mostafa Hashem Shah, Hemal Microelectronics System Design Lab. Oakland University Rochester MI 48309 United States AT and T Bell LabsC5-2018 Middletown NJ 007748 United States

ISBN: (纸本)0769525881

Using the wavelet basis in Recurrent Dynamic Neural Network (RDNN) can improve the failure event estimation of software defect tracking in telecommunications. Non-linearity of the system is represented by proper selection of the wavelet function. This RDNN handles noisy data and enhances the speed of convergence as compared with alternate approaches. A new adaptive RDNN is presented where software deployment testing observations are used to synthesize intrinsic model parameters. © 2006 IEEE.

关键词： Recurrent neural networks

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Bio-inspired integrated circuits for signal perception and processing

Bio-inspired integrated circuits for signal perception and p...

引用

2003 Nanotechnology Conference and Trade Show - Nanotech 2003

作者： Abdel-Aty-Zohdy, Hoda S. Ewing, Robert L. Microelectronics System Design Lab Department of Electrical Engineering Rochester MI 48309 United States Information Directorate Air Force Research Laboratory Wright-Patterson AFB OH 45433 United States

ISBN: (纸本)0972842209

Bio-inspired systems utilizing neural networks (NNs) and genetic algorithms (GAs) are presented for communications, networking information dissemination, and real-time control in signal perception and processing (SPP). VLSI and nano circuits and systems will provide affordable, reproducible, and reliable front-end high performance SPP. Sample applications are presented for integrated intelligent E-Nose systems, and Communication systems which include: i-Self-Organizing feature Map for discovery, ii- Recurrent Dynamic Neural Networks (NNs), with output neurons feedback and feed forward arrays for noisy signals, iii- Reinforcement NNs for applications with only key features, rather than a known model, iv- Spiking NNs that adjust their synapses subject to changes in the environment, and v- Genetic Algorithms for characterization and optimization.

关键词： Integrated circuits

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Novel usage of wavelets as basis in RDNN for telecommunication applications

Novel usage of wavelets as basis in RDNN for telecommunicati...

引用

2005 IEEE International 48th Midwest Symposium on Circuits and systems, MWSCAS 2005

作者： Shah, Hemal Abdel-Aty-Zohdy, Hoda S. Sherif, M. Hashem Microelectronics System Design Lab. Oakland University Rochester MI 48309 AT and T Bell Labs. C5-2018 200 S. Laurel Avenue Middletown NJ 007748

ISBN: (纸本)0780391977

The paper explores the use of wavelet basis Recurrent Dynamic Neural Network (RDNN) to improve the estimation of reliability growth of communication network's software. The presented RDNN handles noise contaminated data and provides enhanced speed and performance of the system as compared with alternate approaches. Non-linearity of the system is represented by proper selection of the wavelet function. The Integrated defect tracking model parameters and the data are fed to the RDNN and the network is trained for optimizing the defect tracking model performance. The designed system will assist the service release management in obtaining more effective risk reduction. Using wavelet basis for RDNN requires only 10 iterations compared to 200 iterations with hump as basis function. It also reduces the maximum percentage error from 88% to 7.69% in the expected outputs. This also improves the telecommunication system defect tracking and network deployment. © 2005 IEEE.

关键词： Wavelet transforms

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Three Bio-Inspired Approaches to Telecommunications Defect-Tracking and Reliability-Estimation

Three Bio-Inspired Approaches to Telecommunications Defect-T...

引用

Midwest Symposium on Circuits and systems (MWSCAS)

作者： Hoda S Abdel-Aty-Zohdy Mostafa Hashem Sherif Adam Smiarowski Microelectronics System Design Lab Electrical and Computer Engineering Oakland University Rochester MI USA

Three alternative bio-inspired approaches are proposed to investigate telecommunication system reliability and defect tracking. They employ a recent model for the failure discovery in the associated system software. These are: half-sibling and a clone (HSAC) genetic algorithm; a recurrent dynamic neural network (RDNN) requiring parametric adjustments and using wavelets as basis; another RDNN with Adaptive parameters to incoming stream of input data, such that the error in failure intensity is minimized, subject to the model constraints. Each approach aims to improve speed of convergence, reliability, noise tolerance, and suitability for hardware implementation. Simulation results seem to favor the ARDNN since it iterates (about 10) on the shape of the wavelet basis and provide adequate recovery of the data in the form of piecewise linear differential.

关键词： Telecommunication network reliability system software Cloning Genetic algorithms Neural networks Recurrent neural networks Convergence Noise shaping Hardware Shape

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