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检索条件"机构=Microelectronics System Design Lab"
32 条 记 录,以下是1-10 订阅
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Equivalent Circuit Model of Strip Line up to 110GHz  13
Equivalent Circuit Model of Strip Line up to 110GHz
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13th Asia-Pacific International Symposium on Electromagnetic Compatibility and Technical Exhibition, APEMC 2022
作者: Xu, Ji Wang, Da-Wei Liu, Jun Su, Guo-Dong Zhao, Wen-Sheng Xi'An Jiaotong University Key Lab of Micro-Nano Electronics and System Integration of xi'An City School of Microelectronics Shaanxi Xi'an710049 China Hangzhou Dianzi University Zhejiang Prov. Key Lab of Large-Scale Integrated Circuit Design School of Electronics Information Zhejiang Hangzhou310018 China
Based on the wafer level packaging technology, different widths and lengths of the strip line was designed, fabricate and measured. Meanwhile, to characterize the high frequency characteristics of the strip line, the ... 详细信息
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Application of Vernier Principle to Photoelectric Autocollimator for Improvement of Accuracy, Angular Range and Speed  15
Application of Vernier Principle to Photoelectric Autocollim...
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15th International Scientific-Technical Conference on Actual Problems of Electronic Instrument Engineering, APEIE 2021
作者: Golitsyn, Andrey V. Golitsyn, Alexandr A. Dmitriev, Alexander K. Seyfi, Natalia A. State Technical University Design and Technology Institute of Applied MicroelectronicsLaser System Department Novosibirsk Electronic System Modeling Department Novosibirsk Russia Novosibirsk State Technical University Radiophysics Deparnment Novosibirsk State UniversityDepartment of Electrical Complexes Novosibirsk Russia Novosibirsk State Technical University Laser System Department Novosibirsk Russia Novosibirsk State Technical University Lab Quantum Cryogenic Electronics Novosibirsk Russia
An improvement of photoelectric autocollimator is proposed. Periodical structures of light source grating and photodetector array form an additional combination signal of Vernier type. The solution promises to exceed ... 详细信息
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An Efficient Multi-fidelity Bayesian Optimization Approach for Analog Circuit Synthesis
arXiv
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arXiv 2019年
作者: Zhang, Shuhan Lyu, Wenlong Yang, Fan Yan, Changhao Zhou, Dian Zeng, Xuan Hu, Xiangdong State Key Lab of ASIC & System Microelectronics Department Fudan University China Shanghai High Performance Integrated Circuit Design Center China University of Texas at Dallas Dallas United States
This paper presents an efficient multi-fidelity Bayesian optimization approach for analog circuit synthesis. The proposed method can significantly reduce the overall computational cost by fusing the simple but potenti... 详细信息
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A reconfigurable routing method for fault-tolerant mesh-based network on chip
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Journal of Information and Computational Science 2013年 第1期10卷 157-165页
作者: Liu, Yanhua Ruan, Ying Lai, Zongsheng Sun, Ling Institute of Microelectronics Circuit and System East China Normal University Shanghai 200241 China Jiangsu Provincial Key Lab. of ASIC Design Nantong University Nantong 226019 China State Key Laboratory of Computer Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing 100190 China
As the semiconductor industry advances to nano-technology points, Network on Chip (NoC) components are becoming vulnerable to errors during the system operation. Consequently, fault-tolerant techniques for NoC are nee... 详细信息
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Energy and thermal aware mapping for mesh-based NoC architectures using multi-objective ant colony algorithm
Energy and thermal aware mapping for mesh-based NoC architec...
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IEEE International Conference on Computer Research and Development
作者: Liu, Yanhua Ruan, Ying Lai, Zongsheng Jing, Weiping Dept. of Electronic Computer and Software Systems Institute of Microelectronics Circuit and System East China Normal University Shanghai China Dept. of Electronic Engineering Jiangsu Provincial Key Lab. of ASIC Design Nantong University Nantong China
Where IP cores to be mapped must be carefully solved for any given application in order to optimize different performance metrics in Network-on-Chip (NoC) design flow. The optimization of different performance metrics... 详细信息
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Modeling and simulation for on-chip power grid networks by locally dominant krylov subspace method
Modeling and simulation for on-chip power grid networks by l...
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2008 International Conference on Computer-Aided design, ICCAD
作者: Yan, Boyuan Tan, Sheldon X.-D. Chen, Gengsheng Wu, Lifeng Department of Electrical Engineering University of California Riverside CA 92521 United States ASIC and System State-Key-Lab Microelectronics Dept. Fudan Univeristy Shanghai 200433 China Cadence Design Systems Inc. San Jose CA 95134 United States
Fast analysis of power grid networks has been a challenging problem for many years. The huge size renders circuit simulation inefficient and the large number of inputs further limits the application of existing Krylov... 详细信息
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An E-Nose Haar Wavelet Preprocessing Circuit for Spiking Neural Network Classification
An E-Nose Haar Wavelet Preprocessing Circuit for Spiking Neu...
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2008 IEEE International Symposium on Circuits and systems (ISCAS 2008), vol.7
作者: Jacob N. Allen Safa B. Hasan Hoda S. Abdel-Aty-Zohdy Robert L. Ewing Microelectronics System Design Lab Department of Elect. and Computer Engineering Oakland University MI USA Information Directorate Air Force Research Laboratories Wright Patterson Air Force Base OH USA
A simulation model for polymer film chemical sensors is developed based on a 1 dimensional diffusion equation. Using this model, electronic nose smell prints produced by the 32 sensor array of a Cyranose 320 are simul... 详细信息
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Modeling and simulation for on-chip power grid networks by locally dominant Krylov subspace method  08
Modeling and simulation for on-chip power grid networks by l...
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IEEE International Conference on Computer-Aided design
作者: Boyuan Yan Sheldon X.-D. Tan Gengsheng Chen Lifeng Wu Department of Electrical Engineering University of California Riverside CA USA ASIC & System State-Key-Lab MicroElectronics Department Fudan University Shanghai China Cadence Design Systems Inc. San Jose CA USA
Fast analysis of power grid networks has been a challenging problem for many years. The huge size renders circuit simulation inefficient and the large number of inputs further limits the application of existing Krylov... 详细信息
来源: 评论
Wide Band Injection-Locked Quadrature Prescaler Based on Ring Oscillators
Wide Band Injection-Locked Quadrature Prescaler Based on Rin...
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2008 9th International Conference on Solid-State and Integrated-Circuit Technology
作者: Zi-yan Chen Lei Chen He-liang Ma Zong-sheng Lai Wei-ping Jing Institute of Microelectronics Circuit & System East China Normal University Engineering Research Center for Nanophotonics & Advanced Instrument Ministry of EducationEast China Normal University Nantong University Jiangsu Province Key Lab of ASIC Design
<正>A wide locking range injection-locked prescaler based on CMOS ring oscillators in the 0.25-μm CMOS process is ***’s free-running frequency is 1.47GHz,and the locking range covers from 1GHz to 2.4GHz with in-ph... 详细信息
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Bio-inspired integrated chips for telecommunications S/W defect-tracking
Bio-inspired integrated chips for telecommunications S/W def...
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ISSPIT 2007 - 2007 IEEE International Symposium on Signal Processing and Information Technology
作者: Abdel-Aty-Zohdy, Hoda S. Sherif, Mostafa Hashem Smiarowski Jr., Adam Searing, Brian Microelectronics System Design Lab. Electrical and Computer Engineering Department Oakland University Rochester MI 48309 United States Air Force Research Lab. WPAFB/RITA Dayton OH 45433-7334 United States AT and T C5-2018 Middletown NJ 007748 United States
Defect tracking is important in evaluating the reliability of the software used in telecommunication networks. Bio-inspired integrated approaches and embedded chips have been developed and implemented to track improve... 详细信息
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