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检索条件"机构=Microelectronics System Design Laboratory"

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An algorithm for the design of a residue-to-binary converter

An algorithm for the design of a residue-to-binary converter

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Midwest Symposium on Circuits and systems (MWSCAS)

作者： A.A. Hiasat H.S. Abdel-Aty-Zohdy Microelectronics System Design Laboratory Department of Electrical and Systems Engineering Oakland University Rochester MI USA

This paper presents a new algorithm which converts moduli (2/sup k/, 2/sup k/-1, 2/sup k/-1-1) residue numbers to their binary equivalents. A suitable hardware implementation which utilizes binary adders, and needing no memory, is proposed. If the system is pipelined, then the throughput rate is that of a single (3k-1) bits adder. Thus, hardware requirements and execution time are less, with corresponding larger dynamic range.

关键词： Algorithm design and analysis Signal processing algorithms Hardware Equations microelectronics Laboratories design engineering systems engineering and theory Throughput Adders

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A high-speed division algorithm for residue number system

A high-speed division algorithm for residue number system

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IEEE International Symposium on Circuits and systems (ISCAS)

作者： A.A. Hiasat H.S. Abdel-Aty-Zohdy Microelectronics System Design Laboratory Department of Electrical and Systems Engineering Oakland University Rochester MI USA

A new algorithm for one of the longstanding problems in residue number system, namely division, is presented. The algorithm is very simple. It approaches the paper-and-pencil division procedure where the quotient is selected to guarantee a non-negative remainder. This algorithm does not require sign and overflow detection, scaling, or redundant moduli. Based on computer simulation results, the algorithm is four times faster than the most recent and competitive published work by Lu and Chiang (see IEEE Trans. Compu., vol. C-41, no. 8, p. 1026-32, 1992).

关键词： Hardware Cathode ray tubes microelectronics Laboratories design engineering systems engineering and theory Computer simulation Digital arithmetic Dynamic range Decoding

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A genetic algorithm tracking model for product deployment in telecom services

A genetic algorithm tracking model for product deployment in...

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2005 IEEE International 48th Midwest Symposium on Circuits and systems, MWSCAS 2005

作者： Murphy, Linda Abdel-Aty-Zohdy, Hoda S. Hashem-Sherif, M. Microelectronics System Design Laboratory Oakland University Electrical and Systems Engineering Rochester MI United States AT and T Bell Labs. C5-2018 200 S. Laurel Avenue Middletown NJ United States

ISBN: (纸本)0780391977

Genetic algorithms (GA) are designed to search for, discover and emphasize good solutions by applying selection and crossover techniques, inspired by nature, to supply solutions to engineering systems. Genetic algorithms operate on pieces of information like nature does on genes in the course of evolution. All individuals of one generation are evaluated by a fitness function. This paper presents an approach to implement a genetic algorithm to depict a recently developed "Integrated Model" for defect tracking for product deployment in telecommunication systems by means of a solution space representing target variables. The genetic algorithm inputs these target values as dynamic input measurements. From these measurements, the best possible fused values are found for the target variables. The goal of the genetic algorithm is dynamically to update the parameters applied to the input measurements to find the optimum solution for the defect tracking model system. Focus will be given to one dimension of sensor input measurements consisting of three four-bit binary sensor inputs varying within a given range of data points. The genetic algorithm is applied to these inputs by means of a 64 6-bit random member binary population using the "Half-Sibling and a Clone" (HSAC) technique of crossover and mutation. The population members are evaluated using a fitness function where the fittest individuals are retained to survive and produce offspring for the next generation and the remainder are discarded. Genetic diversity is maintained through using a roulette wheel technique. The simulation tool MATLAB will be used to simulate the genetic algorithm. The genetic algorithm will be completed in VLSI using Verilog and the Mentor Graphics tools. The first stage components have been designed and completed using the Mentor Graphics tool-set. © 2005 IEEE.

关键词： Genetic algorithms

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Analog multiplexing in time domain for biochemical measurement processing

Analog multiplexing in time domain for biochemical measureme...

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Midwest Symposium on Circuits and systems (MWSCAS)

作者： A. Patel T. Terry H.S. Abdel-Aty-Zohdy Microelectronics System Design Laboratory (MSDL) Electrical and Systems Engineering Department Oakland University Rochester MI USA

Digital Multiplexers and Analog multiplexers, through the use of filters and their applications implemented in frequency domain, which requires extensive hardware and is costly have seen substantial amount of research compared to an analog multiplexer in time domain. This Paper Presents design, Simulation, Implementation and Evaluation of a four-to-one analog multiplexer. The analog multiplexer is implemented with the help of four buffers and four transmission gates using 0.35 /spl mu/m CMOS Technology with optimum linear ranges that covers 60% of total input supply voltage. The analog multiplexer is developed for a biochemical preprocessing unit to multiplex time-varying analog input signals coming from real-time sensor arrays and to connect the selected input to one A/D converter for digital implementation of a bio-inspired intelligent signal detection system or to an analog implemented biochemical detection system.

关键词： Time measurement Multiplexing Sensor arrays CMOS technology Intelligent sensors Digital filters Frequency domain analysis Hardware Voltage Data preprocessing

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Plasticity recurrent spiking neural networks for olfactory pattern recognition

Plasticity recurrent spiking neural networks for olfactory p...

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Midwest Symposium on Circuits and systems (MWSCAS)

作者： J.N. Allen H.S. Abdel-Aty-Zohdy R.L. Ewing Microelectronics System Design Laboratory Department of Electrical and System Engineering Oakland University Rochester MI USA Information Directorate Air Force Research Laboratory OH USA

This paper introduces a novel spiking neural network methodology, and applies it to an odorant learning and detection application. Spike-time dependent plasticity can support coding schemes that are based on spatio-temporal spike patterns. Spiking (or pulsed) neural networks (SNNs) are models which explicitly take into account the timing of inputs. The network input and output are usually represented as series of spikes (delta function or more complex shapes). Plasticity SNNs have an advantage of being able to recurrently process information. Spike-time dependent plasticity can enhance signal transmission by selectively strengthening synaptic connections that transmit precisely timed spikes at the expense of those synapses that transmit poorly timed spikes. Complete theory describes the spiking network's digital implementation. Theory is verified using simulation of a biologically plausible odor environment with 1023 odor receptor inputs. Stochastic on-chip learning uses sampling and a correlation filter to learn odors despite noisy environment conditions. Simulation and Verilog chip design are tested on a field programmable gate array. A scalable field programmable gate array implementation with 1024 inputs, 1 output, and expansion capability for unlimited outputs is synthesized into 87,062 gates

关键词： Neural networks Recurrent neural networks Olfactory Pattern recognition Biological system modeling Field programmable gate arrays Timing Shape Stochastic processes Sampling methods

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IoT Multi-control Bionic Manipulator's design 3

IoT Multi-control Bionic Manipulator's Design

引用

3rd International Conference on Circuits, system and Simulation, ICCSS 2019

作者： Lili, Tang Qijun, Huang Wei, Huang Zhixing College of Hubei University Department of Computer and Information Engineering Wuhan China College of Wuhan University Department of Microelectronics Physics and Technology Wuhan China Fourth Laboratory System Design Institute of Hubei Aerospace Technology Academy Wuhan Wuhan China

ISBN: (纸本)9781728136578

This design uses STM32 microcontroller as the core controller of the mechanical arm, transplants Linux operating system to the S3C2440 development board and establishes the LAN server, realizes multiple functions and a variety of control mode: Android mobile app, personal PC in the local area network and gesture-sensing gloves can be used to control mechanical arm, it can also make the operation automatically. At the same time, because the server built, Linux system and QT interface transplanted are on S3C2440, so that the development board and all computers in the local area network can monitor the mechanical arm. This design is widely used in the field of intelligent industry, environmental exploration, intelligent home and so on. © 2019 IEEE.

关键词： Internet of things

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Electronic nose inhibition in a spiking neural network for noise cancellation

Electronic nose inhibition in a spiking neural network for n...

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IEEE Symposium on Computational Intelligence and Bioinformatics and Computational Biology (CIBCB)

作者： J.N. Allen H.S. Abdel-Aty-Zohdy R.L. Ewing Microelectronics System Design Laboratory Oddand University Rochester MI USA Information Directorate Air Force Research Laboratory OH USA

An olfaction detection spiking neural network that detects binary odor patterns is analyzed and implemented. This paper presents a new method for inhibiting spiking neural networks by modulating a detection threshold. Interference noise from active odors is measured by a single inhibitory neuron. The inhibition neuron changes the detection threshold to create tolerance for a system with multiple odors present. A digital implementation of the inhibition is simulated. Comparative results prove that threshold modulation reduces false-positive detection error in high noise scenarios where fifteen odors are active simultaneously.

关键词： Electronic noses Intelligent networks Neural networks Noise cancellation Sensor arrays Neurons Biological system modeling Chemical sensors Biosensors Real time systems

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Wavelet Based RDNN for Software Reliability Estimation

Wavelet Based RDNN for Software Reliability Estimation

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IEEE Symposium on Computers and Communications (ISCC)

作者： A. Smiarowski H.S. Abdel-Aty-Zohdy M.H. Sherif Hemal Shah Microelectronics System Design Laboratory Oakland University Rochester MI USA A and T Bell Laboratories Middletown NJ USA

Using the wavelet basis in Recurrent Dynamic Neural Network (RDNN) can improve the failure event estimation of software defect tracking in telecommunications. Non-linearity of the system is represented by proper selection of the wavelet function. This RDNN handles noisy data and enhances the speed of convergence as compared with alternate approaches. A new adaptive RDNN is presented where software deployment testing observations are used to synthesize intrinsic model parameters.

关键词： Software reliability Application software Neural networks Recurrent neural networks Testing Neurons Nonlinear dynamical systems Equations microelectronics Convergence

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Intra Fast Mode Decision Algorithm and Hardware design for AVS2

Intra Fast Mode Decision Algorithm and Hardware Design for A...

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2021 International Conference on Signal Processing and Machine Learning (CONF-SPML)

作者： Hao Xie Kaiyang Liu Yang Zhao Xiao Zheng Xianguo Qing Science and Technology on Reactor System Design Technology Laboratory Nuclear Power Institute of China School of Software and Microelectronics Peking University

ISBN: (纸本)9781665417358

AVS2 is a kind of video coding standard proposed by China,it adopts 33 intra prediction modes to improve coding performance,while the computational complexity has increased *** order to reduce the complexity of AVS2 intra mode decision and make the AVS2 hardware encoder meet realtime requirements,this paper proposes the AVS2 intra fast mode decision algorithm and hardware *** experimental results show that the intra mode decision algorithm and hardware design proposed in this paper can meet the throughput requirement of 1920 x1080@60 fps at a clock frequency of300 *** using Xilinx FPGA XC7 K325 T 900 on the Vivado HLS platform for synthesis,only 10% of the LUT,5% of FF,5% of BRAM,and 6% of DSP in FPGA resources are consumed to meet the design requirements.

关键词： AVS2 intra coding mode decision

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Unified Rendering Array Driver Runtime Optimization for Graphic Application 6

Unified Rendering Array Driver Runtime Optimization for Grap...

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6th Annual 2018 International Conference on Geo-Spatial Knowledge and Intelligence, GSKI 2018

作者： Ma, Chengcheng Tian, Ze Liu, Honghong Nie, Zhao China Aeronautical Computing Research Institute China Aviation Key Laboratory of Science and Technology on Integrated Circuit and Micro-System Design P.O. Box 710068 China Xiangteng Microelectronics Technology Co. LTD P.O. Box 710068 China

As the core of GPU processing, the performance of Unified rendering array is directly affected by the shader driver. On the basis of research the structure of Unified rendering array processing, this paper proposes a runtime Unified rendering array driver optimization method for graphical application, can according to different graphics application scenario runtime to generate optimized Unified rendering array driver, testing on graphics processors FPGA verification environment, driven by the runtime optimization compared with the traditional full function driver, performance increased by 55% - 270%. © Published under licence by IOP Publishing Ltd.

关键词： Array processing

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