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24th Pan-Hellenic Conference on Informatics, PCI 2020

作者： Spournias, Alexandros Faliagka, Evanthia P. Antonopoulos, Christos S. Voros, Nikolaos Embedded System Design and Applications Laboratory Electrical and Computer Engineering Department University of Peloponnese Greece

ISBN: (纸本)9781450388979

This work proposes a new and innovative approach to the knowledge diffusion, through experiments as well as experiential training, focusing on cutting-edge technologies. These technologies refer to robotic technologies, virtual reality, cyberphysical systems and the Internet of Things, always under the prism of open source and open access approaches. For the diffusion of these technologies, ESDA Lab provides an environment with the infrastructure that supports these technologies creating a living experimental laboratory ecosystem. © 2020 ACM.

关键词： Internet of things

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Verification system interface for VLSI combinational circuits

Verification system interface for VLSI combinational circuit...

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1998 Midwest Symposium on Circuits and systems, MWSCAS 1998

作者： El-Licy, Fatma A. Abdel-Aty-zohdy, Hoda S. Department of Electrical and Systems Engineering Microelectronics System Design Laboratory Oakland University RochesterMI48309-4401 United States

ISBN: (纸本)0818689145

A proof of correctness of a given VLSIC system design is established by proving the consistency and implication of the implemented design with respect to the specified design. The set of conditions that establish such consistency is termed verification conditions (VCs). This paper presents an automatic interface system for the verification of VLSI combinational circuits in which VCs are synthesized from circuit definition. This interface will allow a top down specification of the design (written in a given HDL language) to be parsed into binary tree structure representation. Also, a logical construct is built up from the physical layout specifications of the implemented design (extracted as SPICE file). The top down parse tree along with bottom up logic constructs form the basic building block structure of the front end of the interface system. VCs are then synthesized from the outcomes of the front end through a preprocessor. The back end of the interface system constitutes the preprocessor and a set of designators and modules for manipulating mathematical and logical operations. It provides an environment in which a theorem prover can be used to create a formal proof schema for the VCs which satisfy partial correctness of the circuit under consideration. © 1999 IEEE.

关键词： Specifications

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Exploring the biocomputing frontier

Exploring the biocomputing frontier

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2005 IEEE International 48th Midwest Symposium on Circuits and systems, MWSCAS 2005

作者： Ewing, R.L. Abdel-Aty-Zohdy, H.S. Schuermeyer, F. Liou, L. Moncrief, J.B. Rubeiz, M. Williamson, M. Air Force Research Laboratory Information Directorate Wright-Patterson AFB OH Microelectronics System Design Laboratory Department of Electrical and System Engineering Oakland University Rochester MI Wright State University Department of Electrical Engineering Dayton OH

ISBN: (纸本)0780391977

Stop thinking that the universe is best described by boolean order operations, consider the world of biocomputing. The idea in exploring the multidimensional characteristics of biocomputing systems involves multilevel protein logic interaction with hybrid digital systems (bio/digital/analog systems). In the protein biocomputing world, all models are multilevel and nonlinear exponential in nature. These biocomputing systems are linearized by boundary limited frequency, time response and dimensional ranges. The protein model and its correct development is probably the most difficult aspect for biocomputing issues. Previous protein models were not dealing with 2 and 3 dimensional models, while the current protein models are now faced with high frequency design, due to the emergence of bio-nanodevices. These future biocomputing devices will be chemical sensors, fluidic computer systems, optical switches, nanoactuators, self-repairing polymorphic computing systems, cognitive processors and biorobotics. © 2005 IEEE.

关键词： Boolean algebra

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design and optimization on dynamic power system for self-powered integrated wireless sensing nodes

Design and optimization on dynamic power system for self-pow...

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2005 International Symposium on Low Power Electronics and design

作者： Ma, Dongsheng Wang, Janet M. Somasundaram, Mohankumar N. Hu, Zongqi Integrated System Design Laboratory Electrical and Computer Engineering Department University of Arizona Tucson AZ 85721 United States Digital VLSI Design Laboratory Electrical and Computer Engineering Department University of Arizona Tucson AZ 85721 United States

This paper presents an integrated power system for low-power wireless sensor networks with dynamic efficiency optimization technique. By adaptively resizing power transistors and adjusting switching frequency, system efficiency is enhanced significantly. Theoretical analysis is elaborated to support the proposed technique. A prototype integrated power system for self-powered photovoltaic wireless sensing node was designed and simulated with TSMC 0.35μm CMOS process. With a power range of 0.5μW to 10mW, power efficiency stays above 71%. Tolerance between theoretical and simulated optimal power transistor sizes is less than 6.7%, while that of optimal switching frequencies is less than 5%. The paper gives another solution to minimizing system power in the perspective of power processing. Copyright 2005 ACM.

关键词： Power electronics

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Plasticity recurrent spiking neural networks for olfactory pattern recognition

Plasticity recurrent spiking neural networks for olfactory p...

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2005 IEEE International 48th Midwest Symposium on Circuits and systems, MWSCAS 2005

作者： Allen, J.N. Abdel-Aty-Zohdy, H.S. Ewing, R.L. Microelectronics System Design Laboratory Department of Electrical and System Engineering Oakland University Rochester MI 48309 Air Force Research Laboratory Information Directorate Wright-Patterson AFB OH 45433

ISBN: (纸本)0780391977

This paper introduces a novel spiking neural network methodology, and applies it to an odorant learning and detection application. Spike-time dependent plasticity can support coding schemes that are based on spatio-temporal spike patterns. Spiking (or pulsed) neural networks (SNNs) are models which explicitly take into account the timing of inputs. The network input and output are usually represented as series of spikes (delta function or more complex shapes). Plasticity SNNs have an advantage of being able to recurrently process information. Spike-time dependent plasticity can enhance signal transmission by selectively strengthening synaptic connections that transmit precisely timed spikes at the expense of those synapses that transmit poorly timed spikes. Complete theory describes the spiking network's digital implementation. Theory is verified using simulation of a biologically plausible odor environment with 1023 odor receptor inputs. Stochastic on-chip learning uses sampling and a correlation filter to learn odors despite noisy environment conditions. Simulation and Verilog chip design are tested on a Field Programmable Gate Array. A scalable Field Programmable Gate Array implementation with 1024 inputs, 1 output, and expansion capability for unlimited outputs is synthesized into 87,062 gates. © 2005 IEEE.

关键词： Neural networks

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Conditional techniques for low power consumption flip-flops

Conditional techniques for low power consumption flip-flops

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作者： Nedovic, Nikola Aleksic, Marko Oklobdzija, Vojin G. Department of Electrical and Computer Engineering Advanced Computer System Design Laboratory University of California Davis CA 95616 United States

ISBN: (纸本)0780370570

Conditional capture and conditional precharge techniques for high-performance flip-flops are reviewed in terms of power and delay. It is found that application of conditional techniques can improve Energy-Delay Product for up to 14% for 50% input activity and save more than 50% in power consumption for quiet input. This property makes conditional methods suitable for high-performance VLSI systems. © 2001 IEEE.

关键词： Flip flop circuits

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Large circuit models: opportunities and challenges

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Science China(Information Sciences) 2024年第10期67卷 25-66页

作者： Lei CHEN Yiqi CHEN Zhufei CHU Wenji FANG Tsung-Yi HO Ru HUANG Yu HUANG Sadaf KHAN Min LI Xingquan LI Yu LI Yun LIANG Jinwei LIU Yi LIU Yibo LIN Guojie LUO Hongyang PAN Zhengyuan SHI Guangyu SUN Dimitrios TSARAS Runsheng WANG Ziyi WANG Xinming WEI Zhiyao XIE Qiang XU Chenhao XUE Junchi YAN Jun YANG Bei YU Mingxuan YUAN Evangeline F.Y.YOUNG Xuan ZENG Haoyi ZHANG Zuodong ZHANG Yuxiang ZHAO Hui-Ling ZHEN Ziyang ZHENG Binwu ZHU Keren ZHU Sunan ZOU Huawei Noah’s Ark Lab School of Integrated Circuits Peking University Faculty of Electrical Engineering and Computer Science Ningbo University Department of Electronic and Computer Engineering Hong Kong University of Science and Technology Department of Computer Science and Engineering The Chinese University of Hong Kong School of Integrated Circuits Southeast University Huawei HiSilicon Peng Cheng Laboratory School of Computer Science Peking University School of Microelectronics State Key Laboratory of Integrated Chips and System Fudan University School of Artificial Intelligence Shanghai Jiao Tong University

Within the electronic design automation(EDA) domain, artificial intelligence(AI)-driven solutions have emerged as formidable tools, yet they typically augment rather than redefine existing methodologies. These solutions often repurpose deep learning models from other domains, such as vision, text, and graph analytics, applying them to circuit design without tailoring to the unique complexities of electronic circuits. Such an “AI4EDA” approach falls short of achieving a holistic design synthesis and understanding,overlooking the intricate interplay of electrical, logical, and physical facets of circuit data. This study argues for a paradigm shift from AI4EDA towards AI-rooted EDA from the ground up, integrating AI at the core of the design process. Pivotal to this vision is the development of a multimodal circuit representation learning technique, poised to provide a comprehensive understanding by harmonizing and extracting insights from varied data sources, such as functional specifications, register-transfer level(RTL) designs, circuit netlists,and physical layouts. We champion the creation of large circuit models(LCMs) that are inherently multimodal, crafted to decode and express the rich semantics and structures of circuit data, thus fostering more resilient, efficient, and inventive design methodologies. Embracing this AI-rooted philosophy, we foresee a trajectory that transcends the current innovation plateau in EDA, igniting a profound “shift-left” in electronic design methodology. The envisioned advancements herald not just an evolution of existing EDA tools but a revolution, giving rise to novel instruments of design-tools that promise to radically enhance design productivity and inaugurate a new epoch where the optimization of circuit performance, power, and area(PPA) is achieved not incrementally, but through leaps that redefine the benchmarks of electronic systems' capabilities.

关键词： AI-rooted EDA large circuit models (LCMs) multimodal circuit representation learning circuit optimization

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Polarization-induced photocurrent switching effect in heterojunction photodiodes

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Nano Research 2023年第4期16卷 5503-5510页

作者： Dingbo Chen Yu-Chang Chen Guang Zeng Yu-Chun Li Xiao-Xi Li Dong Li Chao Shen Nan Chi Boon S.Ooi David Wei Zhang Hong-Liang Lu State Key Laboratory of ASIC and System Shanghai Institute of Intelligent Electronics&SystemsSchool of MicroelectronicsFudan UniversityShanghai 200433China Key Laboratory for Information Science of Electromagnetic Waves Department of Communication Science and EngineeringFudan UniversityShanghai 200433China Photonics Laboratory Division of ComputerElectricaland Mathematical Sciences and EngineeringKing Abdullah University of Science and Technology(KAUST)Thuwal 23955-6900Kingdom of Saudi Arabia

The unipolar photocurrent in conventional photodiodes(PDs)based on photovoltaic effect limits the output modes and potential versatility of these devices in *** photodiodes with photocurrent switching are emerging as a promising solution for obtaining photoelectric devices with unique and attractive functions,such as optical logic ***,we design an all-solid-state chip-scale ultraviolet(UV)PD based on a hybrid GaN heterojunction with engineered bipolar polarized electric *** introducing the polarization-induced photocurrent switching effect,the photocurrent direction can be switched in response to the wavelength of incident light at 0 V *** particular,the photocurrent direction exhibits negative when the irradiation wavelength is less than 315 nm,but positive when the wavelength is longer than 315 *** device shows a responsivity of up to−6.7 mA/W at 300 nm and 5.3 mA/W at 340 nm,*** particular,three special logic gates in response to different dual UV light inputs are demonstrated via a single bipolar PD,which may be beneficial for future multifunctional UV photonic integrated devices and systems.

关键词： GaN heterostructure ultraviolet(UV)photodiodes bipolar photocurrent optical logic device

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Aerial Active STAR-RIS-assisted Satellite-Terrestrial Covert Communications

arXiv

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arXiv 2025年

作者： Zhang, Chuang Sun, Geng Li, Jiahui Wang, Jiacheng Zhang, Ruichen Niyato, Dusit Mao, Shiwen Quek, Tony Q.S. Computer Science and Technology Jilin University Changchun130012 China Singapore University of Technology and Design Singapore487372 Singapore College of Computer Science and Technology Jilin University Changchun130012 China College of Computing and Data Science Nanyang Technological University Singapore639798 Singapore Key Laboratory of Symbolic Computation and Knowledge Engineering of Ministry of Education Jilin University Changchun130012 China Department of Electrical and Computer Engineering Auburn University AuburnAL36849 United States Information System Technology and Design Pillar Singapore University of Technology and Design Singapore487372 Singapore

An integration of satellites and terrestrial networks is crucial for enhancing performance of next generation communication systems. However, the networks are hindered by the long-distance path loss and security risks in dense urban environments. In this work, we propose a satellite-terrestrial covert communication system assisted by the aerial active simultaneous transmitting and reflecting reconfigurable intelligent surface (AASTAR-RIS) to improve the channel capacity while ensuring the transmission covertness. Specifically, we first derive the minimal detection error probability (DEP) under the worst condition that the Warden has perfect channel state information (CSI). Then, we formulate an AASTAR-RIS-assisted satellite-terrestrial covert communication optimization problem (ASCCOP) to maximize the sum of the fair channel capacity for all ground users while meeting the strict covert constraint, by jointly optimizing the trajectory and active beamforming of the AASTAR-RIS. Due to the challenges posed by the complex and high-dimensional state-action spaces as well as the need for efficient exploration in dynamic environments, we propose a generative deterministic policy gradient (GDPG) algorithm, which is a generative deep reinforcement learning (DRL) method to solve the ASCCOP. Concretely, the generative diffusion model (GDM) is utilized as the policy representation of the algorithm to enhance the exploration process by generating diverse and high-quality samples through a series of denoising steps. Moreover, we incorporate an action gradient mechanism to accomplish the policy improvement of the algorithm, which refines the better state-action pairs through the gradient ascent. Simulation results demonstrate that the proposed approach significantly outperforms important benchmarks, and also validate the performance and practicality under different algorithm parameters and environment settings. Copyright © 2025, The Authors. All rights reserved.

关键词： Deep reinforcement learning

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Biologically-Based Signal Processing Chips with Emphasis on Telecommunication Defect Tracking and Reliability Estimation

Biologically-Based Signal Processing Chips with Emphasis on ...

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IEEE Pacific Rim Conference on Communications, computers and Signal Processing

作者： Hoda S Abdel-Aty-Zohdy Microelectronics System Design Laboratory Department of Electrical and Computer Engineering Oakland University Rochester MI USA

This paper provides observations and motivations to mimic biological information processing. Alternative bio-inspired systems definitions, basics, approaches, algorithms, and chip implementations will be illustrated to offer a base of choice for bio-based Intelligent Information Processing (IIP) systems. Hybrid biological and bio-based IIP are briefly presented. Two specific applications follow with embedded bio-based systems: Bio-chemical sensing and detection E-nose; and Track improvements In the reliability of the software used in telecommunication network deployments. The biologically-based processing discoveries gleaned from observing the spikes in the brain activity of monkeys, introduced the concept of plasticity in synapses used in our embedded Spiking Neural Network (SNN) system for the E-Nose The mathematical construct of a defect tracking classifier is nonlinear, and the event to be recognized involves a sequentially varying or non-stationary phenomenon for telecommunication defect tracking and reliability estimation. Thus, Adaptive Recurrent Dynamic Neural Network (ARDNN) system using wavelet function as the basis improved the failure event estimation of software defect tracking in telecommunications and reduced the error from 88% to L25-8%.

关键词： Biomedical signal processing Signal processing algorithms Information processing Telecommunication network reliability Biological neural networks Application software Embedded software Brain Nonlinear dynamical systems Neural networks

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