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IEEE International Symposium on Circuits and systems (ISCAS)

作者： A.A. Hiasat H.S. Abdel-Aty-Zohdy Microelectronics System Design Laboratory Department of Electrical and Systems Engineering Oakland University Rochester MI USA

A new algorithm for one of the longstanding problems in residue number system, namely division, is presented. The algorithm is very simple. It approaches the paper-and-pencil division procedure where the quotient is selected to guarantee a non-negative remainder. This algorithm does not require sign and overflow detection, scaling, or redundant moduli. Based on computer simulation results, the algorithm is four times faster than the most recent and competitive published work by Lu and Chiang (see IEEE Trans. Compu., vol. C-41, no. 8, p. 1026-32, 1992).

关键词： Hardware Cathode ray tubes microelectronics Laboratories design engineering systems engineering and theory computer simulation Digital arithmetic Dynamic range Decoding

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IoT Multi-control Bionic Manipulator's design 3

IoT Multi-control Bionic Manipulator's Design

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3rd International Conference on Circuits, system and Simulation, ICCSS 2019

作者： Lili, Tang Qijun, Huang Wei, Huang Zhixing College of Hubei University Department of Computer and Information Engineering Wuhan China College of Wuhan University Department of Microelectronics Physics and Technology Wuhan China Fourth Laboratory System Design Institute of Hubei Aerospace Technology Academy Wuhan Wuhan China

ISBN: (纸本)9781728136578

This design uses STM32 microcontroller as the core controller of the mechanical arm, transplants Linux operating system to the S3C2440 development board and establishes the LAN server, realizes multiple functions and a variety of control mode: Android mobile app, personal PC in the local area network and gesture-sensing gloves can be used to control mechanical arm, it can also make the operation automatically. At the same time, because the server built, Linux system and QT interface transplanted are on S3C2440, so that the development board and all computers in the local area network can monitor the mechanical arm. This design is widely used in the field of intelligent industry, environmental exploration, intelligent home and so on. © 2019 IEEE.

关键词： Internet of things

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Cognitive processing using spiking neural networks

Cognitive processing using spiking neural networks

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IEEE National Conference on Aerospace and Electronics (NAECON)

作者： Jacob N. Allen Hoda S. Abdel-Aty-Zohdy Robert L. Ewing Microelectronics System Design Laboratory Department of Electrical and Computer Engineering Oakland University Rochester Hills MI USA Air Force Research Laboratory OH USA

ISBN: (纸本)9781424444946

Powerful parallel cognitive processors can be developed by studying biologically plausible models of cognitive systems in animals and extrapolating key principles to be adapted for implementation in digital computer architectures. The network described here uses basic statistical methods such as proportion sampling on a massively parallel scale to create a general purpose pattern classifier. From these principles, we can achieve auto association and self organization that provides fundamental cognitive processing. Signal preprocessing is essential to transform the signal into a scale and rotation invariant binary pattern. The network avoids the curse of dimensionality by filtering out irrelevant inputs, allowing us to combine large sensor input vectors from multiple sources. Recent hardware designs define the network structure and state in memory, and then use accelerator processor cores to modify these memory structures in parallel.

关键词： Neural networks Neurons Biological system modeling Biology computing Biological information theory Brain modeling computer architecture microelectronics Power engineering and energy Biosensors

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Agile hardware development with rapid hardware definition language

Agile hardware development with rapid hardware definition la...

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IEEE International Conference on Electro-Information Technology

Rapid HDL is a hardware definition language developed in C# for the Microsoft .Net platform. Rapid HDL unifies digital FPGA hardware development and co-software integration. Hardware is scripted using reusable software objects, communication between hardware and software is automatic, and synthesis is automated using a free tool chain. Rapid HDL represents 18,000 lines of code and is freely available under the MIT license.

关键词： Hardware design languages Software libraries Testing Licenses microelectronics Force sensors Field programmable gate arrays Software reusability Software tools High level languages

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XML defined custom microprocessors using Rapid Hardware Definition Language

XML defined custom microprocessors using Rapid Hardware Defi...

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IEEE National Conference on Aerospace and Electronics (NAECON)

Rapid HDL is an object oriented software library for scripting the generation of synthesizable Verilog. A fully functional customized microprocessor is defined and automatically synthesized for an FPGA from an XML specification file. Using a library of blocks, a microprocessor fabric is defined in XML. Control states specify the connections between the fabric blocks during microprocessor operation. Opcodes sequence the control states and provide a vocabulary for assembly programs, which are compiled and executed on the microprocessor.

关键词： Microprocessors Hardware design languages Hardware XML Registers Fabrics Software

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Recent Progress in Reinforcement Learning and Adaptive Dynamic Programming for Advanced Control Applications

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IEEE/CAA Journal of Automatica Sinica 2024年第1期11卷 18-36页

作者： Ding Wang Ning Gao Derong Liu Jinna Li Frank L.Lewis IEEE the Faculty of Information Technology Beijing Key Laboratory of Computational Intelligence and Intelligent SystemBeijing Laboratory of Smart Environmental Protectionand Beijing Institute of Artificial IntelligenceBeijing University of TechnologyBeijing 100124China the School of System Design and Intelligent Manufacturing Southern University of Science and TechnologyShenzhen 518055China the Department of Electrical and Computer Engineering University of Illinois at ChicagoChicago IL 60607 USA the School of Information and Control Engineering Liaoning Petrochemical UniversityFushun 113001China the UTA Research Institute the University of Texas at ArlingtonArlington TX 76118 USA

Reinforcement learning(RL) has roots in dynamic programming and it is called adaptive/approximate dynamic programming(ADP) within the control community. This paper reviews recent developments in ADP along with RL and its applications to various advanced control fields. First, the background of the development of ADP is described, emphasizing the significance of regulation and tracking control problems. Some effective offline and online algorithms for ADP/adaptive critic control are displayed, where the main results towards discrete-time systems and continuous-time systems are surveyed, ***, the research progress on adaptive critic control based on the event-triggered framework and under uncertain environment is discussed, respectively, where event-based design, robust stabilization, and game design are reviewed. Moreover, the extensions of ADP for addressing control problems under complex environment attract enormous attention. The ADP architecture is revisited under the perspective of data-driven and RL frameworks,showing how they promote ADP formulation ***, several typical control applications with respect to RL and ADP are summarized, particularly in the fields of wastewater treatment processes and power systems, followed by some general prospects for future research. Overall, the comprehensive survey on ADP and RL for advanced control applications has d emonstrated its remarkable potential within the artificial intelligence era. In addition, it also plays a vital role in promoting environmental protection and industrial intelligence.

关键词： Adaptive dynamic programming(ADP) advanced control complex environment data-driven control event-triggered design intelligent control neural networks nonlinear systems optimal control reinforcement learning(RL)

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Analog multiplexing in time domain for biochemical measurement processing

Analog multiplexing in time domain for biochemical measureme...

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Midwest Symposium on Circuits and systems (MWSCAS)

作者： A. Patel T. Terry H.S. Abdel-Aty-Zohdy Microelectronics System Design Laboratory (MSDL) Electrical and Systems Engineering Department Oakland University Rochester MI USA

Digital Multiplexers and Analog multiplexers, through the use of filters and their applications implemented in frequency domain, which requires extensive hardware and is costly have seen substantial amount of research compared to an analog multiplexer in time domain. This Paper Presents design, Simulation, Implementation and Evaluation of a four-to-one analog multiplexer. The analog multiplexer is implemented with the help of four buffers and four transmission gates using 0.35 /spl mu/m CMOS Technology with optimum linear ranges that covers 60% of total input supply voltage. The analog multiplexer is developed for a biochemical preprocessing unit to multiplex time-varying analog input signals coming from real-time sensor arrays and to connect the selected input to one A/D converter for digital implementation of a bio-inspired intelligent signal detection system or to an analog implemented biochemical detection system.

关键词： Time measurement Multiplexing Sensor arrays CMOS technology Intelligent sensors Digital filters Frequency domain analysis Hardware Voltage Data preprocessing

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Efficient test generation for built-in self-test boundary-scan template

Efficient test generation for built-in self-test boundary-sc...

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1991 IEEE VLSI Test Symposium: Chip-to-system Test Concerns for the 90''s, VTEST 1991

作者： Nagvajara, P. Karpovsky, M.G. Levitin, L.B. Dept. of Electr. and Comput. Eng. Drexel Univ. PhiladelphiaPA United States Research Laboratory for Design and Testing of Computer and Communication Systems Department of Electrical Computer and System Engineering Boston University United States

An analysis and design of a pseudorandom pattern generator, (PRPG), based on a linear recurrence, for built-in self-test (BIST) boundary scan design is presented. The authors present for the case when r≥s, a design of an s-stage PRPG capable of producing 2s-1 distinct r-bit patterns within 2s-1 clock pulses independent of the hardware realization of the PRPG. For the case when rr distinct r-bit patterns and the expected number T(N) of distinct patterns given a number N of clock pulses were presented. The proposed theoretical average N(T) was shown to be close to the experimental average values Nex(T). Hence, the value N(T) or T(N) can be used as a benchmark for evaluating the efficiency of a BIST boundary scan test generation. © 1991 IEEE.

关键词： Built-in self test

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Bio-Inspired Adaptive Integrated Information Processing

Bio-Inspired Adaptive Integrated Information Processing

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IEEE National Conference on Aerospace and Electronics (NAECON)

作者： Hoda S. Abdel-Aty-Zohdy Microelectronics Systems Design Laboratory Department of Electrical and Computer Engineering Oakland University Rochester MI USA

Biological brains are dramatically more effective in dealing with real-world adaptive information processes and decisions than most advanced computers. Advanced computers can utilize the discipline of classical signal processing whereby providing theoretical mathematical and statistical approaches for information processing, and with the vision of bio-inspired adaptive processing are evolving into neuromorphic integrated sensory processing systems. Numerous MISO (multi-input, single output) sensory applications demand reliable and effective information processing which, at an initial stage may be addressed by solving the key problems of advanced computing platforms, which are: i-massive parallelism; ii-low power consumption of massively large systems; iii-intelligent systems that learn from observations and perform better on the next run; iv-integrated systems for embedded feasibility; and v-systems that adapt to the environment. Thus, our Adaptive Integrated Information Processing (AIIP) approaches, presented in this paper. Two AIIP systems are presented: Neural networks with synaptic plasticity, as our Spiking Neural Networks (SNNs), with up to one million inputs, for chemical sensing and detection; and Adaptive Recurrent Dynamic Neural Networks (ARDNNs) for defect tracking, reliable system deployment, and prognosis for telecommunication and similar applications. Further-our presented AIIP systems may provide a viable solution to offering powerful modulation schemes and transmission rates far beyond current possible communications systems.

关键词： Information processing Power system reliability Biological neural networks Neural networks Recurrent neural networks Biology computing computer vision Adaptive signal processing Biomedical signal processing Neuromorphics

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Next-generation advances in cognitive processing using spiking neural networks for biochemical sensing, radar and rapid HDL

Next-generation advances in cognitive processing using spiki...

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IEEE National Conference on Aerospace and Electronics (NAECON)

作者： Hoda S. Abdel-Aty-Zohdy Jacob Allen Microelectronics Systems Design Laboratory Department of Electrical and Computer Engineering Oakland University Rochester MI USA

ISBN: (纸本)9781424444946

This invited plenary paper introduces a novel spiking neural network methodology, and applies it to an odorant learning, medical and radar detection applications. Rapid HDL is introduced as a 15 minute rapid prototyping approach, where real-time implementations will be demoed on FPGAs. The spike-time dependent plasticity can support coding schemes that are based on spatio-temporal spike patterns. Spiking (or pulsed) neural networks (SNNs) are models which explicitly take into account the timing of inputs. The network input and output are usually represented as series of spikes (delta function or more complex shapes). Plasticity SNNs have an advantage of being able to recurrently process information. Spike-time dependent plasticity can enhance signal transmission by selectively strengthening synaptic connections that transmit precisely timed spikes at the expense of those synapses that transmit poorly timed spikes.

关键词： Next generation networking Neural networks Radar Hardware design languages Signal design Signal processing Signal processing algorithms Biomedical signal processing Field programmable gate arrays Electronic noses

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