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2005 IEEE International 48th Midwest Symposium on Circuits and systems, MWSCAS 2005

作者： Allen, J.N. Abdel-Aty-Zohdy, H.S. Ewing, R.L. Microelectronics System Design Laboratory Department of Electrical and System Engineering Oakland University Rochester MI 48309 Air Force Research Laboratory Information Directorate Wright-Patterson AFB OH 45433

ISBN: (纸本)0780391977

This paper introduces a novel spiking neural network methodology, and applies it to an odorant learning and detection application. Spike-time dependent plasticity can support coding schemes that are based on spatio-temporal spike patterns. Spiking (or pulsed) neural networks (SNNs) are models which explicitly take into account the timing of inputs. The network input and output are usually represented as series of spikes (delta function or more complex shapes). Plasticity SNNs have an advantage of being able to recurrently process information. Spike-time dependent plasticity can enhance signal transmission by selectively strengthening synaptic connections that transmit precisely timed spikes at the expense of those synapses that transmit poorly timed spikes. Complete theory describes the spiking network's digital implementation. Theory is verified using simulation of a biologically plausible odor environment with 1023 odor receptor inputs. Stochastic on-chip learning uses sampling and a correlation filter to learn odors despite noisy environment conditions. Simulation and Verilog chip design are tested on a Field Programmable Gate Array. A scalable Field Programmable Gate Array implementation with 1024 inputs, 1 output, and expansion capability for unlimited outputs is synthesized into 87,062 gates. © 2005 IEEE.

关键词： Neural networks

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Energy diffusion model of bR for voxel identification

Energy diffusion model of bR for voxel identification

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Midwest Symposium on Circuits and systems (MWSCAS)

作者： D. Garcia Neto H.S. Abdel-Aty-Zohdy Microelectronics System Design Laboratory-Department of Electrical and Systems Engineering Oakland University Rochester USA

In this paper, a potential biological structure for computer volumetric memory is investigated. Bacteriorhodopsin is a protein found in the purple membrane of the bacteria Halobacterium salinarum. This protein has light absorption properties that generate different stable states allowing the use of multilevel logic as well as binary logic. CHARMmtrade has been used to simulate the energy response of Bacteriorhodopsin at room temperature 300K for the bR ground state and the other states. The K state takes place after blue light (lambda= 635nm) absorption on the bR state. The energy difference is found to be an increase of 1086.92 kcal/mol which is responsible for triggering the photocycle that also includes the states K, L, M, N, and O. An energy surplus is found between O and bR state that may be spread to surrounding molecules. However, conformational interference does not produce photons necessary for the isomerization reaction. Further quantum molecular (QM) analysis should provide an extended model for this macromolecular energy study

关键词： Biological system modeling Proteins Absorption Logic Biology computing Biomembranes Microorganisms Computational modeling Land surface temperature Stationary state

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Polarization-induced photocurrent switching effect in heterojunction photodiodes

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Nano Research 2023年第4期16卷 5503-5510页

作者： Dingbo Chen Yu-Chang Chen Guang Zeng Yu-Chun Li Xiao-Xi Li Dong Li Chao Shen Nan Chi Boon S.Ooi David Wei Zhang Hong-Liang Lu State Key Laboratory of ASIC and System Shanghai Institute of Intelligent Electronics&SystemsSchool of MicroelectronicsFudan UniversityShanghai 200433China Key Laboratory for Information Science of Electromagnetic Waves Department of Communication Science and EngineeringFudan UniversityShanghai 200433China Photonics Laboratory Division of ComputerElectricaland Mathematical Sciences and EngineeringKing Abdullah University of Science and Technology(KAUST)Thuwal 23955-6900Kingdom of Saudi Arabia

The unipolar photocurrent in conventional photodiodes(PDs)based on photovoltaic effect limits the output modes and potential versatility of these devices in *** photodiodes with photocurrent switching are emerging as a promising solution for obtaining photoelectric devices with unique and attractive functions,such as optical logic ***,we design an all-solid-state chip-scale ultraviolet(UV)PD based on a hybrid GaN heterojunction with engineered bipolar polarized electric *** introducing the polarization-induced photocurrent switching effect,the photocurrent direction can be switched in response to the wavelength of incident light at 0 V *** particular,the photocurrent direction exhibits negative when the irradiation wavelength is less than 315 nm,but positive when the wavelength is longer than 315 *** device shows a responsivity of up to−6.7 mA/W at 300 nm and 5.3 mA/W at 340 nm,*** particular,three special logic gates in response to different dual UV light inputs are demonstrated via a single bipolar PD,which may be beneficial for future multifunctional UV photonic integrated devices and systems.

关键词： GaN heterostructure ultraviolet(UV)photodiodes bipolar photocurrent optical logic device

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Analog computational circuits for neural network implementations

Analog computational circuits for neural network implementat...

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IEEE International Conference on Electronics, Circuits and systems (ICECS)

作者： M. Al-Nsour H.S. Abdel-Aty-Zohdy Microelectronics System Design Laboratory Department of Electrical and Systems Engineering Oakland University Rochester MI USA

High performance NMOS analog circuits which perform voltage addition, average weighing, and signal scaling are presented. Utilization of these circuits in artificial neural network applications is briefly discussed. The circuits are characterized by a simple structure which offers compactness, low voltage supply, and wide input range. In addition, inputs and outputs are voltages which eliminate the need for current voltage conversion. Hence, reduced power consumption and higher performance is achieved. A two-input analog adder has been accomplished through MOSIS 2.0 /spl mu/m n-well CMOS technology at Orbit Semiconductors, and occupies an area of 135/spl times/145 /spl mu/m/sup 2/. Inputs are within /spl plusmn/3 V for 3.3 V supply. Power consumption is less than 0.5 mW and THD is less than -36 dB. Measurements and performance evaluation are presented.

关键词： Analog computers Computer networks Neural networks Artificial neural networks Energy consumption CMOS technology MOS devices Analog circuits Low voltage Adders

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Reinforcement neural learning with application to gas sensors

Reinforcement neural learning with application to gas sensor...

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Midwest Symposium on Circuits and systems (MWSCAS)

作者： H.S. Abdel-Aty-Zohdy Microelectronics System Design Laboratory Department of Electrical and Systems Engineering Oakland University Rochester MI USA

Neural net reinforcement learning algorithm and its application to gas (chemicals) classification and quantification are considered in this paper. The approach does not require memory and has simplified reward/punishment computations. The advantages and disadvantages of the reinforcement algorithm are contrasted against other competing neural algorithms. The reinforcement learning has been found practical, when each gas (chemical) is distinguished by several features and characteristics with possible overlap. The paper also gives an account of integrated circuit digital chip implementation for typical four gases with temperature, pressure, and flow quantity features. The number of required iterations has been found to depend on reward and penalty parameters, as well as the threshold governing the learning. It is believed that our implementation approach has potential uses in auto industry safety and emission control, as well in automated semiconductor manufacturing process.

关键词： Gas detectors Learning Chemicals Neural networks Digital integrated circuits Gases Temperature Industrial control Manufacturing industries Safety

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Reinforcement learning neural network circuits for electronic nose

Reinforcement learning neural network circuits for electroni...

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IEEE International Symposium on Circuits and systems (ISCAS)

作者： H.S. Abdel-Aty-Zohdy M. Al-Nsour Microelectronics System Design Laboratory Department of Electrical and Systems Engineering Oakland University Rochester MI USA

This paper approaches electronic nose design from two promising angles: reinforcement neural network (RNN) learning algorithms, and naturally compatible analog circuits. This approach is inspired by biological sensing and discrimination of a multitude of odors in a background environment. A VLSI system approach is presented for classification of chemical compounds, with knowledge of key features only. Based on utilizing microsensor arrays, reinforcement neural networks are used to affect nonparametric pattern recognition, classification, and distinction among multicomponent chemicals. A specialized RNN approach is chosen. Realization and implementation of analog RNN circuits is presented using 1.2 /spl mu/m CMOS n-well technology, at AMI, through the MOSIS facilities. Preliminary results are satisfactory and lend evidence to the effectiveness of the analog designed neural network building blocks for temporal and spatial NN pattern recognition.

关键词： Learning Neural networks Electronic noses Recurrent neural networks Pattern recognition CMOS technology Algorithm design and analysis Analog circuits Very large scale integration Chemical compounds

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An algorithm for the design of a residue-to-binary converter

An algorithm for the design of a residue-to-binary converter

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Midwest Symposium on Circuits and systems (MWSCAS)

作者： A.A. Hiasat H.S. Abdel-Aty-Zohdy Microelectronics System Design Laboratory Department of Electrical and Systems Engineering Oakland University Rochester MI USA

This paper presents a new algorithm which converts moduli (2/sup k/, 2/sup k/-1, 2/sup k/-1-1) residue numbers to their binary equivalents. A suitable hardware implementation which utilizes binary adders, and needing no memory, is proposed. If the system is pipelined, then the throughput rate is that of a single (3k-1) bits adder. Thus, hardware requirements and execution time are less, with corresponding larger dynamic range.

关键词： Algorithm design and analysis Signal processing algorithms Hardware Equations microelectronics Laboratories design engineering systems engineering and theory Throughput Adders

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An improved ASIC design and implementation for color space conversion applications

An improved ASIC design and implementation for color space c...

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Midwest Symposium on Circuits and systems (MWSCAS)

作者： M. Nsour H.S. Abdel-Aty-Zohdy Microelectronics System Design Laboratory Department of Electrical and Systems Engineering Oakland University Rochester MI USA

The design and VLSI implementation of an ASIC chip, which performs real time conversion, the Red, Green, and Blue (RGB) color coordinates to CIE (Commission Internationale de l'Eclairage) standard L* (luminance), a* (redness-greenness), and b* (yellowness-blueness) color coordinates, is presented. High-speed operation of this ASIC is achieved by pipelining the input data, and performing parallel operations. The ASIC is implemented using CMOS, 2.0 /spl mu/m, n-well process. It occupies an area of 1.55/spl times/1.45 mm/sup 2/. The chip is intended to be used in colorimetry manufacturing inspection and robotics precision. Inputs are 3 bits each. a* and b* are 7 bits each, L* is 6 bits.

关键词： Application specific integrated circuits systems engineering and theory Inspection Application software Humans Extraterrestrial measurements Instruments Color microelectronics Laboratories

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Formal verification and performance evaluation of logic integrated systems based on hierarchical analysis

Formal verification and performance evaluation of logic inte...

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Midwest Symposium on Circuits and systems (MWSCAS)

作者： F.A. El-Licy H.S. Abdel-Aty-Zohdy Microelectronics System Design Laboratory Department of Electrical and Systems Engineering Oakland University Rochester MI USA

ISBN: (纸本)078037150X

Formal verification of very large scale integrated circuit (VLSIC) involves the formal correctness of the functionality of a given design, while circuit validation involves the reliability and efficiency of the design. A hierarchical approach for computation, of IC design efficiency is proposed and implemented using figures of merit. The work has been motivated to partially complete an IC formal verification tool. The implemented system is integrated into a formal verification environment to reflect the performance of the verified system. The system is capable of analyzing the power dissipation and figures of merit using equivalent R and C components. The hierarchical analysis and evaluation of figures of merit general factors obtained at different system levels represent performance evaluation of each gate. An illustrative example of a 6/spl times/6 carry look-ahead adder is given and worst case conditions have been determined. The system performance may thus be improved.

关键词： Formal verification CMOS logic circuits Binary trees Power dissipation Semiconductor device modeling Laboratories Performance analysis Switches Delay effects Logic design

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A high-speed division algorithm for residue number system

A high-speed division algorithm for residue number system

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IEEE International Symposium on Circuits and systems (ISCAS)

作者： A.A. Hiasat H.S. Abdel-Aty-Zohdy Microelectronics System Design Laboratory Department of Electrical and Systems Engineering Oakland University Rochester MI USA

A new algorithm for one of the longstanding problems in residue number system, namely division, is presented. The algorithm is very simple. It approaches the paper-and-pencil division procedure where the quotient is selected to guarantee a non-negative remainder. This algorithm does not require sign and overflow detection, scaling, or redundant moduli. Based on computer simulation results, the algorithm is four times faster than the most recent and competitive published work by Lu and Chiang (see IEEE Trans. Compu., vol. C-41, no. 8, p. 1026-32, 1992).

关键词： Hardware Cathode ray tubes microelectronics Laboratories design engineering systems engineering and theory Computer simulation Digital arithmetic Dynamic range Decoding

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