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检索条件"机构=Microelectronics System Design Laboratory Electrical and Systems Engineering"
157 条 记 录,以下是21-30 订阅
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Reinforcement neural learning with application to gas sensors
Reinforcement neural learning with application to gas sensor...
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Midwest Symposium on Circuits and systems (MWSCAS)
作者: H.S. Abdel-Aty-Zohdy Microelectronics System Design Laboratory Department of Electrical and Systems Engineering Oakland University Rochester MI USA
Neural net reinforcement learning algorithm and its application to gas (chemicals) classification and quantification are considered in this paper. The approach does not require memory and has simplified reward/punishm... 详细信息
来源: 评论
Reinforcement learning neural network circuits for electronic nose
Reinforcement learning neural network circuits for electroni...
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IEEE International Symposium on Circuits and systems (ISCAS)
作者: H.S. Abdel-Aty-Zohdy M. Al-Nsour Microelectronics System Design Laboratory Department of Electrical and Systems Engineering Oakland University Rochester MI USA
This paper approaches electronic nose design from two promising angles: reinforcement neural network (RNN) learning algorithms, and naturally compatible analog circuits. This approach is inspired by biological sensing... 详细信息
来源: 评论
An improved ASIC design and implementation for color space conversion applications
An improved ASIC design and implementation for color space c...
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Midwest Symposium on Circuits and systems (MWSCAS)
作者: M. Nsour H.S. Abdel-Aty-Zohdy Microelectronics System Design Laboratory Department of Electrical and Systems Engineering Oakland University Rochester MI USA
The design and VLSI implementation of an ASIC chip, which performs real time conversion, the Red, Green, and Blue (RGB) color coordinates to CIE (Commission Internationale de l'Eclairage) standard L* (luminance), ... 详细信息
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An algorithm for the design of a residue-to-binary converter
An algorithm for the design of a residue-to-binary converter
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Midwest Symposium on Circuits and systems (MWSCAS)
作者: A.A. Hiasat H.S. Abdel-Aty-Zohdy Microelectronics System Design Laboratory Department of Electrical and Systems Engineering Oakland University Rochester MI USA
This paper presents a new algorithm which converts moduli (2/sup k/, 2/sup k/-1, 2/sup k/-1-1) residue numbers to their binary equivalents. A suitable hardware implementation which utilizes binary adders, and needing ... 详细信息
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Formal verification and performance evaluation of logic integrated systems based on hierarchical analysis
Formal verification and performance evaluation of logic inte...
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Midwest Symposium on Circuits and systems (MWSCAS)
作者: F.A. El-Licy H.S. Abdel-Aty-Zohdy Microelectronics System Design Laboratory Department of Electrical and Systems Engineering Oakland University Rochester MI USA
Formal verification of very large scale integrated circuit (VLSIC) involves the formal correctness of the functionality of a given design, while circuit validation involves the reliability and efficiency of the design... 详细信息
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A high-speed division algorithm for residue number system
A high-speed division algorithm for residue number system
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IEEE International Symposium on Circuits and systems (ISCAS)
作者: A.A. Hiasat H.S. Abdel-Aty-Zohdy Microelectronics System Design Laboratory Department of Electrical and Systems Engineering Oakland University Rochester MI USA
A new algorithm for one of the longstanding problems in residue number system, namely division, is presented. The algorithm is very simple. It approaches the paper-and-pencil division procedure where the quotient is s... 详细信息
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DMQ: Dual-Mode Q-Learning Hardware Accelerator for Shortest Path and Coverage Area  37
DMQ: Dual-Mode Q-Learning Hardware Accelerator for Shortest ...
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37th IEEE International system-on-Chip Conference, SOCC 2024
作者: Syafalni, Infall Firdaus, Mohamad Imam Sutisna, Nana Adiono, Trio Juhana, Tutun Mulyawan, Rahmat Bandung Institute of Technology School of Electrical Engineering and Informatics Indonesia University Center of Excellence on Microelectronics Bandung Institute of Technology Indonesia The University of Tokyo System Design Laboratory School of Engineering Tokyo Japan
In this paper, we propose a novel dual-mode Q-learning hardware accelerator (DMQ) for shortest path and coverage area problems. The hardware accelerator design uses only an agent to tackle multiple modes, in this case... 详细信息
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A genetic algorithm tracking model for product deployment in telecom services
A genetic algorithm tracking model for product deployment in...
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2005 IEEE International 48th Midwest Symposium on Circuits and systems, MWSCAS 2005
作者: Murphy, Linda Abdel-Aty-Zohdy, Hoda S. Hashem-Sherif, M. Microelectronics System Design Laboratory Oakland University Electrical and Systems Engineering Rochester MI United States AT and T Bell Labs. C5-2018 200 S. Laurel Avenue Middletown NJ United States
Genetic algorithms (GA) are designed to search for, discover and emphasize good solutions by applying selection and crossover techniques, inspired by nature, to supply solutions to engineering systems. Genetic algorit... 详细信息
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Analog multiplexing in time domain for biochemical measurement processing
Analog multiplexing in time domain for biochemical measureme...
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Midwest Symposium on Circuits and systems (MWSCAS)
作者: A. Patel T. Terry H.S. Abdel-Aty-Zohdy Microelectronics System Design Laboratory (MSDL) Electrical and Systems Engineering Department Oakland University Rochester MI USA
Digital Multiplexers and Analog multiplexers, through the use of filters and their applications implemented in frequency domain, which requires extensive hardware and is costly have seen substantial amount of research... 详细信息
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A wide input range analog multiplier for neuro-computing
A wide input range analog multiplier for neuro-computing
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Midwest Symposium on Circuits and systems (MWSCAS)
作者: M. Al-Nsour H.S. Abdel-Aty-Zohdy Microelectronics Systems Design Laboratory Department of Electrical and Systems Engineering Oakland University Rochester MN USA Microelectronics Systems Design Laboratory Department of Electrical and Systems Engineering Oakland University Rochester MI USA
A wide input range 4-quadrant analog multiplier design and its VLSI implementation are presented. The design is based on the squaring law operation of saturated NMOS transistors. The circuit is realized by using 12 NM... 详细信息
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